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NCP3066MNTXG

NCP3066MNTXG

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    VDFN8

  • 描述:

    LED DRIVER

  • 数据手册
  • 价格&库存
NCP3066MNTXG 数据手册
NCP3066, NCV3066 Constant Current Buck Boost Inverting Switching Regulator for HB-LEDs with Enable www.onsemi.com 1.5 A The NCP3066 is a monolithic switching regulator designed to deliver constant current for powering high brightness LEDs. The device has a very low feedback voltage of 235 mV (nominal) which is used to regulate the average current of the LED string. In addition, the NCP3066 has a wide input voltage up to 40 V to allow it to operate from a 12 Vac or a 12−36 Vdc supply, commonly used for lighting applications as well as unregulated supplies such as rechargeable batteries. The NCP3066 switching regulator can be configured in Step−Down (Buck), Step−Up (Boost) and Voltage−Inverting topologies with a minimum number of external components. The ON/OFF pin provides PWM dimming capability or a low power shutdown mode. MARKING DIAGRAMS 3066 ALYWG G 8 1 1 SOIC−8 D SUFFIX CASE 751 NCP3066 AWL YYWWG Features • • • • • • • • • • • Integrated 1.5 A Switch Input Voltage Range from 3.0 V to 40 V Logic Level Shutdown Capability Low Feedback Voltage of 235 mV Cycle−by−Cycle Current Limit No Control Loop Compensation Required Frequency of Operation Adjustable up to 250 kHz Analog and Digital PWM Dimming Capability Internal Thermal Shutdown with Hysteresis NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes These are Pb−Free Devices Applications Rsense VCC Ç Ç Ç Ç SWC Ipk SWE NCP3066 VCC CIN ÇÇ ÇÇ ÇÇ ÇÇ ON/OFF COMP DFN8 MN SUFFIX CASE 488AF L1 LED+ LED1 COUT D1 CT 3066 ALYWG G 1 PDIP−8 P, P1 SUFFIX CASE 626 1 • Automotive and Marine Lighting • Constant Current Source, High Brightness LED Driver • Low Voltage and Landscape Lighting ON/OFF 8 LEDn GND LED− CT NCP3066 A L, WL Y, YY W, WW G or G = = = = = = Specific Device Code Assembly Location Wafer Lot Year Work Week Pb−Free Package (Note: Microdot may be in either location) Rs GND ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 17 of this data sheet. Figure 1. Typical Buck Application Circuit © Semiconductor Components Industries, LLC, 2009 August, 2019 − Rev. 4 1 Publication Order Number: NCP3066/D NCP3066, NCV3066 SOIC−8/PDIP−8 1 Switch Collector Switch Emitter 2 DFN8 8 ON/OFF 7 Ipk Sense Timing Capacitor 3 6 GND 4 5 ÇÇ ÇÇ ÇÇ ÇÇ Switch Collector Switch Emitter Timing Capacitor VCC GND Comparator Inverting Input (Top View) NOTE: Figure 2. Pin Connections (Top View) ON/OFF Ipk Sense VCC Comparator Inverting Input EP Flag must be tied to GND Pin 4 on PCB Figure 3. Pin Connections 8 TSD ON/OFF ON/OFF EP Flag Ç Ç Ç Ç 1 Switch Collector Bias R S 7 Q Comparator − + Ipk Sense S R 2 Q Switch Emitter 0.2 V Oscillator 6 CT 3 Timing Capacitor VCC Comparator 0.235V Reference Regulator + − 5 4 GND Comparator Inverting Input Figure 4. Block Diagram PIN DESCRIPTION Pin No. PDIP8 DFN8 Pin Name 1 1 Switch Collector 2 2 Switch Emitter 3 3 Timing Capacitor 4 4, EP Flag GND 5 5 Comparator Inverting Input 6 6 VCC 7 7 Ipk Sense Peak Current Sense Input to monitor the voltage drop across an external resistor to limit the peak current through the circuit. 8 8 ON/OFF ON/OFF Pin. To disable the device, this input should be pulled below 0.8 V. If the pin is left floating, it will be disabled. Description Internal Darlington switch collector. Internal Darlington switch emitter. Timing Capacitor to control the switching frequency. Ground pin for all internal circuits. Inverting input pin of internal comparator. Voltage Supply www.onsemi.com 2 NCP3066, NCV3066 MAXIMUM RATINGS (measured vs. Pin 4, unless otherwise noted) Symbol Value Unit VCC Pin 6 VCC 0 to +42 V Comparator Inverting Input Pin 5 VCII −0.3 to + VCC V Darlington Switch Collector Pin 1 VSWC −0.3 to + 42 V Darlington Switch Emitter Pin 2 (Transistor OFF) VSWE −0.6 to + VCC V Darlington Switch Collector to Emitter Pins 1−2 VSWCE −0.3 to + 42 V Rating Darlington Switch Current ISW 1.5 A Ipk Sense Pin 7 VIPK −0.3 to VCC+ 0.3 V Timing Capacitor Pin Voltage (Pin 3) VTC −0.2 to +1.4 V Moisture Sensitivity Level MSL 1 − Lead Temperature Soldering TSLD 260 °C VON/OFF (−0.3 to +25) < VCC V ON/OFF Pin voltage POWER DISSIPATION AND THERMAL CHARACTERISTICS PDIP−8 (Note 5) Thermal Resistance Junction−to−Air RqJA SOIC−8 (Note 5) Thermal Resistance Junction−to−Air RqJA 100 180 °C/W °C/W DFN−8 (Note 5) Thermal Resistance Junction−to−Air Thermal Resistance Junction−to−Case RqJA RqJC 78 14 Storage Temperature Range TSTG −65 to +150 °C Maximum Junction Temperature TJMAX +150 °C Operating Junction Temperature Range (Note 3) NCP3066 NCV3066 TJ 0 to +85 −40 to +125 °C/W °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. This device series contains ESD protection and exceeds the following tests: Pin 1−8: Human Body Model 2000 V per AEC Q100−002; 003 or JESD22/A114; A115 Machine Model Method 200 V 2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78. 3. The relation between junction temperature, ambient temperature and Total Power dissipated in IC is TJ = TA + Rq • PD. 4. The pins which are not defined may not be loaded by external signals. 5. 35 mm copper, 10 cm2 copper area. www.onsemi.com 3 NCP3066, NCV3066 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, −40°C < TJ < +125°C for NCV3066, 0°C < TJ < +85°C for NCP3066 unless otherwise specified) Characteristic Symbol Conditions Min Typ Max Unit (VPin5 = 0 V, CT = 2.2 nF, TJ = 25°C) 110 150 190 kHz (Pin 7 to VCC, TJ = 25°C) 5.5 6.0 6.5 − OSCILLATOR fOSC Frequency IDISCHG/ICHG Discharge to Charge Current Ratio IDISCHG Capacitor Discharging Current (Pin 7 to VCC, TJ = 25°C) 1650 mA ICHG Capacitor Charging Current (Pin 7 to VCC, TJ = 25°C) 275 mA VIPK(Sense) Current Limit Sense Voltage (TJ = 25°C) (Note 7) 165 200 235 mV (ISW = 1.0 A, TJ = 25°C) (Note 6) 1.0 1.3 V (VCE = 40 V) 1.0 10 mA TJ = 25°C 235 OUTPUT SWITCH (Note 6) VSWCE(DROP) Darlington Switch Collector to Emitter Voltage Drop IC(OFF) Collector Off−State Current COMPARATOR VTH REGLiNE ICII in Threshold Voltage Threshold Voltage Line Regulation Input Bias Current mV TJ = 0°C to 85°C −5% 235 +5% TJ = −40°C to +125°C −10% 235 +10% (VCC = 3.0 V to 40 V) −6.0 2.0 6.0 mV (Vin = Vth) −1000 −100 1000 nA ON/OFF FEATURE VIH ON/OFF Pin Logic Input Level High VOUT = 0 V TJ = 25°C TJ = 0°C to +85°C 2.2 2.4 − − − − V VIL ON/OFF Pin Logic Input Level Low VOUT = Nominal Output Voltage J = 25°C TJ = 0°C to +85°C − − − − 1.0 0.8 V IIH ON/OFF Pin Input Current ON/OFF Pin = 5 V (ON) TJ = 25°C 15 mA IIL ON/OFF Pin Input Current ON/OFF Pin = 0 V (OFF) TJ = 25°C 1.0 mA ON/OFF Pin Minimum Width TJ = 25°C 50 ms TON_MIN TOTAL DEVICE Supply Current (VCC = 5.0 V to 40 V, CT = 2.2 nF, Pin 7 = VCC, VPin 5 > Vth, Pin 2 = GND, remaining pins open) ISTBY Standby Quiescent Current ON/OFF Pin = 5.0 V (OFF) TJ = 25°C TJ = −40°C to +125°C TSHD Thermal Shutdown Threshold 160 °C Hysteresis 10 °C ICC TSHDHYS 7.0 85 120 120 mA mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 6. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 7. The VIPK (Sense) Current Limit Sense Voltage is specified at static conditions. In dynamic operation the sensed current turn−off value depends on comparator response time and di/dt current slope. See the Operating Description section for details. 8. NCV prefix is for automotive and other applications requiring site and change control and extended operating temperature conditions. www.onsemi.com 4 350 150 300 145 250 FREQUENCY (kHz) FREQUENCY (kHz) NCP3066, NCV3066 200 150 100 0 2 4 6 8 10 12 14 16 18 10 15 20 25 30 35 Figure 5. Oscillator Frequency vs. Timing Capacitor Figure 6. Oscillator Frequency vs. Supply Voltage 40 1.3 ICE = 1.25 A 1.2 VOLTAGE DROP (V) ICE = 1 A ICE = 0.75 A 1.7 1.5 ICE = 0.5 A ICE = 0.25 A 0.9 −40 −20 0 20 40 ICE = 1.25 A 60 80 100 120 ICE = 0.75 A 1.0 0.9 0.8 ICE = 0.5 A ICE = 0.25 A 0.6 −40 −20 140 ICE = 1 A 1.1 0.7 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 7. Voltage Drop in Emitter Follower Configuration Figure 8. Common Emitter Configuration Output Darlington Switch Voltage Drop vs. Temperature 0.240 0.238 0.236 0.234 0.232 0.230 −40 −20 0 20 40 60 80 100 120 140 Vipk, CURRENT LIMIT SENSE VOLTAGE (V) VOLTAGE DROP (V) 5 VIN, INPUT VOLTAGE (V) 1.1 REFERENCE VOLTAGE (V) 0 Ct, CAPACITANCE (nF) 1.9 1.3 130 120 20 2.3 2.1 135 125 50 0 140 0.200 0.195 0.190 0.185 0.180 0.175 0.170 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 9. Vth vs. Temperature Figure 10. Current Limit Sense Voltage vs. Temperature www.onsemi.com 5 NCP3066, NCV3066 STANDBY SUPPLY CURRENT (mA) 450 400 350 300 250 200 150 100 50 0 0 5 10 15 20 25 30 Vin, INPUT VOLTAGE (V) 35 40 Figure 11. Standby Supply Current vs. Supply Voltage www.onsemi.com 6 NCP3066, NCV3066 INTRODUCTION The NCP3066 is a monolithic power switching regulator optimized for LED Driver applications. Its flexible architecture enables the system designer to directly implement step−up, step−down, and voltage−inverting converters with a minimum number of external components for driving LEDs. A representative block diagram is shown in Figure 3. comparator value, the output switch cycle is inhibited. When the load current causes the output voltage to fall below the nominal value feedback comparator enables switching immediately. Under these conditions, the output switch conduction can be enabled for a partial oscillator cycle, a partial cycle plus a complete cycle, multiple cycles, or a partial cycle plus multiple cycles. Operating Description Oscillator The NCP3066 operates as a fixed oscillator frequency output voltage ripple gated regulator. In general, this mode of operation is somewhat analogous to a capacitor charge pump and does not require dominant pole loop compensation for converter stability. The typical operating waveforms are shown in Figure 12. The output voltage waveform is shown for a step−down converter with the ripple and phasing exaggerated for clarity. During initial converter startup, the feedback comparator senses that the output voltage level is below nominal. This causes the output switch to turn on and off at a frequency and duty cycle controlled by the oscillator, thus pumping up the output filter capacitor. When the output voltage level reaches nominal The oscillator frequency and off−time of the output switch are programmed by the value of the timing capacitor CT. The capacitor CT is charged and discharged by a 1 to 6 ratio internal current source and sink, generating a positive going sawtooth waveform at Pin 3. This ratio sets the maximum tON/(tON + tOFF) of the switching converter as 6/(6+1) or 85.7% (typical). The oscillator peak and valley voltage difference is 500 mV typically. To calculate the CT capacitor value for required oscillator frequency, use the equations found in Figure 15. An online NCP3066 design tool can be found at www.onsemi.com, which aids in selecting component values. Figure 12. Typical Operating Waveforms www.onsemi.com 7 NCP3066, NCV3066 Peak Current Sense Comparator Darlington Switch is enabled again when the chip temperature decreases under the low threshold. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended to be used as a replacement for proper heatsinking. Under normal conditions, the output switch conduction is initiated by the Voltage Feedback comparator and terminated by the oscillator. Abnormal operating conditions occur when the converter output is overloaded or when feedback voltage sensing is lost. Under these conditions, the Ipk Current Sense comparator will protect the Darlington output Switch. The switch current is converted to a voltage by inserting a fractional ohm resistor, RSense, in series with VCC and Darlington output switch. The voltage drop across RSense is monitored by the Current Sense comparator. If the voltage drop exceeds 200 mV (nom) with respect to VCC, the comparator will set the latch and terminate the output switch conduction on a cycle−by−cycle basis. Real Vturn−off on Rs Resistor Vipk(sense) Output Switch The output switch is designed in Darlington configuration. This allows the application designer to operate at all conditions at high switching speed and low voltage drop. The Darlington Output Switch is designed to switch a maximum of 40 V collector to emitter voltage and current up to 1.5 A. ON/OFF Function The ON/OFF function provides interruption of switching and puts the circuitry into the low consumption mode. This feature is applicable for digital dimming of the LEDs as well. The ON/OFF signal inhibits switching of the regulator and reduces the average current through the LEDs. The frequency of this pulse width−modulated signal with the duty cycle can range from less than 1% to 100% is limited by the value of 1 kHz. Pulling this pin below 0.8 V or leaving it opened turns the regulator off. In this state the consumption of the device is reduced below 100 uA. Pulling this pin above 2.4 V (up to max. 25 V) allows the regulator running in normal state. If the ON/OFF feature is not needed, the ON/OFF pin can be wired to VCC, provided this voltage does not exceed 25 V. I1 di/dt slope Io I through the Darlington Switch t_delay Figure 13. Current Sense Waveform The VIPK(Sense) Current Limit Sense Voltage threshold is specified at static conditions. In dynamic operation the sensed current turn−off value depends on comparator response time and di/dt current slope. Real Vturn−off on Rsc resistor Vturn_off = Vipk(sense) + RSense*(tdelay*di/dt) Typical Ipk comparator response time tdelay is 350 ns. The di/dt current slope is dependent on the voltage difference across the inductor and the value of the inductor. Increasing the value of the inductor will reduce the di/dt slope. It is recommended to verify the actual peak current in the application at worst conditions to be sure that the max peak current will never get over the 1.5 A Darlington Switch Current max rating. No Output Capacitor Operation A traditional buck topology includes an inductor followed by an output capacitor which filters the ripple. The capacitor is placed in parallel with the LED or array of LEDs to lower the ripple current. A constant current buck regulator such as the NCP3066 focuses on the control of the current through the load, not the voltage across it. The switching frequency of the NCP3066 is in the range of 100−250 kHz which is much higher than the human eye can detect. By configuring the NCP3066 in a continuous conduction buck configuration with low peak to peak ripple the output filter capacitor can be eliminated. The important design parameter is to keep the peak current below the maximum current rating of the LED. Using 15−40% peak to peak ripple results in a good compromise between achieving max average output current without exceeding the maximum limit. This saves space and reduces part count for applications. Thermal Shutdown Internal thermal shutdown circuitry is provided to protect the IC in the event that the maximum junction temperature is exceeded. When activated, typically at 160°C, the Darlington Output Switch is disabled. The temperature sensing circuit is designed with some hysteresis. The www.onsemi.com 8 NCP3066, NCV3066 APPLICATIONS Figures 15 through 24 show the simplicity and flexibility of the NCP3066. Two main converter topologies are demonstrated with actual test data shown below each of the circuit diagrams. The demo boards have an input for a digital dimming signal. You can provide a PWM signal to change the average output current and reduce the LED brightness. Figure 14 gives the relevant design equations for the key parameters. Additionally, a complete application design aid for the NCP3066 can be found at www.onsemi.com. Parameter Step−Down Step−Up ǒtton Ǔ off Vout ) VF Vin * VSWCE * Vout Vout ) VF * Vin Vin * VSWCE ton ton toff ton toff ǒtton ) 1Ǔ off f CT f CT + 381.6 @ 10 fosc *6 * 343 ǒtton ) 1Ǔ off 10 *12 ǒtton ) 1Ǔ off IL(avg) Iout Ipk (Switch) DI IL(avg) ) L 2 DI IL(avg) ) L 2 RSC 0.20 Ipk (Switch) 0.20 Ipk (Switch) L * Vout ǒVin * VSWCE Ǔ DIL Vripple(pp) DIL Iout Iout Ǹǒ 1 8 f CO ton Ǔ ) (ESR) 2 2 ǒVin *DIVLSWCEǓ ton Iout ) DIL CO V ref V ref Rs Rs ton ESR 9. VSWCE − Darlington Switch Collector to Emitter Voltage Drop, refer to Figures 7 and 8. 10. VF − Output rectifier forward voltage drop. Typical value for 1N5819 Schottky barrier rectifier is 0.4 V. 11. The calculated ton/toff must not exceed the minimum guaranteed oscillator charge to discharge ratio. Figure 14. Design Equations The Following Converter Characteristics Must Be Chosen: Vin − Nominal operating input voltage. Vout − Desired output voltage. Iout − Desired output current. DIL − Desired peak−to−peak inductor ripple current. For maximum output current it is suggested that DIL be chosen to be less than 10% of the average inductor current IL(avg). This will help prevent Ipk (Switch) from reaching the current limit threshold set by RSC. If the design goal is to use a minimum inductance value, let DIL = 2(IL(avg)). This will proportionally reduce converter output current capability. f − Maximum output switch frequency. Vripple(pp) − Desired peak−to−peak output ripple voltage. For best performance the ripple voltage should be kept to a low value since it will directly affect line and load regulation. Capacitor CO should be a low equivalent series resistance (ESR) electrolytic designed for switching regulator applications. www.onsemi.com 9 NCP3066, NCV3066 Q1 L1 +LED Input ON/OFF R11 1k0 R1 ... R9 −LED D2 R10 10k ... VIN + ON/OFF SWC Ipk SWE NCP3066 SOIC VCC 9 x 0R15 R15 1k0 R12 12k CT COMP C1 C9 100p Q2 R16 R68 GND + IC1 C2 220 mF R17 R33 0.1 mF C10 R19 C5 2n2 1k0 1n8 C8 C7 m15 100nF D1 GND Figure 15. Buck Demoboard with External Switch Application Schematic Table 1. BILL OF MATERIALS Designator Qty Description Value Tolerance Footprint Manufacturer Manufacturer Part Number R1;R2; R3;R4 4 Resistor 0.15R 1% 1206 Susumu RL1632R-R150-F R10 1 Resisitor 10k 1% 1206 Rohm MCR18EZHF1002 R11; R15 2 Resisitor 1k 1% 1206 Rohm MCR18EZPF1001 R12 NU Resistor 12k 1% 1206 Rohm MCR18EZHF1202 R16 1 Resistor 0.68R 5% 1210 Panasonic - ECG ERJ-14RQJR68U R17 OPTION Resistor 0.33R 5% 1210 Panasonic - ECG ERJ-14RQJR33U R19 1 Resistor 1k 5% 1210 Panasonic - ECG ERJ-14YJ102U C1 1 Capacitor 220mF/35V 20% 10x12.5 Panasonic EEUFC1V221 C2;C7 2 Capacitor 100nF 10% 1206 Kemet C1206C104K5RACTU C5 1 Capacitor 1.8nF 10% 1206 Kemet C1206C182K5RACTU C8 1 Capacitor 150mF/16V 20% F8 SANYO 16SP150M C9 1 Capacitor 100pF 10% 1206 Vishay/Vitramon VJ1206Y101KXEAT5Z C10 1 Capacitor 2.2nF 10% 1206 Kemet C1206C222K5RACTU Q1 1 Power MOSFET −25A, -30V NTD18P03L - DPAK ON Semiconductor NTD18P03L Q2 1 Switching NPN Transistor MMBT489LT1G - SOT-23 ON Semiconductor MMBT489LT1G D2 1 1A, 30V Schottky Rectifier MBR130T1G - SOD123 ON Semiconductor MBR130T1G IC1 1 Switching Regulator NCP3066DR2G - SOIC-8 ON Semiconductor NCP3066DR2G D1 1 3A, 30V Schottky Rectifier MBRS330T3G - SMC ON Semiconductor MBRS330T3G L1 1 Inductor 47 mH 20% Wurth Elektronik Wurth Elektronik WE−PD4 74457147 www.onsemi.com 10 NCP3066, NCV3066 Figure 16. Buck with External Switch Demoboard Layout 90 700 mA 4 LED (Vout = 12.8 V) EFFICIENCY (%) 80 75 70 65 700 mA 2 LED (Vout = 6.4 V) 60 350 mA 2 LED (Vout = 6.4 V) 55 50 10 Figure 15, Buck Demoboard With External Switch Application Schematic illustrates the NCP3066 being used as a PFET controller. Table 1. Bill Of Materials shows the small number of additional parts which are necessary to assemble mentioned demoboard. The demoboard based on two layer PCB and the layout is mentioned in Figure 16. Buck Demoboard Layout. The Line regulation is mentioned in Figure 20, Line Regulation. The Figure 21, Dimming characteristic shows behavior of circuitry in case the square wave signal with 5 V amplitude and 300 Hz frequency was delivered into ON/OFF pin of device. 350 mA 4 LED (Vout = 12.8 V) 85 15 20 25 30 Figure 17. Buck with External Switch Demoboard Photo 35 INPUT VOLTAGE (V) Figure 18. Efficiency of Buck LED Driver 95 90 EFFICIENCY (%) 85 3 A 4 LED (Vout = 12.8 V) 80 75 70 3 A 2 LED (Vout = 6.4 V) 65 60 55 10 15 20 25 30 35 INPUT VOLTAGE (V) Figure 19. Efficiency of Buck LED Driver at Iout = 3 A www.onsemi.com 11 NCP3066, NCV3066 0.70 0.35 Iout = 600 mA 0.30 Iout = 450 mA 0.50 0.40 Iout = 300 mA 0.30 0.20 Vin = 25 V 0.25 Pled (W) OUTPUT CURRENT (A) 0.60 0.20 Vin = 10 V − 15 V 0.15 0.10 Iout = 150 mA 0.10 0.05 0 8 10 12 14 16 18 20 22 24 INPUT VOLTAGE (V) 26 28 30 0 5 10 Figure 20. Line Regulation 20 30 40 50 60 70 80 ON/OFF PIN DUTY CYCLE (%) 90 Figure 21. Dimming Characteristic Table 2. TEST RESULTS Line Regulation Vin = 12 V to 35 V, Iout = 3000 mA 250 mA Output Ripple Vin = 12 V, Iout = 3000 mA 320 mA Efficiency Vin = 12 V, Iout = 3000 mA 80% www.onsemi.com 12 100 NCP3066, NCV3066 Input ON/OFF D1 L1 +LED 100mH R6 10k R1 R15 R2 100R VIN + ON/OFF SWC Ipk SWE VCC C1 m18 C2 100n NCP3066 SOIC COMP D2 −LED CT GND R3 1k0 C4 C5 R5 C6 R68 R4 100R C3 IC1 2n2 GND 3 x 100mF Figure 22. Boost demoboard Application Schematic Table 3. BILL OF MATERIALS Designator Qty Description Value Tolerance Footprint Manufacturer Manufacturer Part Number R1 1 Resistor 0.15R 1% 1206 Susumu RL1632R-R150-F R2;R4 NU Resisitor 100R 1% 1206 Vishay/Dale CRCW1206100RFKEA R3 1 Resisitor 1k 1% 1206 Rohm MCR18EZPF1001 R5 1 Resistor 0.68R 5% 1210 Panasonic - ECG ERJ-14RQJR68U R6 1 Resistor 10k 1% 1206 Rohm MCR18EZHF1002 C1 1 Capacitor 180mF 20% F8 SANYO 16SVPS180M C2 1 Capacitor 100nF 10% 1206 Kemet C1206C104K5RACTU C3 1 Capacitor 2.2nF 10% 1206 Kemet C1206C222K5RACTU C4,C5,C6 3 Capacitor 100mF 20% 1210 TDK C4532Y5V1A107Z C10 1 Capacitor 2.2nF 10% 1206 Kemet C1206C222K5RACTU IC1 1 Switching Regulator NCP3066DR2G - SOIC-8 ON Semiconductor NCP3066DR2G D1 1 Diode MBRS1540T3G - SMB ON Semiconductor MBRS1540T3G D2 1 Zener Diode BZX84B18VLT1G - SOT-23 ON Semiconductor BZX84B18VLT1G L2 1 Inductor 100mH 20% Coilcraft Coilcraft DO3316P-104MLB www.onsemi.com 13 NCP3066, NCV3066 Figure 23. Boost Demoboard Layout Figure 24. Boost Demonstration Photo 95 Figure 22, Boost Demoboard Application Schematic, illustrates the basic circuitry in boost topology, which allows supplying string up to eight LEDs up to 150 mA consumption. Table 3, Bill of Materials shows the small number of additional parts which are necessary to assembly mentioned demoboard. The demoboard based on one layer PCB and the layout is shown in Figure 23, Buck Demoboard Layout. The photo of this demoboard is mentioned in Figure 24, Boost Demoboard Photo. Figure 26, Dimming Characteristic shows behavior of circuitry in case the square wave signal with 5 V amplitude and 300 Hz frequency was delivered into ON/OFF pin of device. There was tested eight LEDs string with 150 mA consumption and VIN = 10 V at room temperature. The efficiency of this demoboard is mentioned in Figure 25. Efficiency of Boost LED Driver. EFFICIENCY (%) 90 150 mA 6 LED (19.2 V) 85 150 mA 8 LED (25.6 V) 80 75 70 65 60 5 7 9 11 13 15 17 19 INPUT VOLTAGE (V) Figure 25. Boost LED Driver Efficiency 3.50 LED POWER (W) 3.0 2.50 2.0 1.50 1.0 0.50 0 0 10 20 30 40 50 60 70 80 90 100 ON/OFF DUTY CYCLE (%) Figure 26. Dimming Characteristic Table 4. TEST RESULTS Line Regulation Vin = 10 V to 20 V, Vout = 19.2 V, Iout = 350 mA 25 mA Output Ripple Vin = 10 V to 20 V, Vout = 19.2 V, Iout = 350 mA 55 mA Efficiency Vin = 12 V, Vout = 19.2 V, Iout = 350 mA www.onsemi.com 14 85% NCP3066, NCV3066 Input ON/OFF L1 NCP3066 R6 R1 R2 100R R15 10k VIN SOIC ON/OFF SWC Ipk SWE −LED D1 R4 R3 C2 IC1 0.1 mF 330 mF D2 12k GND COMP C1 47 mH R7 CT Vcc +LED 1k0 C10 C3 C4 C5 R6 R68 100R 2n2 GND 3 x 100 mF Figure 27. Buck Demoboard Application Schematic Table 5. BILL OF MATERIALS Designator Qty. Description Value Tolerance Footprint Manufacturer Manufacturer Part Number R1 1 Resistor 0.15R 1% 1206 Susumu RL1632R-R150-F R2; R5 NU Resisitor 100R 1% 1206 Vishay/Dale CRCW1206100RFKEA R3 1 Resisitor 1k 1% 1206 Rohm MCR18EZPF1001 R4 1 Resistor 0.68R 5% 1210 Panasonic - ECG ERJ-14RQJR68U R6 1 Resisitor 10 k 1% 1206 Rohm MCR18EZHF1002 R7 NU Resisitor 12 k 1% 1206 Rohm MCR18EZPF1202 C1 1 Capacitor 330 mF 20% F8 PANASONIC EEEFK1E331GP C2 1 Capacitor 100 nF 10% 1206 Kemet C1206C104K5RACTU C3 1 Capacitor 2.2 nF 10% 1206 Kemet C1206C222K5RACTU C4, C5, C6 3 Capacitor 100 mF 20% 1210 TDK C4532Y5V1A107Z IC1 1 Switching Regulator NCP3066 - SOIC8 ON Semiconductor NCP3066DR2G D1 1 Diode MBRS1504 - SMB ON Semiconductor MBRS1504T3G D2 1 Zener Diode BZX84C8V2 - SOT23 ON Semiconductor BZX84C8V2LT1G L1 1 Inductor 47 mH 20% DO3316 CoilCraft DO3316P-473MLB www.onsemi.com 15 NCP3066, NCV3066 Figure 29. Buck Demonstration Photo Figure 28. Buck Demoboard Layout mentioned demoboard. The demoboard based on one layer PCB and the layout is mentioned in Figure 28 Buck Demoboard Layout. The Line regulation is mentioned in Figure 30 Line Regulation. The Figure 31 shows efficiency of Buck LED Driver. The Figure 27 Buck demoboard Application schematic illustrates the basic circuitry in buck topology, which allows supplying one or two LEDs up to 350 mA consumption. The TABLE 5 BILL OF MATERIALS shows the small number of additional parts which are necessary to assembly 80 0.40 0.25 0.20 1 LED 100 mA 0.10 65 60 55 50 1 LED 100 mA 45 1 LED 350 mA 40 0.05 0 2 LED 100 mA 70 0.30 0.15 2 LED 350 mA 75 1 LED 350 mA EFFICIENCY (%) OUTPUT CURRENT (mA) 0.35 5 10 15 20 25 30 35 30 35 5 10 15 20 25 30 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure 30. Line Regulation Figure 31. Efficiency of Buck LED Driver Table 6. TEST RESULTS Line Regulation Vin = 8 V to 20 V, Vout = 3.2 V, Iout = 350 mA 19 mA Output Ripple Vin = 8 V to 20 V, Vout = 3.2 V, Iout = 350 mA 32 mA Efficiency Vin = 12 V, Vout = 3.2 V, Iout = 350 mA www.onsemi.com 16 62% 35 NCP3066, NCV3066 R ON/OFF 10k IC1 Rsense R15 ON/OFF SWC Ipk SWE NCP3066 VIN VCC + COMP CT GND Figure 32. ONOFF Serial Resistor Connection This resistor shifts the ON/OFF threshold by about 200 mV to higher value, but the TTL logic compatibility is kept in full range of input voltage and operating temperature range. If the application allows ON/OFF pin to be biased by voltage and the power supply is not connected to Vcc pin at the same time, then it is recommended to limit ON/OFF current by resistor with value 10 kW to protect the NCP3066 device. This situation is mentioned in Figure 32, ON/OFF Serial Resistor Connection. ORDERING INFORMATION Package Shipping† NCP3066MNTXG DFN−8 (Pb−Free) 4000 / Tape & Reel NCP3066PG PDIP−8 (Pb−Free) 50 Units / Rail NCP3066DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel NCV3066MNTXG DFN−8 (Pb−Free) 4000 / Tape & Reel NCV3066PG PDIP−8 (Pb−Free) 50 Units / Rail NCV3066DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 17 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DFN8, 4x4 CASE 488AF−01 ISSUE C 1 SCALE 2:1 A B D PIN ONE REFERENCE 2X 0.15 C 2X 0.15 C 0.10 C 8X ÉÉ ÉÉ ÉÉ 0.08 C DETAIL A E OPTIONAL CONSTRUCTIONS EXPOSED Cu DETAIL B ÇÇÇÇ (A3) A A1 C D2 ÇÇÇÇ e 8X SEATING PLANE ÉÉÉ ÉÉÉ ÇÇÇ A3 A1 ALTERNATE CONSTRUCTIONS 8X MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.25 0.35 4.00 BSC 1.91 2.21 4.00 BSC 2.09 2.39 0.80 BSC 0.20 −−− 0.30 0.50 −−− 0.15 XXXXXX XXXXXX ALYWG G E2 5 DIM A A1 A3 b D D2 E E2 e K L L1 GENERIC MARKING DIAGRAM* L 4 ÇÇÇÇ 8 MOLD CMPD DETAIL B SIDE VIEW K ÇÇÇ ÇÇÇ ÉÉÉ TOP VIEW 1 NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30MM FROM TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. DETAILS A AND B SHOW OPTIONAL CONSTRUCTIONS FOR TERMINALS. L L L1 NOTE 4 DETAIL A DATE 15 JAN 2009 b XXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW SOLDERING FOOTPRINT* 2.21 8X *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 0.63 4.30 2.39 PACKAGE OUTLINE 8X 0.35 0.80 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON15232D DFN8, 4X4, 0.8P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS PDIP−8 CASE 626−05 ISSUE P DATE 22 APR 2015 SCALE 1:1 D A E H 8 5 E1 1 4 NOTE 8 b2 c B END VIEW TOP VIEW WITH LEADS CONSTRAINED NOTE 5 A2 A e/2 NOTE 3 L SEATING PLANE A1 C D1 M e 8X SIDE VIEW b 0.010 eB END VIEW M C A M B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3. 4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE NOT TO EXCEED 0.10 INCH. 5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR TO DATUM C. 6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE LEADS UNCONSTRAINED. 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE LEADS, WHERE THE LEADS EXIT THE BODY. 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE CORNERS). DIM A A1 A2 b b2 C D D1 E E1 e eB L M INCHES MIN MAX −−−− 0.210 0.015 −−−− 0.115 0.195 0.014 0.022 0.060 TYP 0.008 0.014 0.355 0.400 0.005 −−−− 0.300 0.325 0.240 0.280 0.100 BSC −−−− 0.430 0.115 0.150 −−−− 10 ° MILLIMETERS MIN MAX −−− 5.33 0.38 −−− 2.92 4.95 0.35 0.56 1.52 TYP 0.20 0.36 9.02 10.16 0.13 −−− 7.62 8.26 6.10 7.11 2.54 BSC −−− 10.92 2.92 3.81 −−− 10 ° NOTE 6 GENERIC MARKING DIAGRAM* STYLE 1: PIN 1. AC IN 2. DC + IN 3. DC − IN 4. AC IN 5. GROUND 6. OUTPUT 7. AUXILIARY 8. VCC XXXXXXXXX AWL YYWWG XXXX A WL YY WW G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DOCUMENT NUMBER: DESCRIPTION: 98ASB42420B PDIP−8 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK 8 1 SCALE 1:1 −X− DATE 16 FEB 2011 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N X 45 _ SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S 8 8 1 1 IC 4.0 0.155 XXXXX A L Y W G IC (Pb−Free) = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package XXXXXX AYWW 1 1 Discrete XXXXXX AYWW G Discrete (Pb−Free) XXXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 1.270 0.050 SCALE 6:1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 8 8 XXXXX ALYWX G XXXXX ALYWX 1.52 0.060 0.6 0.024 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 7.0 0.275 DIM A B C D G H J K M N S mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SOIC−8 NB CASE 751−07 ISSUE AK DATE 16 FEB 2011 STYLE 1: PIN 1. EMITTER 2. COLLECTOR 3. COLLECTOR 4. EMITTER 5. EMITTER 6. BASE 7. BASE 8. EMITTER STYLE 2: PIN 1. COLLECTOR, DIE, #1 2. COLLECTOR, #1 3. COLLECTOR, #2 4. COLLECTOR, #2 5. BASE, #2 6. EMITTER, #2 7. BASE, #1 8. EMITTER, #1 STYLE 3: PIN 1. DRAIN, DIE #1 2. DRAIN, #1 3. DRAIN, #2 4. DRAIN, #2 5. GATE, #2 6. SOURCE, #2 7. GATE, #1 8. SOURCE, #1 STYLE 4: PIN 1. ANODE 2. ANODE 3. ANODE 4. ANODE 5. ANODE 6. ANODE 7. ANODE 8. COMMON CATHODE STYLE 5: PIN 1. DRAIN 2. DRAIN 3. DRAIN 4. DRAIN 5. GATE 6. GATE 7. SOURCE 8. SOURCE STYLE 6: PIN 1. SOURCE 2. DRAIN 3. DRAIN 4. SOURCE 5. SOURCE 6. GATE 7. GATE 8. SOURCE STYLE 7: PIN 1. INPUT 2. EXTERNAL BYPASS 3. THIRD STAGE SOURCE 4. GROUND 5. DRAIN 6. GATE 3 7. SECOND STAGE Vd 8. FIRST STAGE Vd STYLE 8: PIN 1. COLLECTOR, DIE #1 2. BASE, #1 3. BASE, #2 4. COLLECTOR, #2 5. COLLECTOR, #2 6. EMITTER, #2 7. EMITTER, #1 8. COLLECTOR, #1 STYLE 9: PIN 1. EMITTER, COMMON 2. COLLECTOR, DIE #1 3. COLLECTOR, DIE #2 4. EMITTER, COMMON 5. EMITTER, COMMON 6. BASE, DIE #2 7. BASE, DIE #1 8. EMITTER, COMMON STYLE 10: PIN 1. GROUND 2. BIAS 1 3. OUTPUT 4. GROUND 5. GROUND 6. BIAS 2 7. INPUT 8. GROUND STYLE 11: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1 STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 13: PIN 1. N.C. 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 14: PIN 1. N−SOURCE 2. N−GATE 3. P−SOURCE 4. P−GATE 5. P−DRAIN 6. P−DRAIN 7. N−DRAIN 8. N−DRAIN STYLE 15: PIN 1. ANODE 1 2. ANODE 1 3. ANODE 1 4. ANODE 1 5. CATHODE, COMMON 6. CATHODE, COMMON 7. CATHODE, COMMON 8. CATHODE, COMMON STYLE 16: PIN 1. EMITTER, DIE #1 2. BASE, DIE #1 3. EMITTER, DIE #2 4. BASE, DIE #2 5. COLLECTOR, DIE #2 6. COLLECTOR, DIE #2 7. COLLECTOR, DIE #1 8. COLLECTOR, DIE #1 STYLE 17: PIN 1. VCC 2. V2OUT 3. V1OUT 4. TXE 5. RXE 6. VEE 7. GND 8. ACC STYLE 18: PIN 1. ANODE 2. ANODE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. CATHODE 8. CATHODE STYLE 19: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. MIRROR 2 7. DRAIN 1 8. MIRROR 1 STYLE 20: PIN 1. SOURCE (N) 2. GATE (N) 3. SOURCE (P) 4. GATE (P) 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 21: PIN 1. CATHODE 1 2. CATHODE 2 3. CATHODE 3 4. CATHODE 4 5. CATHODE 5 6. COMMON ANODE 7. COMMON ANODE 8. CATHODE 6 STYLE 22: PIN 1. I/O LINE 1 2. COMMON CATHODE/VCC 3. COMMON CATHODE/VCC 4. I/O LINE 3 5. COMMON ANODE/GND 6. I/O LINE 4 7. I/O LINE 5 8. COMMON ANODE/GND STYLE 23: PIN 1. LINE 1 IN 2. COMMON ANODE/GND 3. COMMON ANODE/GND 4. LINE 2 IN 5. LINE 2 OUT 6. COMMON ANODE/GND 7. COMMON ANODE/GND 8. LINE 1 OUT STYLE 24: PIN 1. BASE 2. EMITTER 3. COLLECTOR/ANODE 4. COLLECTOR/ANODE 5. CATHODE 6. CATHODE 7. COLLECTOR/ANODE 8. COLLECTOR/ANODE STYLE 25: PIN 1. VIN 2. N/C 3. REXT 4. GND 5. IOUT 6. IOUT 7. IOUT 8. IOUT STYLE 26: PIN 1. GND 2. dv/dt 3. ENABLE 4. ILIMIT 5. SOURCE 6. SOURCE 7. SOURCE 8. VCC STYLE 29: PIN 1. BASE, DIE #1 2. EMITTER, #1 3. BASE, #2 4. EMITTER, #2 5. COLLECTOR, #2 6. COLLECTOR, #2 7. COLLECTOR, #1 8. COLLECTOR, #1 STYLE 30: PIN 1. DRAIN 1 2. DRAIN 1 3. GATE 2 4. SOURCE 2 5. SOURCE 1/DRAIN 2 6. SOURCE 1/DRAIN 2 7. SOURCE 1/DRAIN 2 8. GATE 1 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB STYLE 27: PIN 1. ILIMIT 2. OVLO 3. UVLO 4. INPUT+ 5. SOURCE 6. SOURCE 7. SOURCE 8. DRAIN STYLE 28: PIN 1. SW_TO_GND 2. DASIC_OFF 3. DASIC_SW_DET 4. GND 5. V_MON 6. VBULK 7. VBULK 8. VIN Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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