NCP81155MNTXG

NCP81155 MOSFET Driver The NCP81155 is a high−performance dual MOSFET gate driver in a small 3 mm x 3 mm package, optimized to drive the gates of both high−side and low−side power MOSFETs in a buck or buck−boost application. VCC UVLO ensures the MOSFETs are off when supply voltages are low. A bi−directional Enable pin provides a fault signal to the controller when a UVLO fault is detected. www.onsemi.com Features • Space−Efficient 3 mm x 3 mm DFN8 Thermally−Enhanced • • • • • • • • Package VCC Range of 4.5 V to 13.2 V Integrated Bootstrap Diode Compatible with 3.3 V and 5 V PWM Inputs Bi−Directional Enable Feature Pulls Enable Pin low during a UVLO Fault. Adaptive Anti−Cross Conduction Circuit Protects against Cross−Conduction during FET Turn−on and Turn−off Output Disable Control Turns Off Both MOSFETs VCC Undervoltage Lockout These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 1 DFN8 MN SUFFIX CASE 506BJ MARKING DIAGRAM 1 81155 A L Y W G Typical Applications • E−Cigarettes • Unmanned Aerial Vehicles (UAV) 81155 ALYWG G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS BST 1 PWM 2 EN 3 VCC 4 FLAG 9 8 DRVH 7 SW 6 GND 5 DRVL (Top View) ORDERING INFORMATION Device Package Shipping† NCP81155MNTXG DFN8 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2016 January, 2019 − Rev. 0 1 Publication Order Number: NCP81155/D NCP81155 BST VCC DRVH PWM Logic SW Anti−Cross Conduction VCC DRVL EN VCC UVLO Fault Figure 1. Simplified Block Diagram Table 1. Pin Descriptions Pin No. Symbol Description 1 BST Floating bootstrap supply pin for high side gate driver. Connect the bootstrap capacitor between this pin and the SW pin. 2 PWM Control input: PWM = High − DRVH is high, DRVL is low. PWM = Low − DRVH is low, DRVL is high. 3 EN 4 VCC Power supply input. Connect a bypass capacitor (0.1 mF) from this pin to ground. 5 DRVL Low side gate drive output. Connect to the gate of low side MOSFET. 6 GND Bias and reference ground. All signals are referenced to this node (QFN Flag). 7 SW 8 DRVH High side gate drive output. Connect to the gate of high side MOSFET. 9 FLAG Thermal flag. There is no electrical connection to the IC. Connect to ground plane. Enable input: EN = High − Driver is enabled. EN = Low − Driver is disabled. Switch node. Connect this pin to the source of the high side MOSFET and drain of the low side MOSFET. www.onsemi.com 2 NCP81155 Table 2. ABSOLUTE MAXIMUM RATINGS Pin Symbol Pin Name VMAX VMIN VCC Main Supply Voltage Input 15 V 16 V (< 50 ns) −0.3 V BST Bootstrap Supply Voltage 35 V wrt/ GND 40 V ≤ 50 ns wrt/ GND 15 V wrt/ SW −0.3 V wrt/SW SW Switching Node (Bootstrap Supply Return) 35 V 40 V ≤ 50 ns −5 V −10 V (200 ns) DRVH High Side Driver Output BST+0.3 V SW + 15 V (< 80 ns) −0.3 V wrt/SW −2 V (