NCS2563DGEVB

NCS2563 Video Amplifier, 3-Channel, with High Definition Reconstruction Filters Description NCS2563 is a 3−Channel high speed video amplifier with 6th order Butterworth High Definition (HD) reconstruction filters and 6 dB gain. All three channels can accommodate all Component and RGB video signals. All channels can accept DC or AC coupled signals. If AC coupled, the internal clamps are employed. The outputs can drive both AC and DC coupled 150 W loads. It is designed to be compatible with most Digital −to−Analog Converters (DAC) embedded in most video processors. Features • • • • • • • • • MARKING DIAGRAM* 8 8 1 SOIC−8 D SUFFIX CASE 751 A L Y W G Three 6th Order High Definition 30 MHz Filter Internally Fixed Gain = 6 dB Transparent Input Clamping for Each Channel DC or AC Coupled Inputs DC or AC Coupled Outputs Integrated Level Shifter Operating Voltage +5 V Available in SOIC−8 Package These are Pb−Free Devices 1 N2563 ALYWG G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) PINOUT 8 OUT1 IN1 1 Applications • • • • http://onsemi.com IN2 2 Digital Set−Top Box DVD and Video Players HDTV Video−On−Demand (VOD) NCS2563 SOIC−8 7 OUT2 IN3 3 6 OUT3 VCC 4 5 GND ORDERING INFORMATION Package Shipping† NCS2563DG SOIC−8 (Pb−Free) 98 Units / Rail NCS2563DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2009 March, 2009 − Rev. 4 1 Publication Order Number: NCS2563/D NCS2563 PIN FUNCTION AND DESCRIPTION Description Pin Name Type 1 IN1 Input Video Input 1 for Video Signal featuring a frequency bandwidth compatible with High Definition Video (30 MHz) − Channel 1 2 IN2 Input Video Input 2 for Video Signal featuring a frequency bandwidth compatible with High Definition Video (30 MHz) − Channel 2 3 IN3 Input Video Input 3 for Video Signal featuring a frequency bandwidth compatible with High Definition Video (30 MHz) − Channel 3 4 VCC Power 5 GND GND 6 OUT3 Output HD Video Output 3 − Channel 3 7 OUT2 Output HD Video Output 2 − Channel 2 8 OUT1 Output HD Video Output 1 − Channel 1 Device Power Supply Voltage: +5 V Connected to Ground ATTRIBUTES Characteristics ESD Human Body Model Machine Model Value 8 kV 400 V 600 V All Pins (Note 1) Pins 1 to 5 (Note 2) All Output Pins (Note 2) Moisture Sensitivity (Note 3) Level 1 Flammability Rating − Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in 1. Human Body Model (HBM): R = 1500 W, C = 100 pF 2. Machine Model (MM) 3. For additional information, see Application Note AND8003/D. IN1 Transparent Clamp 6dB OUT1 6dB OUT2 6dB OUT3 30 MHz, 6th Order IN2 Transparent Clamp 30 MHz, 6th Order IN3 Transparent Clamp 30 MHz, 6th Order Figure 1. Block Diagram http://onsemi.com 2 NCS2563 MAXIMUM RATINGS Parameter Symbol Rating Unit VCC −0.35 v VCC v 5.5 Vdc Input Voltage Range VI −0.3 v VI v VCC Vdc Input Differential Voltage Range VID VI v VCC Vdc Output Current IO 50 mA Maximum Junction Temperature (Note 4) TJ 150 °C Operating Ambient Temperature TA −40 to +85 °C Storage Temperature Range Tstg −60 to +150 °C PD (See Graph) mW RqJA 112.7 °C/W Power Supply Voltages Power Dissipation Thermal Resistance, Junction−to−Air Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 4. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. 1800 The maximum power that can be safely dissipated is limited by the associated rise in junction temperature. For the plastic packages, the maximum safe junction temperature is 150°C. If the maximum is exceeded momentarily, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in the “overheated” condition for an extended period can result in device burnout. To ensure proper operation, it is important to observe the derating curves. 1600 POWER DISSIPATION (mV) Maximum Power Dissipation 1400 1200 1000 800 600 400 200 0 −40 −30−20−10 0 10 20 30 40 50 60 70 80 90100 TEMPERATURE (°C) Figure 2. Power Dissipation vs Temperature http://onsemi.com 3 NCS2563 DC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, TA = 25°C, 0.1 mF AC coupled inputs, Rsource = 37.5 W, 220 mF AC coupled outputs into 150 W load, referenced to 400 kHz, unless otherwise specified) Symbol Characteristics Conditions Min Typ Max Unit 4.75 5 5.25 V 22 33 mA 1.4 V VCC Operating Voltage Range ICC Power Supply Current VIN Input Common Mode Voltage Range VOH Output High Voltage 2.8 V VOL Output Low Voltage 280 mV GND NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. AC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, TA = 25°C, 0.1 mF AC coupled inputs, Rsource = 37.5 W,220 mF AC coupled outputs into 150 W load, referenced to 400 kHz, unless otherwise specified) Symbol Characteristics Conditions Min Typ Max Unit VIN = 1 V 5.8 6.0 6.2 dB 23 30 33 AVOL Voltage Gain (Note 5) BW Bandwidth of Low Pass Filter −1 dB −3 dB AR Attenuation (Stopband Reject) f = 44.25 MHz f = 74.25 MHz dG Differential Gain AV = +2, RL = 150 W 0.2 % dP Differential Phase AV = +2, RL = 150 W 0.1 ° THD Total Harmonic Distortion VOUT = 1.4 VPP, f = 10 MHz VOUT = 1.4 VPP, f = 15 MHz VOUT = 1.4 VPP, f = 22 MHz 0.2 0.4 1.2 % xtalk Channel−to−Channel Crosstalk VIN = 1.4 VPP, f = 1 MHz 60 dB SNR Signal to Noise Ratio* (Note 6) 100% White Signal, 100 kHz to 30 MHz 65 dB tPD Propagation Delay Input to Output 20 ns DTg Group Delay Variation* 100 kHz to 30 MHz 6 ns 28 MHz 14.5 36 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. *Guaranteed by design 5. 100% of tested IC fit to the bandwidth tolerance. 6. SNR = 20 x log (714 mV/RMS noise) http://onsemi.com 4 NCS2563 TYPICAL CHARACTERISTICS TA = 25°C, VCC = 5 V, Rsource = 37.5 W, 0.1 mF AC−Coupled Inputs, 220 mF AC−Coupled Outputs with 150 W 30 30 VIN = 4 dBm ZOUT = 150 W 20 10 30 MHz, −1 dB (BW) 20 10 0 −10 GAIN (dB) GAIN (dB) 0 VIN = 4 dBm ZOUT = 150 W 0.106 MHz, 6 dB −20 −30 33 MHz, −3 dB (BW) −10 −20 −40 −40 −50 −50 −60 −60 −70 10 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 500M 44.25 MHz, −14.5 dB −30 74.25 MHz, −36 dB −70 10 100 1k Figure 3. Gain vs. Frequency 10k 100k 1M FREQUENCY (Hz) 10M 100M 500M Figure 4. Attenuation 6.255 VIN = 4 dBm ZOUT = 150 W 6.155 GAIN (dB) 6.055 5.955 5.855 13.8 MHz 5.755 5.655 5.555 5.455 20k 100k 1M 10M FREQUENCY (Hz) 100M Figure 5. Flatness Bandwidth 0.1 dB −20 0 −25 −10 26 MHz; −30 dB −30 −20 CROSSTALK (dB) PSRR (dB) −35 −40 −45 100 kHz; −65 dB −50 −55 −30 −40 −60 −70 −65 −80 20k 100k 1M 10M 50M 1 MHz; −65 dB −50 −60 −70 VIN = 4 dBm Zout = 150 W −90 20k FREQUENCY (Hz) Xtalk Hostile 1 MHz; −72 dB Xtalk Adjacent 100k 1M 10M 50M FREQUENCY (Hz) Figure 6. PSRR vs. Frequency (No Bypass Capacitor) Figure 7. Crosstalk vs. Frequency, CH2/CH3 (100 mF AC−Coupled Input, DC−Coupled Output) http://onsemi.com 5 NCS2563 TYPICAL CHARACTERISTICS 160 140 120 100 80 60 40 20 0 0.8 0.6 0.4 0.2 0 80 mV Input 160 mV VOLTAGE (V) 80 60 40 20 0 Output 4.5E−6 5E−6 5.5E−6 6E−6 6.5E−6 7E−6 700 mV Input 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 1.4 V Output 4.5E−6 5E−6 TIME (s) 5.5E−6 6E−6 6.5E−6 TIME (s) Figure 8. Small Signal Step Response Tr = Tf = 1 ns VOLTAGE (V) VOLTAGE (mV) TA = 25°C, VCC = 5 V, Rsource = 37.5 W, 0.1 mF AC−Coupled Inputs, 220 mF AC−Coupled Outputs with 150 W Figure 9. Large Signal Step Response Tr = Tf = 1.0 ns 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 Input GND 0 −0.1 −0.2 −0.3 Output GND −0.4 −0.5 4.6E−6 5E−6 20 ns 5.2E−6 TIME (s) Figure 10. Propagation Delay vs. Time http://onsemi.com 6 5.4E−6 7E−6 NCS2563 APPLICATIONS INFORMATION DC−coupled output to the 150 W video load. In addition, the NCS2563 integrates a 6th order Butterworth filter per channel with a 3 dB frequency bandwidth of 30 MHz. This allows rejecting out the aliases or unwanted over−sampling effects produced by the video DAC. It works the same way for DVD recorders using ADC, this anti−aliasing filter (reconstruction filter) will avoid picture quality issue and will help also to filter out parasitic signals caused by EMI interference. A built−in diode−like clamp is used into the chip for each channel to support AC−coupled mode of operation. The clamp is active when the input signal goes below 0 V. The NCS2563 triple video driver has been optimized for High Definition video applications covering the requirements of the standards 720p, 1080i and related (RGB). All the 3 channels feature the same specifications and similar behaviors guaranteed by a high channel−to−channel crosstalk isolation (down to 60 dB at 1 MHz). Each channel provides an internal voltage−to−voltage gain of 2 from its input to its output reducing by the way the number of external components usually needed in the case of some discrete approaches (using stand−alone op amps). An internal level shifter is employed shifting up the output voltage by adding an offset of about 280 mV. This avoids sync pulse clipping and allows 2.28V 1V Y, R’, G’, B’ 1VPP 0V 0.1mF IN1 Clamp 0.28V 220mF 75W OUT1 0.1mF IN2 DAC Clamp RS 220mF OUT2 Clamp IN3 220mF OUT3 RS 75W ZO = 75W 75W ZO = 75W 75W 75W RS 0.1mF ZO = 75W 75W 2.28V Pb, Pr 0.28V 0.7VPP Figure 11. AC−Coupled Inputs and Outputs Figure 11 shows an example for which the external video source coming from the DAC is AC−coupled at the input and output. But thanks to the built−in transparent clamp and level shifter the device can operate in different configuration modes depending essentially on the DAC output signal level High and Low and how it fits the input common mode voltage of the video driver. When the configuration is DC−Coupled at the Inputs and Outputs the 0.1 mF and 220 mF coupling capacitors are no longer used, the clamps are in that case inactive; this configuration has the big advantage of being relatively low cost with the use of less external components. The input is AC−coupled if the input−signal amplitude goes over the range 0 V to 1.4 V or if the video source requires a coupling. In some circumstances it may be necessary to auto−bias signals by the addition of a pull−up and pull−down resistor or only pullup resistor (Typical 7.5 MW combined with the internal 800 kW pulldown) making the clamp inactive. The output AC−coupling configuration has the advantage of eliminating DC ground loop with the drawback of making the device more sensitive to video line or field tilt issues in the case of a too low output coupling capacitor. In some cases it may be necessary to increase the nominal 220 mF capacitor value. http://onsemi.com 7 NCS2563 DVD Player or STB +5 V 0.1 mF 1 R/Pr 10 mF IN1 OUT1 8 Video SOC 2 IN2 OUT2 NCS2563 RS 3 B/Pd RS R/Pr 75 W RS G/Y 75 W 220 mF 75 W Video Cables IN3 OUT3 7 75 W 220 mF 75 W Video Cables G/Y 75 W 6 75 W 220 mF 75 W Video Cables B/Pd 75 W 4 VCC GND 5 DAC Load Resistors AC−Coupling Caps are Optional Figure 12. Typical Application Circuit http://onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK 8 1 SCALE 1:1 −X− DATE 16 FEB 2011 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N X 45 _ SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S 8 8 1 1 IC 4.0 0.155 XXXXX A L Y W G IC (Pb−Free) = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package XXXXXX AYWW 1 1 Discrete XXXXXX AYWW G Discrete (Pb−Free) XXXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 1.270 0.050 SCALE 6:1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 8 8 XXXXX ALYWX G XXXXX ALYWX 1.52 0.060 0.6 0.024 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 7.0 0.275 DIM A B C D G H J K M N S mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SOIC−8 NB CASE 751−07 ISSUE AK DATE 16 FEB 2011 STYLE 1: PIN 1. EMITTER 2. COLLECTOR 3. COLLECTOR 4. EMITTER 5. EMITTER 6. BASE 7. BASE 8. EMITTER STYLE 2: PIN 1. COLLECTOR, DIE, #1 2. COLLECTOR, #1 3. COLLECTOR, #2 4. COLLECTOR, #2 5. BASE, #2 6. EMITTER, #2 7. BASE, #1 8. EMITTER, #1 STYLE 3: PIN 1. DRAIN, DIE #1 2. DRAIN, #1 3. DRAIN, #2 4. DRAIN, #2 5. GATE, #2 6. SOURCE, #2 7. GATE, #1 8. SOURCE, #1 STYLE 4: PIN 1. ANODE 2. ANODE 3. ANODE 4. ANODE 5. ANODE 6. ANODE 7. ANODE 8. COMMON CATHODE STYLE 5: PIN 1. DRAIN 2. DRAIN 3. DRAIN 4. DRAIN 5. GATE 6. GATE 7. SOURCE 8. SOURCE STYLE 6: PIN 1. SOURCE 2. DRAIN 3. DRAIN 4. SOURCE 5. SOURCE 6. GATE 7. GATE 8. SOURCE STYLE 7: PIN 1. INPUT 2. EXTERNAL BYPASS 3. THIRD STAGE SOURCE 4. GROUND 5. DRAIN 6. GATE 3 7. SECOND STAGE Vd 8. FIRST STAGE Vd STYLE 8: PIN 1. COLLECTOR, DIE #1 2. BASE, #1 3. BASE, #2 4. COLLECTOR, #2 5. COLLECTOR, #2 6. EMITTER, #2 7. EMITTER, #1 8. COLLECTOR, #1 STYLE 9: PIN 1. EMITTER, COMMON 2. COLLECTOR, DIE #1 3. COLLECTOR, DIE #2 4. EMITTER, COMMON 5. EMITTER, COMMON 6. BASE, DIE #2 7. BASE, DIE #1 8. EMITTER, COMMON STYLE 10: PIN 1. GROUND 2. BIAS 1 3. OUTPUT 4. GROUND 5. GROUND 6. BIAS 2 7. INPUT 8. GROUND STYLE 11: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1 STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 13: PIN 1. N.C. 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 14: PIN 1. N−SOURCE 2. N−GATE 3. P−SOURCE 4. P−GATE 5. P−DRAIN 6. P−DRAIN 7. N−DRAIN 8. N−DRAIN STYLE 15: PIN 1. ANODE 1 2. ANODE 1 3. ANODE 1 4. ANODE 1 5. CATHODE, COMMON 6. CATHODE, COMMON 7. CATHODE, COMMON 8. CATHODE, COMMON STYLE 16: PIN 1. EMITTER, DIE #1 2. BASE, DIE #1 3. EMITTER, DIE #2 4. BASE, DIE #2 5. COLLECTOR, DIE #2 6. COLLECTOR, DIE #2 7. COLLECTOR, DIE #1 8. COLLECTOR, DIE #1 STYLE 17: PIN 1. VCC 2. V2OUT 3. V1OUT 4. TXE 5. RXE 6. VEE 7. GND 8. ACC STYLE 18: PIN 1. ANODE 2. ANODE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. CATHODE 8. CATHODE STYLE 19: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. MIRROR 2 7. DRAIN 1 8. MIRROR 1 STYLE 20: PIN 1. SOURCE (N) 2. GATE (N) 3. SOURCE (P) 4. GATE (P) 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 21: PIN 1. CATHODE 1 2. CATHODE 2 3. CATHODE 3 4. CATHODE 4 5. CATHODE 5 6. COMMON ANODE 7. COMMON ANODE 8. CATHODE 6 STYLE 22: PIN 1. I/O LINE 1 2. COMMON CATHODE/VCC 3. COMMON CATHODE/VCC 4. I/O LINE 3 5. COMMON ANODE/GND 6. I/O LINE 4 7. I/O LINE 5 8. COMMON ANODE/GND STYLE 23: PIN 1. LINE 1 IN 2. COMMON ANODE/GND 3. COMMON ANODE/GND 4. LINE 2 IN 5. LINE 2 OUT 6. COMMON ANODE/GND 7. COMMON ANODE/GND 8. LINE 1 OUT STYLE 24: PIN 1. BASE 2. EMITTER 3. COLLECTOR/ANODE 4. COLLECTOR/ANODE 5. CATHODE 6. CATHODE 7. COLLECTOR/ANODE 8. COLLECTOR/ANODE STYLE 25: PIN 1. VIN 2. N/C 3. REXT 4. GND 5. IOUT 6. IOUT 7. IOUT 8. IOUT STYLE 26: PIN 1. GND 2. dv/dt 3. ENABLE 4. ILIMIT 5. SOURCE 6. SOURCE 7. SOURCE 8. VCC STYLE 29: PIN 1. BASE, DIE #1 2. EMITTER, #1 3. BASE, #2 4. EMITTER, #2 5. COLLECTOR, #2 6. COLLECTOR, #2 7. COLLECTOR, #1 8. COLLECTOR, #1 STYLE 30: PIN 1. DRAIN 1 2. DRAIN 1 3. GATE 2 4. SOURCE 2 5. SOURCE 1/DRAIN 2 6. SOURCE 1/DRAIN 2 7. SOURCE 1/DRAIN 2 8. GATE 1 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB STYLE 27: PIN 1. ILIMIT 2. OVLO 3. UVLO 4. INPUT+ 5. SOURCE 6. SOURCE 7. SOURCE 8. DRAIN STYLE 28: PIN 1. SW_TO_GND 2. DASIC_OFF 3. DASIC_SW_DET 4. GND 5. V_MON 6. VBULK 7. VBULK 8. VIN Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com onsemi Website: www.onsemi.com ◊ TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative