NVB5426NT4G

NTB5426N, NTP5426N, NVB5426N Power MOSFET 120 Amps, 60 Volts N-Channel D2PAK, TO-220 http://onsemi.com Features • • • • • Low RDS(on) High Current Capability Avalanche Energy Specified AEC Q101 Qualified − NVB5426N These Devices are Pb−Free and are RoHS Compliant V(BR)DSS 60 V 120 A 6.0 mW @ 10 V Applications • • • • ID MAX (Note 1) RDS(ON) MAX N−Channel Power Supplies Converters Power Motor Controls Bridge Circuits D G MAXIMUM RATINGS (TJ = 25°C Unless otherwise specified) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 60 V Gate−to−Source Voltage − Continuous VGS $20 V Gate−to−Source Voltage − Nonrepetitive (TP < 10 ms) VGS 30 V ID 120 A Continuous Drain Current RqJC (Note 1) Steady State Power Dissipation RqJC (Note 1) Steady State TC = 25°C TC = 100°C 215 W IDM 260 A TJ, Tstg −55 to +175 °C IS 60 A Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 50 Vdc, VGS = 10 Vdc, IL(pk) = 70 A, L = 0.3 mH, RG = 25 W) EAS 735 mJ Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 Seconds TL tp = 10 ms Operating and Storage Temperature Range Source Current (Body Diode) 260 °C Symbol Max Unit RqJC 0.7 °C/W Junction−to−Case (Drain) Steady State (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface mounted on FR4 board using 1 sq in pad size, (Cu Area 1.127 sq in [1 oz] including traces). © Semiconductor Components Industries, LLC, 2011 October, 2011 − Rev. 1 4 1 1 2 3 1 2 D2PAK CASE 418B STYLE 2 TO−220AB CASE 221A STYLE 5 3 MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain 5426N AYWW 5426N AYWW 1 Gate THERMAL RESISTANCE RATINGS Parameter 4 85 PD Pulsed Drain Current TC = 25°C S 3 Source 1 Gate 2 Drain 3 Source 2 Drain G A Y WW = Pb−Free Device = Assembly Location = Year = Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Publication Order Number: NTB5426N/D NTB5426N, NTP5426N, NVB5426N ELECTRICAL CHARACTERISTICS (TJ = 25°C Unless otherwise specified) Characteristics Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VDS = 0 V, ID = 250 mA 60 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−Body Leakage Current IDSS V 64 VGS = 0 V VDS = 60 V mV/°C TJ = 25°C 1.0 TJ = 150°C 25 IGSS VDS = 0 V, VGS = $20 V VGS(th) VGS = VDS, ID = 250 mA $100 mA nA ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Voltage VGS(th)/TJ 2.0 3.1 4.0 9.2 VDS(on) V mV/°C 0.36 V 6.0 mW VGS = 10 V, ID = 60 A 0.3 VGS = 10 V, ID = 60 A, 150°C 0.6 RDS(on) VGS = 10 V, ID = 60 A 4.9 gFS VDS = 15 V, ID = 20 A 65 S Input Capacitance Ciss 5800 pF Output Capacitance Coss VDS = 25 V, VGS = 0 V, f = 1 MHz Transfer Capacitance Crss Static Drain−to−Source On−Resistance Forward Transconductance CHARGES, CAPACITANCES & GATE RESISTANCE 1000 370 VGS = 10 V, VDS = 48 V, ID = 60 A Total Gate Charge QG(TOT) 150 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS 28 Gate−to−Drain Charge QGD 67 170 nC 6.0 SWITCHING CHARACTERISTICS, VGS = 10 V (Note 3) Turn−On Delay Time Rise Time td(on) tr Turn−Off Delay Time Fall Time VGS = 10 V, VDD = 48 V, ID = 60 A, RG = 3.0 W ns 15 100 td(off) 105 tf 95 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V IS = 60 A TJ = 25°C 0.88 TJ = 100°C 0.78 IS = 60 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms Reverse Recovery Time trr Charge Time ta Discharge Time tb 25 QRR 235 Reverse Recovery Stored Charge 1.1 75 Vdc ns 50 mC 2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 3. Switching characteristics are independent of operating junction temperatures. ORDERING INFORMATION Device NTP5426N Package Shipping† TO−220AB (Pb−Free) 50 Units / Rail NTB5426NT4G D2PAK (Pb−Free) 800 / Tape & Reel NVB5426NT4G D2PAK (Pb−Free) 800 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 NTB5426N, NTP5426N, NVB5426N TYPICAL CHARACTERISTICS RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 6.6 V 6.0 V 160 5.8 V 120 5.4 V 80 5.0 V 40 0 VDS ≥ 10 V TJ = 25°C ID, DRAIN CURRENT (A) 200 240 6.2 V 6.4 V 10 V VGS = 4.6 V 0 1 2 3 4 5 160 120 80 TJ = 25°C 40 TJ = −55°C 3 4 5 6 7 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics ID = 60 A TJ = 25°C 0.010 0.009 0.008 0.007 0.006 0.005 5 6 7 8 10 9 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.006 TJ = 25°C VGS = 10 V 0.005 0.004 10 30 50 70 90 130 110 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10,000 2.5 VGS = 0 V ID = 60 A VGS = 10 V 2.0 IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = 125°C VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.011 0.004 200 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) 240 1.5 1.0 0.5 −50 −25 0 25 50 75 100 125 150 175 TJ = 150°C 1000 TJ = 125°C 100 5 TJ, JUNCTION TEMPERATURE (°C) 10 15 20 25 30 35 40 45 50 55 60 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 NTB5426N, NTP5426N, NVB5426N TYPICAL CHARACTERISTICS VGS = 0 V TJ = 25°C 10,000 C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V) 12,000 Ciss 8000 6000 Coss 4000 2000 Crss 0 10 20 40 30 50 60 td(off) t, TIME (ns) tr td(on) 1.0 10 TJ = 25°C ID = 60 A VDS = 48 V 2.0 0 0 25 50 75 100 125 150 VGS = 0 V TJ = 25°C 100 80 60 40 20 0 100 0.5 0.6 0.7 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 800 VGS = 10 V Single Pulse TC = 25°C 100 ms ID = 70 A 10 ms AVALANCHE ENERGY (mJ) ID, DRAIN CURRENT (A) 4.0 120 tf 10 1 ms dc 10 ms 10 1 0.1 Q2 Figure 8. Gate−to−Source Voltage vs. Total Charge 100 100 Q1 6.0 Figure 7. Capacitance Variation VDD = 48 V ID = 60 A VGS = 10 V 1000 8.0 QG, TOTAL GATE CHARGE (nC) 1000 1.0 QT VDS, DRAIN−TO−SOURCE VOLTAGE (V) IS, SOURCE CURRENT (A) 0 10 RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 600 400 200 0 100 25 50 75 100 125 150 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 175 NTB5426N, NTP5426N, NVB5426N TYPICAL CHARACTERISTICS 100 R(t) (°C/W) D = 0.5 10 0.2 0.1 1 0.05 0.02 0.01 0.1 0.01 Single Pulse 0.001 0.000001 0.00001 Surface Mounted on FR4 Board using 1 sq in pad size, 1 oz Cu 0.0001 0.001 0.01 0.1 PULSE TIME (sec) Figure 13. Thermal Response http://onsemi.com 5 1 10 100 1000 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−220 CASE 221A ISSUE AK DATE 13 JAN 2022 SCALE 1:1 STYLE 1: PIN 1. 2. 3. 4. BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. BASE EMITTER COLLECTOR EMITTER STYLE 3: PIN 1. 2. 3. 4. CATHODE ANODE GATE ANODE STYLE 4: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE MAIN TERMINAL 2 STYLE 5: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN STYLE 6: PIN 1. 2. 3. 4. ANODE CATHODE ANODE CATHODE STYLE 7: PIN 1. 2. 3. 4. CATHODE ANODE CATHODE ANODE STYLE 8: PIN 1. 2. 3. 4. CATHODE ANODE EXTERNAL TRIP/DELAY ANODE STYLE 9: PIN 1. 2. 3. 4. GATE COLLECTOR EMITTER COLLECTOR STYLE 10: PIN 1. 2. 3. 4. GATE SOURCE DRAIN SOURCE STYLE 11: PIN 1. 2. 3. 4. DRAIN SOURCE GATE SOURCE STYLE 12: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE NOT CONNECTED DOCUMENT NUMBER: DESCRIPTION: 98ASB42148B TO−220 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS D2PAK 3 CASE 418B−04 ISSUE L DATE 17 FEB 2015 SCALE 1:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 418B−01 THRU 418B−03 OBSOLETE, NEW STANDARD 418B−04. C E −B− V W 4 1 2 A S 3 −T− SEATING PLANE K W J G D DIM A B C D E F G H J K L M N P R S V H 3 PL 0.13 (0.005) M T B M VARIABLE CONFIGURATION ZONE N R P L M STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR L M F F F VIEW W−W 1 VIEW W−W 2 VIEW W−W 3 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.89 1.14 1.40 7.87 8.89 2.54 BSC 2.03 2.79 0.46 0.64 2.29 2.79 1.32 1.83 7.11 8.13 5.00 REF 2.00 REF 0.99 REF 14.60 15.88 1.14 1.40 U L M INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.035 0.045 0.055 0.310 0.350 0.100 BSC 0.080 0.110 0.018 0.025 0.090 0.110 0.052 0.072 0.280 0.320 0.197 REF 0.079 REF 0.039 REF 0.575 0.625 0.045 0.055 STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 5: STYLE 6: PIN 1. CATHODE PIN 1. NO CONNECT 2. ANODE 2. CATHODE 3. CATHODE 3. ANODE 4. ANODE 4. CATHODE MARKING INFORMATION AND FOOTPRINT ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42761B D2PAK 3 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com D2PAK 3 CASE 418B−04 ISSUE L DATE 17 FEB 2015 GENERIC MARKING DIAGRAM* xx xxxxxxxxx AWLYWWG xxxxxxxxG AYWW AYWW xxxxxxxxG AKA IC Standard Rectifier xx A WL Y WW G AKA = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package = Polarity Indicator *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. SOLDERING FOOTPRINT* 10.49 8.38 16.155 2X 3.504 2X 1.016 5.080 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98ASB42761B D2PAK 3 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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