BUK9212-55B

BUK9212-55B TrenchMOS™ logic level FET M3D300 Rev. 02 — 12 December 2003 Product data 1. Product profile 1.1 Description N-channel enhancement mode field-effect power transistor in a plastic package using Philips High-Performance Automotive (HPA) TrenchMOS™ technology. 1.2 Features s Very low on-state resistance s 185 °C rated s Q101 compliant s Logic level compatible. 1.3 Applications s Automotive systems s Motors, lamps and solenoids s 12 V and 24 V loads s General purpose power switching. 1.4 Quick reference data s EDS(AL)S ≤ 173 mJ s ID ≤ 75 A s RDSon = 10.2 mΩ (typ) s Ptot ≤ 167 W. 2. Pinning information Table 1: Pin 1 2 3 mb Pinning - SOT428 (D-PAK), simplified outline and symbol Simplified outline [1] Description gate (g) drain (d) source (s) mounting base; connected to drain (d) Symbol d mb g s MBB076 2 1 Top view 3 MBK091 SOT428 (D-PAK) [1] It is not possible to make connection to pin 2 of the SOT428 package. Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 3. Ordering information Table 2: Ordering information Package Name BUK9212-55B D-PAK Description Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped). Version SOT428 Type number 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS VDGR VGS ID Parameter drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 °C; VGS = 5 V; Figure 2 and 3 Tmb = 100 °C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature reverse drain current (DC) peak reverse drain current non-repetitive drain-source avalanche energy Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 75 A; VDS ≤ 55 V; VGS = 5 V; RGS = 50 Ω; starting Tj = 25 °C [1] [2] [1] [2] [1] Conditions RGS = 20 kΩ Min −55 −55 - Max 55 55 ±15 83 75 59 335 167 +185 +185 83 75 335 173 Unit V V V A A A A W °C °C A A A mJ Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1 Source-drain diode Avalanche ruggedness [1] [2] Current is limited by power dissipation chip rating. Continuous current is limited by package. 9397 750 12235 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 2 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 120 Pder (%) 80 03no96 100 ID (A) 75 Capped at 75A due to package 03nl11 50 40 25 0 0 50 100 150 200 Tmb (°C) 0 0 50 100 150 200 Tmb (°C) P tot P der = ---------------------- × 100 % P ° tot ( 25 C ) VGS ≥ 5 V Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Continuous drain current as a function of mounting base temperature. 103 03no94 ID (A) Limit RDSon = VDS / ID tp = 10 µ s 102 100 µ s Capped at 75 A due to package 1 ms 10 DC 10 ms 100 ms 1 1 10 VDS (V) 102 Tmb = 25 °C; IDM single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 12235 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 3 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 5. Thermal characteristics Table 4: Symbol Rth(j-a) Rth(j-mb) Thermal characteristics Parameter thermal resistance from junction to ambient thermal resistance from junction to mounting base Figure 4 Conditions Min Typ 71.4 Max 0.95 Unit K/W K/W 5.1 Transient thermal impedance 1 δ = 0.5 Zth(j-mb) (K/W) 03nk52 0.2 0.1 0.05 0.02 10-1 10-2 P single shot δ= tp T tp T 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) t 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. 9397 750 12235 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 4 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 6. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified. Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V Tj = 25 °C Tj = −55 °C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 °C Tj = 185 °C Tj = −55 °C IDSS drain-source leakage current VDS = 55 V; VGS = 0 V Tj = 25 °C Tj = 185 °C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = ±15 V; VDS = 0 V VGS = 5 V; ID = 25 A; Figure 7 and 8 Tj = 25 °C Tj = 185 °C VGS = 4.5 V; ID = 25 A VGS = 10 V; ID = 25 A Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf Ld Ls total gate charge gate-source charge gate-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance internal source inductance measured from drain to center of die measured from source lead to source bond pad IS = 25 A; VGS = 0 V; Figure 15 IS = 20 A; dIS/dt = −100 A/µs VGS = −10 V; VDS = 30 V VDS = 30 V; RL = 1.2 Ω; VGS = 5 V; RG = 10 Ω VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 VGS = 5 V; VDS = 44 V; ID = 25 A; Figure 14 32 6 13 2640 360 160 19 101 96 75 2.5 7.5 3519 431 220 nC nC nC pF pF pF nS nS nS nS nH nH 10.2 8.1 12 25 13 10 mΩ mΩ mΩ mΩ 0.02 2 1 500 100 µA µA nA 1.1 0.4 1.5 2 2.3 V V V 55 50 V V Min Typ Max Unit Static characteristics Source-drain diode VSD trr Qr 9397 750 12235 source-drain (diode forward) voltage reverse recovery time recovered charge - 0.85 55 53 1.2 - V ns nC © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 5 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 250 ID (A) 200 Label is VGS (V) 10 8 6 5 4.8 4.6 4.4 4.2 4 3.8 3.6 3.4 3.2 3 2.8 2.6 2.4 0 2 4 6 8 03no91 18 RDSon (mΩ) 14 03no90 150 100 10 50 0 10 VDS (V) 6 3 7 11 VGS (V) 15 Tj = 25 °C; tp = 300 µs Tj = 25 °C; ID = 25 A Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values. 25 RDSon (mΩ) 20 3 3.2 3.4 4 3.8 3.6 5 03no92 2.4 a 03np00 10 1.6 15 0.8 10 Label is VGS (V) 5 0 50 100 150 200 ID (A) 250 0 -60 10 80 150 Tj (°C) 220 Tj = 25 °C; tp = 300 µs R DSon a = ---------------------------R DSon ( 25 °C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. Fig 7. Drain-source on-state resistance as a function of drain current; typical values. 9397 750 12235 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 6 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 2.5 VGS(th) (V) 2.0 max 03no99 10-1 ID (A) 10-2 03ng53 1.5 typ min -3 10 min typ max 1.0 10-4 0.5 10-5 0.0 -60 10 80 150 Tj (°C) 220 10-6 0 0.5 1 1.5 2 2.5 3 VGS (V) ID = 1 mA; VDS = VGS Tj = 25 °C; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 80 gfs (S) 60 03no88 6000 C (pF) Ciss 4000 03no93 40 Coss 2000 20 Crss 0 0 20 40 ID (A) 60 0 10-2 10-1 1 10 VDS (V) 102 Tj = 25 °C; VDS = 25 V VGS = 0 V; f = 1 MHz Fig 11. Forward transconductance as a function of drain current; typical values. Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. 9397 750 12235 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 7 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 100 ID (A) 75 03no89 5 VGS (V) 4 VDD = 14 V 3 03no87 VDD = 44 V 50 2 25 Tj = 185 °C Tj = 25 °C 1 0 0 1 2 3 VGS (V) 4 0 0 10 20 30 Q (nC) 40 G VDS = 25 V Tj = 25 °C; ID = 25 A Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of gate charge; typical values. 100 IS (A) 75 03no86 50 Tj = 185 °C Tj = 25 °C 25 0 0.0 0.3 0.6 0.9 VSD (V) 1.2 VGS = 0 V Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. 9397 750 12235 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 8 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 7. Package outline Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped) SOT428 seating plane y A E b2 A A1 mounting base A2 E1 D1 D HE L2 2 L L1 1 b1 e e1 b 3 wM A c 0 10 scale 20 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 2.38 2.22 A1(1) 0.65 0.45 A2 0.93 0.73 b 0.89 0.71 b1 1.1 0.9 b2 5.46 5.26 c 0.4 0.2 D 6.22 5.98 D1 min. 4.0 E 6.73 6.47 E1 e e1 HE 10.4 9.6 L 2.95 2.55 L1 min. 0.5 L2 0.9 0.5 w 0.2 y max. 0.2 4.81 2.285 4.57 4.45 Note 1. Measured from heatsink back to lead. OUTLINE VERSION SOT428 REFERENCES IEC JEDEC TO-252 JEITA SC-63 EUROPEAN PROJECTION ISSUE DATE 99-09-13 01-12-11 Fig 16. SOT428 (D-PAK). 9397 750 12235 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 9 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 8. Revision history Table 6: Rev Date 02 01 20031212 20021220 Revision history CPCN Description Product data (9397 750 12235) Objective data (9397 750 10809) 9397 750 12235 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 10 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET 9. Data sheet status Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 10. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 12. Trademarks TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V. 11. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. 9397 9397 750 12235 Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 02 — 12 December 2003 11 of 12 Philips Semiconductors BUK9212-55B TrenchMOS™ logic level FET Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 5.1 6 7 8 9 10 11 12 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 © Koninklijke Philips Electronics N.V. 2003. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 12 December 2003 Document order number: 9397 750 12235