LA9251M

Ordering number : ENN6125 Monolithic Linear IC LA9251M CD Player Analog Signal Processor (ASP) Overview The LA9251M is a servo signal-processing IC for CD players. In combination with a CD DSP such as the LC78626KE, it can implement a CD player with a minimal number of external components. • Built-in EF balance adjustment • Built-in RF level AGC function • RF level follower function for the tracking servo gain (with turn-off function) Package Dimensions unit: mm 3159-QIP64E [LA9251M] 17.2 14.0 0.35 33 Functions • • • • • • • • • • • • • • I/V amplifier SLC FE Focus servo amplifier Spindle servo amplifier (with gain switching function) Focus detection (DRF and FZD) Defect detection RF amplifier with AGC APC TE (with variable gain and auto balance function) Tracking servo amplifier Sled servo amplifier (with turn-off function) Track detection (HFL, TES) Shock detection 1.0 1.6 1.0 48 49 0.8 1.6 1.0 0.15 32 17.2 14.0 0.8 17 1.0 1 16 3.0max 0.8 Ratings 7 200 –15 to +75 64 0.1 2.7 15.6 Features • Low-voltage operation: 2.4 V (minimum) • Low current drain: 15 mA (at VCC = 3.0 V, typical) SANYO: QIP64E Specifications Maximum Ratings at Ta = 25°C, with pin 46 tied to ground Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Pin 56 Ta ≤ 75°C Conditions Unit V mW °C °C –40 to +150 Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 42800RM (OT) No. 6125-1/17 LA9251M Operating Conditions at Ta = 25°C, with pin 46 tied to ground Parameter Recommended supply voltage Allowable operating supply voltage range Symbol VCC VCC op Conditions Ratings 3 2.4 to 5.5 Unit V V Electrical Characteristics at Ta = 25°C, with pin 46 tied to ground, pin 56 = 3 V Parameter Current drain Reference voltage [Interface] SLOFvth SP8vth EFBALvth FSTAvth LASERvth CLK [RF Amplifier] RF no-signal voltage Minimum gain [Focus Amplifier] FDO gain FDO offset F search voltage (high) 1 F search voltage (low) 1 F search voltage (high) 2 F search voltage (low) 2 [Tracking Amplifier] TE gain max TE gain min TE-3dB TO gain TGL offset TGH offset THLD offset Off 1 offset Balance range (high) Balance range (low) TGLvth PH no-signal voltage BH no-signal voltage DRF detection voltage DRF output voltage (high) DRF output voltage (low) FZD detection voltage 1 FZD detection voltage 2 HFL detection voltage HFL output voltage (high) HFL output voltage (low) TES output voltage (low-high) TES output voltage (high-low) TES output voltage (high) TES output voltage (low) JP output voltage (high) TEG max TEG min TEfc TOG TGLost TGHost THDost OFF1ost BAL-H BAL-L TGLvth PHo BHo10 DRFvth DRF-H DRF-L FZD1 FZD2 HFLvth HFL-H HFL-L TES-LH TES-HL TES-H TES-L JP-H TJP = 3 V, at TO, the difference from TJP = 1.5 V 0.05 TESI, the difference from VR TESI, the difference from VR –0.15 0.05 2.5 FE, the difference from VR FE, the difference from VR At RF, the difference from VR –0.25 2.5 0 The difference from RFSM The difference from RFSM At RFSM, the difference from VR f = 10 kHz, E: 1 MΩ-input, PH1 = 0.5 V, TGRF = open f = 10 kHz, E: 1 MΩ-input, PH1 = 2 V, TGRF = open E: 1 MΩ-input TH → TO gain, THLD mode Servo on, TGL = high, TO TGL = low, the difference from the TGL offset, TO THLD mode, the difference from the TGL offset, TO TOFF = High ∆GainE/F input, TB = 3 V, TBC = open ∆GainE/F input, TB = 0 V, TBC = open 0.8 –0.90 0.40 –0.50 2.5 10.0 –260 –35 –35 –25 –3.6 –11.0 –3.0 –9.0 70 12.0 0 0 0 0 +35 –35 1.5 –0.65 0.65 –0.25 2.9 0 0.2 0 –0.10 2.9 0 –0.10 0.10 2.9 0 0.25 0.5 0.45 0.5 –0.05 0.15 –0.05 0.5 1.8 –0.40 0.90 –0.10 14.0 +260 +35 +35 +25 –2.4 –7.0 dB dB kHz dB mV mV mV mV dB dB V V V V V V V V V V V V V V V V FDG FDost FS max1 FS min1 FS max2 FS min2 FIN1, FIN2: 1 MΩ-input, FDO The difference from the reference voltage, servo on. FDO, FSS = GND FDO, FSS = GND FDO, FSS = VCC FDO, FSS = VCC 3.5 –340 5.0 0 0.8 –0.8 0.8 0 6.5 +340 dB mV V V V V RFo RFGmin FIN1, FIN2: 1 MΩ-input, PH1 = 2 V, f = 200 kHz, RF 0.75 1.00 –15 1.25 V dB SLOFvth SP8vth SLOF SP8: 8 cm mode 0.8 0.8 2.3 2.3 0.8 25 35 45 V V V V V Hz Symbol ICCO VREF No input VR Conditions Ratings min 8 1.2 typ 14 1.5 max 21 1.8 Unit mA V EFBALvth EFBAL FSTAvth ESTA R = 390 kΩ, C = 0.1 µF LASERvth LASER CLK Continued on next page. No. 6125-2/17 LA9251M Continued from preceding page. Parameter [Spindle Amplifier] Offset 12 Offset 8 Offset off Output voltage H12 Output voltage H8 [Sled Amplifier] Offset SLD Offset off SLC no-signal voltage Shock no-signal voltage Shock detection voltage (high) Shock detection voltage (low) DEF detection voltage DEF output voltage (high) DEF output voltage (low) APC reference voltage APC off voltage SLDost SLDof SLCo SCIo SCIvthH SCIvthL DEFvth DEF-H DEF-L LDS LDDof The LDS voltage such that LDD = 1.5 V LDD 120 2.7 SLEQ = VR, the difference from VR SLOF = High SLC SCI, the difference from VR SCI, the difference from VR SCI, the difference from VR The difference between the LF2 voltage when DEF is detected with RF = 1.9 V and the LF2 voltage when RF = 1.9 V. –80 –40 1.0 –40 90 –190 0.20 2.5 0 0 1.5 0 140 –140 0.35 2.9 0 170 2.9 0.5 220 +80 +40 2.0 +40 190 –90 0.50 mV mV V mV mV mV V V V mV V SPD12ost At SPD, the difference from VR, SP8 = 0 V: 12 cm mode SPD8ost SPDof At SPD, the difference from VR, SP8 = 3 V: 8 cm mode At SPD, the difference from VR, SP8 = 3 V: 8 cm mode –40 –40 –40 0.35 0.10 0 0 0 0.50 0.20 +40 +40 +40 0.65 0.30 mV mV mV V V Symbol Conditions Ratings min typ max Unit The difference from offset 12, SPD-H12 SP8 = 0 V, 12 cm mode, CLV = 3 V SPD-H8 The difference from offset 8, SP8 = 3 V, 8 cm mode, CLV = 3 V Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin FIN2 FIN1 E F TB TE– TE TESI SCI TH TA TD– TD JP TO (NC) FD FD– FA FA– FE FE– SP SPG Pickup photodiode (focus, RF) connection Pickup photodiode (focus, RF) connection Pickup photodiode (tracking) connection Pickup photodiode (tracking) connection TE signal DC component input. Pickup photodiode (tracking) connection TE signal gain setting resistor connection. A resistor is connected between this pin and TE. TE signal output TES comparator input. Takes the bandpass filtered TE signal as its input. Shock detection input Tracking gain time constant setting TA amplifier output In conjunction with the TD and VR pins, used to form the tracking phase compensation circuit constant Tracking phase compensation setting Track jump signal amplitude setting Tracking control signal output No connection Focusing control signal output In conjunction with the FD and FA pins, used to form the focusing phase compensation circuit constant In conjunction with the FD- and FA- pins, used to form the focusing phase compensation circuit constant In conjunction with the FA and FE pins, used to form the focusing phase compensation circuit constant FE signal output FE signal gain setting resistor connection. A resistor is connected between this pin and FE. CLV pin input signal inverted output Gain setting resistor connection (12 cm spindle mode) Function Continued on next page. No. 6125-3/17 LA9251M Continued from preceding page. Pin No. 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Pin SP– SPD SLEQ SLD SL– SL+ OSC (NC) SLOF TGRF SP8 EFBAL FSTA LASER (NC) TJP TGL TOFF TES HFL CLV GND RF RF– SLC SLI DEF DRF FSC TBC FSS VCC REFI VR LF2 PH1 BH1 LDD LDS (NC) Function In conjunction with the SPD pin, spindle phase compensation constant connection Spindle control signal output Sled phase compensation constant connection Sled control signal output Sled feed signal input from the microcontroller Sled feed signal input from the microcontroller Oscillator frequency setting No connection Sled servo off control input Tracking servo gain RF level follower function setting Spindle 8 cm/12 cm mode switching control from the DSP E/F balance adjustment signal input from the DSP Focus search control signal input from the DSP Laser on/off control from the DSP No connection Track jump signal input from the DSP Tracking gain control signal input from the DSP Tracking off control signal input from the DSP TES signal output to the DSP Output for the HFL signal that indicates whether the main beam is positioned over pits or mirror CLV error signal input from the DSP GND RF output In conjunction with the RF pin, sets the RF gain and sets the EFM 3T compensation constant Output for control of the data slice level according to the DSP Input for control of the data slice level according to the DSP Disc defect detection output RF level detection output Focus search smoothing capacitor output E/F balance variation range setting Focus search mode setting VCC Reference voltage bypass capacitor connection Reference voltage output Disc defect detection time constant setting RF signal peak hold capacitor connection RF signal bottom hold capacitor connection APC circuit output APC circuit input No connection No. 6125-4/17 LA9251M Pin Circuits Pin No. Pin Internal equivalent circuit VREF 62kΩ 1 2 FIN2 FIN1 2 1 62kΩ 5pF VREF 100kΩ 3 4 E F 4 3 100kΩ 5pF 5pF 5 6 18 22 25 27 50 TB TE– FD– FE– SP– SLEQ SLI VREF 22 18 6 5 50 27 25 10 68kΩ 33kΩ 30kΩ VCC 7 10 TE TH 250Ω 7 GND 8 VCC 8 43 TESI TES 43 200kΩ 1kΩ GND Continued on next page. No. 6125-5/17 LA9251M Continued from preceding page. Pin No. Pin Internal equivalent circuit 9 VCC 50kΩ VREF 4kΩ VCC 10kΩ GND 50kΩ GND VCC 250Ω GND VCC 4kΩ VREF 50kΩ GND 9 41 SCI 41 50kΩ 11 11 12 TA TD– 12 13 13 TD 14 VCC 50kΩ 14 JP 20kΩ 10kΩ 4kΩ VREF 4kΩ VREF TGL 15 VREF 15 TO VCC VREF 100kΩ 250Ω GND 10pF Continued on next page. 40kΩ No. 6125-6/17 LA9251M Continued from preceding page. Pin No. Pin Internal equivalent circuit VCC 17 26 49 FD SPD SLC 49 26 17 250Ω GND 19 VREF 240kΩ VREF 250Ω GND 19 20 21 FA FA– FE VCC 15pF 20 40kΩ 21 VCC 250Ω GND 45 VREF 30kΩ 23 45 SP CLV VCC 10kΩ 10kΩ 250Ω 23 80kΩ GND 80kΩ 23 SP VREF 24 SPG VCC 250Ω 5pF 24 50kΩ GND Continued on next page. No. 6125-7/17 LA9251M Continued from preceding page. Pin No. Pin Internal equivalent circuit 28 VREF 50kΩ 40kΩ VREF 40kΩ VCC 28 29 30 SLD SL– SL+ 250Ω GND 29 30 31 VCC 50kΩ 31 OSC 33 33 35 38 SLOF SP8 LASER 30kΩ GND 34 34 TGRF 36 37 EFBAL FSTA 30kΩ 40 VREF 30kΩ 40 TJP 20kΩ GND 50kΩ 36 VCC VCC 20kΩ 20kΩ 250Ω GND Continued on next page. No. 6125-8/17 LA9251M Continued from preceding page. Pin No. Pin Internal equivalent circuit 42 TOFF 30kΩ 60kΩ 42 VCC GND 53 52 44 51 52 53 HFL DEF DRF FSC VCC 51 44 1kΩ GND 47 VCC 47 60 61 RF PH1 BH1 GND 60 61 48 VREF 5kΩ 3kΩ 48 RF– 5kΩ VREF VCC 5kΩ VREF 10kΩ VREF 54 TBC 1kΩ 54 GND Continued on next page. 15kΩ 10kΩ 250Ω 5kΩ VREF GND No. 6125-9/17 28kΩ VCC LA9251M Continued from preceding page. Pin No. Pin Internal equivalent circuit VCC 50kΩ 55 FSS 55 50kΩ GND 57 20kΩ VCC VCC 57 58 REFI 100Ω 20kΩ GND 58 59 1kΩ GND VCC 5kΩ 50kΩ VR 59 LF2 GND 62 VCC 200Ω 62 LDD GND 180kΩ 63 63 LDS No. 6125-10/17 LA9251M Equivalent Circuit REFI VCC DRF TBC FSC DEF LDD LDS FSS BH1 PH1 LF2 64 NC 63 62 61 60 59 58 57 56 55 54 53 52 51 50 SLI VR 49 SLC FIN2 1 APC RF DET REF SLC RF48 FIN1 2 VCA I/V RF 47 E 3 GND 46 F 4 BAL VCA RF AMP CLV 45 TB 5 HFL 44 TE6 TE TES 43 TE 7 TOFF 42 TESI 8 7 LA9251M T. SERVO &T. LOGIC TGL 41 SCI 9 TJP 40 TH 10 NC 39 TA TD12 LASER LATCH 38 11 FSTA 37 TD REF 13 EFBAL 36 TOFF JP 14 F. SERVO &F. LOGIC SPINDLE SERVO SLED SERVO SP8 35 TO 15 TGRF 34 NC 16 SLOF 33 FD FD- FA- FE- SP- SPG SLEQ SPD SLD SL- FA FE SP SL+ OSC NC 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 A12228 No. 6125-11/17 LA9251M Operation 1. APC (Auto Laser Power Control) This circuit controls the laser power, turning the laser on and off (pin 38). The laser is turned on when the LASER pin is high. 2. RF amplifier (eye pattern output) The pickup photodiode output current input to FIN1 (pin 2) and FIN2 (pin 1) is I/V converted, passed through an AGC circuit, and output from the RFSUM amplifier RF pin (pin 47). The built-in AGC circuit has a variable range of about ±4 dB, and its time constant is set by the external capacitor connected to PH1 (pin 60). The EFM signal bottom level is also controlled, and the response is set by the external capacitor attached to PH1 (pin 60). The center gain for the AGC variable range is set by the value of the resistor between RF (pin 47) and RF- (pin 48). If required, these pins can also be used for EFM signal 3T compensation. 3. SLC (Slice Level Controller) Since the SLC circuit sets the duty of the EFM signal input to the DSP to 50%, the DC level is controlled by integrating the EFMO signal from the DSP. 4. Focus Servo The focus error signal is acquired by detecting the difference between (A + C) and (B + D) from the pickup and the result is output from FE (pin 21). The FE signal gain is set by the value of the resistor between FE and FE– (pin 22). The FA amplifier is the pickup phase compensation amplifier, and its equalization curve is set by an external capacitor and resistor. The FD amplifier provides a phase compensation circuit and a focus search signal synthesis function. A focus search operation is started by switching FSTA (pin 37) from low to high. A ramp waveform is generated by an internal oscillator; this ramp completes in about 560 ms. We recommend holding FSTA (pin 37) high until another focus search is to be performed. Focus is detected (the focus zero cross state) from the focus error signal generated, in effect, by this waveform, and this turns the focus servo on. The ramp waveform amplitude is set by the value of the resistor between FD (pin 17) and FE– (pin 18). Since FSC (pin 53) is used to smooth the focus search ramp waveform, a capacitor is connected between FSC and VR (pin 58). FSS (pin 55) switches the focus search mode; when FSS is shorted to VCC the circuit performs a + search with respect to the reference voltage VR, and when open or shorted to ground, it performs a ± search. 5. Tracking Servo The pickup photodiode output current input to E (pin 3) and F (pin 4) is I/V converted and passed first through a balance adjustment VCA circuit and then through a VCA circuit that performs gain following for the RF AGC circuit. The resulting signal is then output from TE (pin 7). The gain follower function can be turned off by setting TGRF (pin 34) high. The tracking error gain is set by the value of the resistor between TE– (pin 6) and TE (pin 7). The TH amplifier detects either the JP signal or the TGL signal from the DSP, and functions to change the response characteristics of the servo according to the THLD signal generated internally. When a defect is detected, the circuit switches to THLD mode internally. Set DEF (pin 51) low to prevent this. Note that an external bandpass filter that extracts only the shock component from the tracking error signal is formed on SCI (pin 9), and that the gain is automatically increased if this signal is inserted. The TA output (pin 11) has an internal resistor so that a low-pass filter can be formed. The TD amplifier circuit is provided to perform servo loop phase compensation, and its characteristics are set by external RC components. This amplifier also provides a muting function, and the servo can be turned off by setting TOFF (pin 42) high. The TO amplifier provides a function for synthesizing JP pulses, and JP (pin 14) is used to set the JP pulse conditions. The E/F balance adjustment operation is started by switching EFBAL (pin 36) from low to high. After that, the adjustment operation is performed by a clock generated by an internal oscillator, and the adjustment completes in about 500 ms. We recommend holding EFBAL (pin 36) high until the next time an E/F balance operation is to be performed. No. 6125-12/17 LA9251M This adjustment operation must be performed over the disc pit area, not over the disc mirror area. Note that applications must take measures to assure that a stable TE signal is acquired so that track kick operations do not occur during the adjustment. (This includes sled feed commands from the microcontroller.) The E/F balance adjustment precision and adjustment range can be set to be optimal for the pickup characteristics by the value of the resistor between TBC (pin 54) and the reference voltage, VR. 6. Sled Servo The response characteristics are set at SLEQ (pin 27). The amplifier that follows SLEQ has a muting function, and the sled servo can be turned off by setting SLOF (pin 33) high. Sled feed is performed in a current input form at SL– (pin 29) and SL+ (pin 30). In particular, a resistor is connected to a microcontroller output port and the feed gain is set by the value of that resistor. 7. Spindle Servo A servo circuit that holds the disc at a constant linear velocity is formed by the internal servo circuit in conjunction with the DSP. A signal from the DSP is accepted by CLV (pin 45), and output from SPD (pin 26). The phase compensation characteristics are set by SP (pin 23), SP– (pin 25), and SPD. The 12 cm mode amplifier gain is set by a resistor connected between SPG (pin 24) and the reference voltage. In 8 cm mode, this amplifier is internally buffered and not affected by SPG. The circuit switches to 8 cm mode when SP8 (pin 35) is set high. 8. TES and HFL (Traversal signal) The sub-beam signals from the pickup are connected to E (pin 3) and F (pin 4) so that HFL and TES have the phase relationship shown in the figure when the pickup moves from the outside towards the inside of the disc. The TES comparator has a hysteresis of about ±100 mV at the minus polarity of the comparator with respect to the TESI (pin 8) input. An external bandpass filter is formed so that only the required signal is extracted from the TE signal. 2.0 V RFSM 1.4 V 1.0 V HFL TES TE A12224 9. DRF (Optical level decision) A peak hold operation is applied to the EFM signal (RF output) by a capacitor at PH1 (pin 60), and DRF goes high when the RF peak value exceeds about 1.3 V (when VCC = 3.0 V). The PH1 capacitor is related to the settings of both the DRF detection time constant and the RF AGC response. DRF 2.0 V RFSM FE Pickup position Focus A12225 1.3 V 1.0 V No. 6125-13/17 LA9251M 10. Focus Detection The pickup is seen as being in focus when, after a VR + 0.2 V level is detected in the focus error signal S-curve, that S-curve next goes to the VR level. REF + 0.2 V Focus A12226 11. Defect Detection The mirror surface level is held by the capacitor on LF2 (pin 59), and DEF (pin 51) goes high if a drop in the EFM signal (RF output) exceeds about 0.35 V. When DEF goes high, the tracking servo goes to THLD mode. When a defect is detected applications can prevent the LA9251M from going to THLD mode either by setting DEF to low or by setting LF2 (pin 59) low and thus setting the LA9251M not to output DEF. EFM signal (RFSM output) LF2 (pin 59) 0.35 V DEF (pin 51) A12227 12. Oscillator Circuit The oscillator frequency is set by the external RC circuit attached to OSC (pin 31). This oscillator frequency is used as the reference clock for focus search and E/F balance adjustment. No. 6125-14/17 LA9251M Test Circuit 77 0.1µF 100kΩ DRF FSC DEF VCC 0.1µF 47µF 10kΩ 47µF SLI1 76 100kΩ TBC 0.1µF 50 SLI 49 0.33µF 0.47µF REF LF2 REFI 0.1µF VCC LDD TBC LDS NC 64 63 62 61 60 59 58 57 56 55 FSS BH1 PH1 VR 54 53 52 51 SLC RF48 RF 47 GND 46 CLV 45 HFL 44 TES 43 TOFF 42 F2I F2IAC F1IAC EIAC FIAC 65 1MΩ 0.01µF 1MΩ 0.01µF 1MΩ 0.01µF 66 F1I 67 68 EI 69 1MΩ 1MΩ 1MΩ 1MΩ FIN2 1 FIN1 2 E 3 F 4 TB 5 TE6 TE 7 10kΩ 2kΩ 70 1MΩ FI 71 0.01µF 72 100kΩ 0.01µF 20kΩ TESI AC 73 0.01µF TESI 8 SCI 9 LA9251M TGL 41 TJP 40 NC 39 LASER 38 FSTA 37 EFBAL 36 SP8 35 TGRF 34 SLOF 33 0.068µF TH 10 TA 11 TD12 TD 13 JP 14 TO 15 NC 16 REF 68kΩ 68kΩ 2kΩ REF FD- FA- FE- SP- SL- SPG SPD 15kΩ SLEQ SLD SL+ FD FA FE SP OSC 390kΩ 24kΩ 200kΩ 74 SLI- 75 SLI+ A12229 200kΩ S1 30kΩ 100pF 0.1µF 20kΩ REF REF 50kΩ 39kΩ 15kΩ NC 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 No. 6125-15/17 VCC REF 0.01µF 47µF 10µF 10kΩ 4.7µF 0.033µF 51kΩ DRF DEF SLI SLC 0.001µF D-VCC REF VCC 10Ω 0.01µF 47µF 220µF MCN1 100µF 0.022µF GND LASER VCC FSS TBC LDD BH1 PH1 0.01µF LF2 VR NC 64 10pF 10kΩ GND 4pF 20kΩ 63 LDS 62 61 60 59 58 57 REFI 56 55 54 53 FSC GND APC.ADJ GND 0.33µF 0.001µF 1µF GND 100µF GND FSS.SW:Hi +F-SEARCH LOW: +F-SEARCH - 52 51 50 49 VCC RF10kΩ DXX FIN2 APC SLC 48 RF RF DET REF 1 Micro-controller DXX Sample Application Circuit DXX FIN1 2 GND VCA 47 DXX DXX E I/V 46 CS 16M RWC COIN 3 RF AMP TEST1 TEST5 680Ω 1 DEF1 2 TAI VDD 3 PDO 4 VVSS 5 ISET 6 VVDD 7 FR 8 VSS 9 EFMO 10 EFMIN 11 TEST2 12 CLV+ 13 CLV14 V/P 15 HFL LASER 16 TES TOFF TCL JP+ JPPCK FSEQ VDD CONT1 CONT2 CONT3 0.1µF HFL TEST11 CLV GND CQCK 0.1µF 4.2M RES 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 WRQ FSX SQOUT SBCK SFSY PW EFLG 48 SBSY 47 XVSS 46 XIN 45 XOUT 44 XVDD 43 MUTER 42 RVDD 41 10pF 10pF 0.1µF RCHO 40 RVSS 39 LVSS 38 LCH0 37 GND LVDD 36 47µF 0.1µF MUTEL 35 N.C. 34 TEST4 33 CONT4 CONT5 EMPH C2F DOUT TEST3 VDD DXX F BAL 45 VCA 4 TB REF 100kΩ 0.22µF TES 5 44 TE9.1kΩ 6 43 TOFF 22kΩ 56kΩ TE 42 1.2kΩ GND 33kΩ TGL TE 7 220kΩ 2.2kΩ 330Ω 0.01µF 0.033µF TESI 8 7 TJP 0.1µF REF 330µF LA9251M 41 40 NC LC78626KE 100µF GND SCI LA9251M 9 4.7kΩ TH T. SERVO &T. LOGIC 39 0.047µF 0.22µF 10 REF TA 560Ω 56kΩ 0.0033µF 11 LATCH FSTA 38 0.047µF TD- 10kΩ 12 EFBAL 37 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 220kΩ 0.15µF TD VDD GND REF 13 36 SP8 JP TOFF REF 2.2kΩ 14 SPINDLE SERVO SLED SERVO F. SERVO &F. LOGIC 35 TGRF TO P-CP 15 34 SLOF VCC TGRF.Hi TE GAIN DCES NOT FOLLOW RF LEVEL. NC 16 33 FA FD FE SP FA- FE- SL- FD- SP- SPG SPD SLD SL+ 47kΩ 39kΩ 56kΩ 15kΩ 56kΩ P-CP REF 0.47µF 330Ω REF 0.001µF 47µF 1.8kΩ 0.22µF P-CP SLD- 470kΩ SLD+ A12230 No. 6125-16/17 P-CP 470kΩ 0.1µF 0.15µF 0.01µF 0.0047µF 10µF 390kΩ 22kΩ 33kΩ 2.7kΩ 24kΩ 15kΩ 100pF 15kΩ SLEQ 0.0033µF OSC NC 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 LA9251M Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of April, 2000. Specifications and information herein are subject to change without notice. PS No. 6125-17/17