74VHC27MTR

74VHC27 TRIPLE 3-INPUT NOR GATE ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 27 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74VHC27 is an advanced high-speed CMOS TRIPLE 3-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. SOP Table 1: Order Codes d o r t e l o T&R 74VHC27MTR 74VHC27TTR s b O Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. ) (s t c u u d o r P e PACKAGE SOP TSSOP ) s ( ct TSSOP P e t e l o s b O Figure 1: Pin Connection And IEC Logic Symbols November 2004 Rev. 4 1/10 74VHC27 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° SYMBOL 1, 3, 9 2, 4, 10 13, 5, 11 12, 6, 8 7 1A to 3A 1B to 3B 1C to 3C 1Y to 3Y GND VCC 14 NAME AND FUNCTION Data Inputs Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage Table 3: Truth Table A B C L H X X L X H X L X X H Table 4: Absolute Maximum Ratings Symbol VCC t e l o Parameter bs Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Current O ) s ( t c u d o ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) r P e t e l o u d o r P e X : Don‘t Care ) s ( ct Y H L L L Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 - 20 mA ± 20 mA ± 25 mA V ± 50 mA -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 5: Recommended Operating Conditions s b O Symbol VCC Value Unit Supply Voltage 2 to 5.5 V VI Input Voltage 0 to 5.5 V VO Output Voltage Top Operating Temperature dt/dv Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) 1) VIN from 30% to 70% of VCC 2/10 Parameter 0 to VCC V -55 to 125 °C 0 to 100 0 to 20 ns/V 74VHC27 Table 6: DC Specifications Test Condition Symbol VIH Parameter VIL High Level Input Voltage VOH Low Level Input Voltage VOL High Level Output Voltage II Low Level Output Voltage ICC Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 3.0 to 5.5 2.0 3.0 to 5.5 Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 1.5 1.5 0.7VCC 0.7VCC 0.7VCC Max. V 0.5 0.5 0.5 0.3VCC 0.3VCC 0.3VCC 2.0 IO=-50 µA 1.9 2.0 1.9 1.9 3.0 IO=-50 µA 2.9 3.0 2.9 2.9 4.5 IO=-50 µA 4.4 4.5 4.4 4.4 3.0 IO=-4 mA 2.58 2.48 2.4 4.5 IO=-8 mA 3.94 3.8 2.0 IO=50 µA 0.0 0.1 3.0 IO=50 µA 0.0 0.1 4.5 IO=50 µA 0.0 3.0 IO=4 mA 4.5 IO=8 mA 0 to 5.5 VI = 5.5V or GND 5.5 VI = VCC or GND t e l o 0.1 ) s ( ct u d o r P e V V 3.7 0.1 0.1 0.1 0.1 0.1 0.1 0.36 0.44 0.55 0.36 0.44 0.55 ± 0.1 ±1 ±1 µA 2 20 20 µA s b O ) (s Unit t c u V Table 7: AC Electrical Characteristics (Input tr = tf = 3ns) Symbol tPLH tPHL Parameter ol Propagation Delay Time bs O ete od Pr VCC (V) Test Condition CL (pF) Value TA = 25°C Min. -40 to 85°C -55 to 125°C Typ. Max. Min. Max. Min. Max. 3.3(*) 15 6.2 8.8 1.0 10.5 1.0 10.5 3.3(*) 50 8.7 12.3 1.0 14.0 1.0 14.0 (**) 15 4.1 5.9 1.0 7.0 1.0 7.0 5.0(**) 50 5.6 7.9 1.0 9.0 1.0 9.0 5.0 Unit ns (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V 3/10 74VHC27 Table 8: Capacitive Characteristics Test Condition Symbol Value TA = 25°C Parameter Min. Typ. Max. 10 CIN Input Capacitance 6 CPD Power Dissipation Capacitance (note 1) 17 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/3 (per gate) ) s ( ct Figure 3: Test Circuit u d o r P e t e l o ) (s s b O t c u d o r CL =15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) P e Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle) t e l o s b O 4/10 74VHC27 SO-14 MECHANICAL DATA mm. DIM. MIN. inch TYP MAX. MIN. TYP. MAX. A 1.35 1.75 0.053 0.069 A1 0.1 0.25 0.004 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 8.55 8.75 0.337 0.344 E 3.8 4.0 0.150 e ) s ( ct 1.27 r P e 0.050 H 5.8 6.2 0.228 h 0.25 0.50 0.010 L 0.4 1.27 k 0° 8° (s) ddd 0.100 let o s b 0.016 -O 0° u d o 0.157 0.244 0.020 0.050 8° 0.004 t c u d o r P e t e l o s b O 0016019D 5/10 74VHC27 TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 c 0.09 0.20 0.004 D 4.9 5 5.1 0.193 E 6.2 6.4 6.6 0.244 E1 4.3 4.4 4.48 0.169 1 e K 0˚ L 0.45 O ) 0.75 s ( t c 0.201 r P e 0.252 0.260 0.173 0.176 0.0256 BSC 0˚ 8˚ 0.018 0.024 0.030 u d o r P e A2 A 0.60 0.197 bs 8˚ u d o 0.0089 t e l o 0.65 BSC ) s ( ct 0.012 let A1 o s b b O e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 6/10 74VHC27 Tape & Reel SO-14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 ) s ( ct 22.4 0.882 Ao 6.4 6.6 0.252 Bo 9 9.2 0.354 Ko 2.1 2.3 0.082 Po 3.9 4.1 0.153 P 7.9 8.1 0.311 ) (s 0.260 ro P e let so b O du 0.362 0.090 0.161 0.319 t c u d o r P e t e l o s b O 7/10 74VHC27 Tape & Reel TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 ) s ( ct 22.4 0.882 Ao 6.7 6.9 0.264 Bo 5.3 5.5 0.209 Ko 1.6 1.8 0.063 Po 3.9 4.1 0.153 P 7.9 8.1 0.311 ) (s t c u d o r P e t e l o s b O 8/10 MIN. 0.272 ro P e let so b O du 0.217 0.071 0.161 0.319 74VHC27 Table 9: Revision History Date Revision 12-Nov-2004 4 Description of Changes Order Codes Revision - pag. 1. ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 9/10 74VHC27 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. 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