EMIF02-USB05F2

EMIF02-USB05F2 IPAD™ 2 line EMF filter including ESD protection Main application When EMI filtering is ESD sensitive equipment is required: ■ Mobile phones and communication systems ■ Computers, printers and MCU boards Description The EMIF02-USB05F2 is a highly integrated array designed to suppress EMI / RFI noise for USB port filtering. The EMIF02-USB05F2 Flip-Chip packaging means the package size is equal to the die size. Flip-Chip (8 Bumps) Pin configuration (bump side) Additionally, this low-pass filter includes an ESD protection circuitry to prevent damage to the application when subjected to ESD surges up to 15 kV. This device is designed to be fully compatible with USB standards. 2 1 IO4 VCC A O2 I2 B O1 I1 C IO3 GND D Benefits Functional diagram ■ 2 x EMI low-pass filter + 2 line ESD protection ■ 1.5 kΩ pull-up included IO4 ■ High efficiency in EMI filtering IO3 ■ Lead free package ■ Very low PCB space consumption: 1.92 mm x 0.92 mm R1 Input 2 ■ Very thin package: 0.65 mm ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration and wafer level packaging ■ VCC R3 Output2 GND R2 Input 1 Output 1 Order code USB full speed (12 Mbps), OTG compliant Complies with following standards: Part Number Marking EMIF02-USB05F2 GV IEC 61000-4-2 level 4 15 kV (air discharge) 8 kV (contact discharge) MIL STD 883G - Method 3015-7 Class 3 November 2006 TM: IPAD is a trademark of STMicroelectronics Rev 2 1/7 www.st.com 7 Characteristics 1 EMIF02-USB05F2 Characteristics Table 1. Absolute ratings (limiting values) Symbol Parameter and test conditions Maximum junction temperature Tj Unit 125 °C Top Operating temperature range - 40 to + 85 °C Tstg Storage temperature range - 55 to + 150 °C Table 2. Electrical characteristics (Tamb = 25° C) Symbol Parameter VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage Cline Input capacitance per line Symbol Test conditions VBR IR = 1 mA IRM VRM = 5 V per line I VBR VRM IR IRM IRM IR Tolerance Min. VRM VBR Typ. 6 V Max. Unit 9 V 1 µA R1, R2 I = 10 mA ± 5% 33 Ω R3 I = 1 mA ± 5% 1.5 kΩ @0V 30 pF Serial resistance matching 1 % Cline Matching 2/7 Value EMIF02-USB05F2 Figure 1. 0.00 Characteristics S21 (dB) attenuation measurement Figure 2. dB 0.00 Analog crosstalk measurements dB --10.00 --20.00 --10.00 --30.00 --40.00 --50.00 --20.00 --60.00 -70.00 --30.00 -80.00 -90.00 F (Hz) --40.00 100.0k Figure 3. 1.0M 10.0M 100.0M --100.00 100.0k 1.0G ESD response to IEC 61000-4-2 Figure 4. (+15 kV air discharge) on one input (Vin) and on one output (Vout) F (Hz) 1.0M 10.0M 100.0M 1.0G ESD response to IEC 61000-4-2 (-15 kV air discharge) on one input (Vin) and on one output (Vout) V(in) 5 V/d V(in) 5 V/d V(out) 5 V/d V(out) 5 V/d 100 ns/d 100 ns/d Figure 5. Junction capacitance versus reverse voltage applied CLINE (pF) 35 Vosc = 30 mV Vosc=30mV F=1MHz F = 1 MHz Tamb Ta=25=°C25° C 30 25 20 15 10 5 VLINE (V) 0 0 1 2 3 4 5 3/7 Ordering information scheme Figure 6. EMIF02-USB05F2 Aplac model device structure Lbump Rbump A1 D2 bulk A2 R3 B1 Rbump Lbump MODEL = D2 R1 Lbump Rbump B2 Rbump Rbump Lbump Lbump D1 MODEL = D1 MODEL = D1 bulk C1 bulk MODEL = D1 bulk R2 Rbump Lbump Lbump Rbump MODEL = D1 C2 bulk MODEL = D1 Lgn d Rgn d Aplac model parameters Diode D1 BV=7 IBV=1m CJO=Cz_d1 M=0.3333 RS=Rs_d1 VJ=0.6 TT=100n Diode D2 BV=7 IBV=1m CJO=Cz_d2 M=0.3333 RS=Rs_d2 VJ=0.6 TT=100n Ordering information scheme EMIF yy EMI Filter Number of lines Information 3 letters = application 2 digits = version Package F = Flip-Chip x = 2: Leadfree Pitch = 500 µm, Bump = 315 µm 4/7 Cgn d Rbump bulk aplacvar R1 33 aplacvar R2 33 aplacvar R3 1.5k aplacvar Cz_D1 15pF aplacvar Rs_D1 1 aplacvar Cz_D2 300pF aplacvar Rs_D2 0.3 aplacvar Lgnd 100pH aplacvar Rgnd 100m aplacvar Cgnd 0.4pF aplacvar Lbump 50pH aplacvar Rbump 20m 2 bulk MODEL = D1 bulk Figure 7. Lbump MODEL = D1 - xxx zz Fx EMIF02-USB05F2 Package information Figure 8. Flip-Chip package dimensions 650 µm ± 65 315 µm ± 50 500 µm ± 10 1.92 mm ± 50 µm 500 µm ± 10 3 Package information 0.92 mm ± 50 µm Figure 9. Foot print recomendations Figure 10. Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 250 µm recommended, 300 µm max Solder stencil opening: 330 µm E x x z y ww Solder mask opening recommendation: 340 µm min for 315 µm copper pad diameter Figure 11. Flip-Chip tape and reel specification Dot identifying Pin A1 location 3.5 +/- 0.1 xxx yww STE STE xxx yww STE All dimensions in mm xxx yww 8 +/- 0.3 0.73 +/- 0.05 1.75 +/- 0.1 Ø 1.5 +/- 0.1 4 +/- 0.1 4 +/- 0.1 User direction of unreeling 5/7 Ordering information Note: EMIF02-USB05F2 More packing information is available in the application notes AN1235: “Flip-Chip: Package description and recommendations for use” AN1751: “EMI Filters: Recommendations and measurements” In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 4 5 6/7 Ordering information Ordering code Marking Package Weight Base qty Delivery mode EMIF02-USB05F2 GV Flip-Chip 2.7 mg 5000 Tape and reel 7” Revision history Date Revision Changes 14-Mar-2005 1 Initial release. 13-Nov-2006 2 Reformatted to current standards. Modified functional diagram on page 1 to show connections. Updated Aplac model information. EMIF02-USB05F2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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