EMIF06-HMC01F2

EMIF06-HMC01F2 6-line IPAD™, EMI filter including ESD protection Datasheet - production data • Very thin package: 0.65 mm • High efficiency in ESD suppression • High reliability offered by monolithic integration • High reducing of parasitic elements through integration and wafer level packaging ) s ( ct Complies with the following standards u d o • IEC 61000-4-2 level 4 on external pins – 15 kV (air discharge) – 8 kV (contact discharge) r P e Lead-free Flip-Chip package (16 bumps) t e l Application o s b - ODescription • MIL STD 883E - Method 3015-6 Class 3 Figure 1. Pin configuration (ball side) and Basic cell configuration 4 3 2 1 ) s ( ct A u d o B r P e t e l o R10 R11 R12 C D R13 bs Vmmc MMCclk O R14 MMCcmd MMCdat0 MMCdat1 MMCdat2 MMCdat3 Vmmc R2 R3 R4 R5 R6 R7 cmd dat1 dat2 dat3 • 6 lines low-pass-filter • High efficiency in EMI filtering • Very low PCB space consuming: < 4.4 mm2 This is information on a product in full production. Table 1. Ball configuration dat0 Features March 2014 The EMIF06-HMC01F2 is a highly integrated array designed to suppress EMI / RFI noise for High Speed MultiMediaCard™ port filtering. The EMIF06-HMC01F2 Flip-Chip packaging means the package size is equal to the die size. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. clk GND • Lead-free package • High Speed MultiMediaCard™ A1 cmd C1 dat2 A2 clk C2 gnd A3 Vmmc/Vdd C3 MMCdat1 A4 MMCclk C4 MMCdat0 B1 dat1 D1 dat3 B2 dat0 D2 gnd B3 gnd D3 MMCdat3 B4 MMCcmd D4 MMCdat2 TM: IPAD is a trademark of STMicroelectronics. DocID11168 Rev 3 1/8 www.st.com Electrical characteristics 1 EMIF06-HMC01F2 Electrical characteristics Table 2. Absolute maximum ratings (Tamb = 25 °C) Symbol VPP Tj Parameter and test conditions Value Unit Internal pins (A4, B4, C3, C4, D3, D4): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge External pins (A1, A2, A3, B1, B2, C1, D1): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge 15 8 Maximum junction temperature 125 °C - 40 to + 85 °C - 55 to + 150 °C Top Operating temperature range Tstg Storage temperature range 2 2 kV ) s ( ct u d o r P e Figure 2. Electrical characteristics (definitions) Symbol VBR VRM IRM Cline Parameter Breakdown voltage Stand-off voltage Leakage current @ VRM Line capacitance = = = = let o s b O ) VBR VRM s ( t c I V IRM IRM IR VRM VBR u d o r P e t e l o bs O Symbol Test conditions Tolerance Min. Typ. Max. Unit VBR IR = 1 mA IRM VRM = 3 V 0.1 µA Cline @0V 20 pF 14 V R2,R3,R4, I = 50 mA R5, R6, R7 ±20 % 50 Ω R10, R11, I = 50 µA R12, R13 ±30 % 75 kΩ ±30 % 7 kΩ R14 2/8 Table 3. Electrical characteristics (Tamb = 25 °C) I = 200 µA DocID11168 Rev 3 EMIF06-HMC01F2 Electrical characteristics Figure 3. S21 (dB) attenuation measurement Figure 4. Analog crosstalk measurements 0.00 0.00 dB dB - 10.00 - 10.00 - 20.00 - 30.00 - 20.00 - 40.00 - 30.00 - 50.00 - 60.00 - 40.00 - 70.00 - 50.00 - 80.00 100.0k 1.0M 10.0M 100.0M 1.0G 100.0k f/Hz 1.0M 10.0M ) s ( ct 100.0M f/Hz 1.0G Figure 5. ESD response to IEC61000-4-2 Figure 6. ESD response to IEC61000-4-2 (+15 kV air discharge) on one input V(in) and on (-15 kV air discharge) on one input V(in) and on one output (Vout) one output (Vout) Input Input 10V/d 10V/d u d o r P e t e l o Output s b O Output 10V/d 10V/d ) (s ct 200ns/d u d o 200ns/d Figure 7. Junction capacitance versus reverse voltage applied (typical values) e t e l O o s b Pr CLINE (pF) 16 14 Vosc=30mV F=1MHz Ta=25 °C 12 10 8 6 4 2 0 0 1 2 3 4 5 VLINE (V) DocID11168 Rev 3 3/8 8 Aplac model 2 EMIF06-HMC01F2 Aplac model Figure 8. Aplac model device structure R10 R11 R12 Lbump Rbump Vmmc_Vdd R13 Cbump Rsub A3 bulk Vmmc_Vdd R14 Lbump Rbump R2 clk MMCclk MMCclk MMCcmd A4 cmd bulk Lbump R4 MMCdat0 Rbump MMCcmd R5 MMCdat1 Rsub bulk dat1 cmd dat2 bulk R7 Rbump MMCdat0 Cbump Rsub MMCdat3 dat3 Rsub Cbump d o r bulk MMCdat1 bulk dat1 Cbump Rsub MODEL = demif06_gnd C3 bulk Lbump Rbump Cbump Rsub let Rbump bulk Lbump Rbump MMCdat3 bulk b O dat2 Rsub Cbump B1 Rbump Lbump Rsub Cbump bulk dat3 Rgnd bulk C1 Rbump Lbump Rsub Cbump D1 Cgnd Variables R2 50 od r P e R3 50 t e l o bs O R4 50 R5 50 R6 50 R7 50 R10 75k R11 75k R12 75k 4/8 t c u ) (s Figure 9. Aplac model parameters Variables demif06_gnd demif06 Cz 11pF BV=14 BV=14 Cz_gnd 45pF IBV=1m IBV=1m RS_gnd 480m CJO=Cz_gnd CJO=Cz Ls 950pH M=0.31 M=0.31 Rs 150m RS=RS_gnd RS=1 Rbump 100m VJ=0.6 VJ=0.6 Lbump 50pH TT=100n TT=100n Cbump 0.15pF R13 75k Lgnd 50pH R14 7k Rgnd 100m Rsub 100m Cgnd 0.15pF DocID11168 Rev 3 B2 Rbump Lbump bulk Lgnd so Cbump Rsub D3 P e Lbump MMCdat2 D4 A1 uc MODEL = demif06 bulk Lbump Rbump ) s ( t Cbump Rbump Lbump dat0 MODEL = demif06 C4 A2 Rsub MMCdat2 Cbump Rbump Lbump R6 B4 Rbump Lbump bulk dat0 Cbump Rsub Lbump clk R3 Cbump Rsub EMIF06-HMC01F2 3 Ordering information scheme Ordering information scheme Figure 10. Ordering information scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = flip chip x = 2: lead free pitch = 500 µm, bump = 315 µm ) s ( ct 4 Package information u d o r P e t e l o s b O In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. ) (s t c u od 315 µm ± 50 1.89 mm ± 50 µm 650 µm ± 65 195 µm 1.89 mm ± 50 µm 195 µm s b O t e l o 500 µm ± 10 500 µm ± 10 r P e Figure 11. Package dimensions DocID11168 Rev 3 5/8 8 Package information EMIF06-HMC01F2 Figure 12. Footprint Figure 13. Marking Dot, ST logo xx = marking z = packaging location yww = datecode (y = year ww = week) Copper pad Diameter : 250 µm recommended , 300 µm max E Solder stencil opening : 330 µm x x z y ww Solder mask opening recommendation : 340 µm min for 315 µm copper pad diameter Figure 14. Flip chip tape and reel specification Dot identifying Pin A1 location u d o r P e t e l o s b O DocID11168 Rev 3 3.5 +/- 0.1 STE xxx yww 4 +/- 0.1 User direction of unreeling s ( t c 6/8 2.06 xxx yww O ) STE STE xxx yww 8 +/- 0.3 t e l o bs All dimensions in mm r P e u d o 1.75 +/- 0.1 2.06 0.73 +/- 0.05 ) s ( ct Ø 1.5 +/- 0.1 4 +/- 0.1 EMIF06-HMC01F2 5 Ordering information Ordering information Table 4. Ordering information Note: Order code Marking Package Weight Base qty Delivery mode EMIF06-HMC01F2 GH Flip chip 5.3 mg 5000 Tape and reel 7” 6 More informations are available in the application notes: AN1235:"Flip chip: Package description and recommendations for use" ) s ( ct Revision history u d o r P e Table 5. Document revision history t e l o Date Revision Changes 25-Jan-2005 1 Initial release. 27-Nov-2007 2 Updated ECOPACK statement. Updated Figure 10, Figure 11, Figure 12, Figure 13 and Figure 14. Reformatted to current standards. 17-Mar-2014 3 ) (s s b O Updated die size in Figure 11. t c u d o r P e t e l o s b O DocID11168 Rev 3 7/8 8 EMIF06-HMC01F2 ) s ( ct Please Read Carefully: Information in this document is provided solely in connection with ST products. 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