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EMIF08-VID01F2

EMIF08-VID01F2

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    FlipChip20

  • 描述:

    RC (Pi) EMI Filter 2nd Order Low Pass 8 Channel R = 100 Ohms, C = 16pF (Total) 10mA 20-WFBGA, FCBGA

  • 数据手册
  • 价格&库存
EMIF08-VID01F2 数据手册
EMIF08-VID01F2 8 line low capacitance EMI filter and ESD protection Main product characteristics Where EMI filtering in ESD sensitive equipment is required : ■ LCD & camera for mobile phones ■ Computers and printers ■ Communication systems ■ MCU Boards Description The EMIF08-VID01F2 is an 8 line highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The flip chip packaging means the package size is equal to the die size. Lead free flip chip package Pin configuration (Bumps side) This filter includes ESD protection circuitry, which prevents damage to the application when it is subjected to ESD surges up to 15kV. Benefits ■ High efficiency EMI filter (-33 dB @ 900 Mhz) ■ Low line capacitance suitable for high speed data bus ■ Low serial resistance for camera impedance adaptation ■ Optimized PCB space consuming: 1.29 mm x 3.92 mm ■ Very thin package: 0.65 mm ■ Lead free pacakge ■ High efficiency in ESD suppression on inputs pins (IEC61000-4-2 level 4). ■ High reliability offered by monolithic integration ■ High reducing of parasitic elements through integration & wafer level packaging. 12 11 10 I8 I7 9 8 7 6 5 4 3 2 1 I6 I4 I2 G ND GND O8 O7 I5 G ND GND G ND GND O6 I3 O5 O4 O3 A I1 B G ND GND O2 O1 C Complies with following standards: IEC61000-4-2 level 4 input pins level 1 output pins 15 kV 8 kV 2 kV 2 kV (air discharge) (contact discharge (air discharge) (contact discharge MIL STD 883E - Method 3015-6 Class 3 August 2005 Rev 2 1/6 www.st.com 6 EMIF08-VID01F2 1 Electrical characteristics (Tamb = 25°C) Figure 1. Basic cell configuration Input Output R R = 100 Ω Cline = 16 pF typ. @ 3 V Table 1. Absolute ratings (limiting values) Symbol Parameter Value Unit ESD discharge IEC61000-4-2 air discharge ESD discharge IEC61000-4-2 contact discharge 15 8 kV KV Tj Maximum junction temperature 125 °C Top Operating temperature range -40 to +85 °C Tstg Storage temperature range -55 to +150 °C Vpp 1 Electrical characteristics (Tamb = 25°C) Symbol Parameters VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage IR M V VRM VBR Series resistance between Input & Output R Cline Input capacitance per line Symbol 2/6 I Test conditions VBR IR = 1mA IRM VRM = 3V per line RI/O I=10mA Cline VR = 3V DC, 1 MHz Min Typ Max Unit 6 8 10 V 500 nA 100 120 Ω 16 19 pF 80 EMIF08-VID01F2 Figure 2. 1 Electrical characteristics (Tamb = 25°C) S21 (dB) attenuation measurement Figure 3. Analog crosstalk measurement dB dB 0 0 -10 -5 -20 -10 -30 -15 -40 -20 -50 -25 -60 -30 -70 -35 -80 -90 -40 f (Hz) 100k Figure 4. 1M 10M 100M f (Hz) -100 -45 100k 1G Figure 5. ESD response to IEC61000-4-2 (+15 kV air discharge) on one input Vin and one output Vout 1M 10M 100M 1G ESD response to IEC61000-4-2 (- 15 kV air discharge) on one input Vin and one output Vout Input 10V/d Input 10V/d Output 10V/d Output 10V/d 200ns/d 200ns/d Figure 6. Line capacitance versus applied voltage CLINE (pF) 28 26 24 22 20 18 16 14 12 VLINE (V) 10 0 1 2 3 4 5 3/6 EMIF08-VID01F2 2 Ordering information scheme 2 Ordering information scheme EMIF vv - xxx zz F y EMI Filter Number of lines X: resistance (Ohms) Z: capacitance value / 10 pF or Application (3 letters) and Version (2 digits) F: Flip chip 1: Pitch = 500 µm, Bump = 315 µm 2: Lead free Pitch = 500 µm, Bump = 315 µm 3 Package mechanical data flip chip 315 µm +/- 50 650µm +/- 65 435 µm +/-50 500µm +/-50 50 1µ m +/ 50 1.29 mm +/-50µm 250µm +/-50 3.92 mm +/-50µm Figure 7. Marking 365 Copper pad Diameter : 250µm recommended , 300µm max E ® Solder stencil opening : 330µm x x z y w w w w 40 220 4/6 Foot print recommendation 240 365 Dot, ST Logo xx = marking z = packaging location yww = date code Dimensions in µm Figure 8. Solder mask opening recommendation : 340µm min for 300µm copper pad diameter EMIF08-VID01F2 4 Ordering information Figure 9. Flip chip tape and reel specification Dot identifying Pin A1 location f 1.5 +/- 0.1 1.75 +/- 0.1 4 +/- 0.1 5.5 +/- 0.5 xxz ST E yww xxz ST E yww xxz ST E yww 12 +/- 0.3 4 +/- 0.1 0.73 +/- 0.05 User direction of unreeling 4 5 Ordering information Ordering code Marking Package Weight Base qty Delivery mode EMIF08-VID01F2 GS Flip Chip 6.8 mg 5000 7” Tape and reel Revision history Date Revision Changes 13-Jul-2005 1 Initial release. 11-Aug-2005 2 Fonts changed in Figures 7, 8, and 9 5/6 EMIF08-VID01F2 5 Revision history Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 6/6
EMIF08-VID01F2 价格&库存

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