L6605D

L6605 SMART CARD INTERFACE ADVANCE DATA 8 DIFFERENT VPP OUTPUT VOLTAGE LEVELS VPP, VCS RISE AND FALL TIME FULL SPEC WITH ISO/IEC 7816-3 POWER SUPPLY OUTPUT FOR MEMORY CARD (5V/80mA) POWER ON/OFF RESET AUTOMATIC SWITCH-OFF OF ALL FUNCTIONS IF THE REGULAR OPERATION IS ABORTED BY EXTRACTING THE SMART CARD INTERNAL STATUS FAILURE CODING - INSERTION FAILURE CODE - OVERTEMPERATURE FAILURE ANTI-BOUNCING SYSTEM INPUT/OUTPUT LOGIC TTL COMPATIBLE THERMAL PROTECTION DESCRIPTION The L6605 is an IC dedicated as intelligent interface between different types of smart cards and microprocessors. The internal architecture can be shared in a power supply section and in a diagnostic parts. The power supply section can deliver 5V/80mA to BLOCK DIAGRAM MULTIPOWER BCD TECHNOLOGY Powerdip 12+3+3 SO 12+4+4 ORDERING NUMBERS: L6605 L6605D supply the card and VPP/50mA to write the memory inside the card; the VPP voltage can be programmed by means of the 3 serial input bit (see TAB, 1). Table 1: 3 bit DAC CODE CODE 0 0 0 0 1 1 1 1 00 01 10 11 00 01 10 11 VPP 5V 10V 12.5V 13.5V 15V 18V 21V 25V December 1992 1/10 This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. L6605 DESCRIPTION (continued) The diagnostic part allows to monitor failures due to overtemperature or wrong card positioning. The failures are internally coded and readable inside the STATUS REGISTER through the bidirecPIN FUNCTION Pin VS VCSO VPPIN VPPOUT VCSEN SWITCH CS IRQ PRG DATA CK C EXT GND Description Input Power Supply voltage for VCS regulated output and for device supply. Output regulated voltage for card supply; ICSmax = 80mA; overload protected (81 to 200mA) Input power supply for VPP regulated voltage Programmable output regulated voltage for memory card writing; 8 voltage levels are allowed by means of 3 bit DAC. IPPmax = 50mA. (Active Low) V CS supply input enable; Its value is fixed from the µP allowing or not the normal R/W operations on the card. Input signal produced by the reader system indicating that a card has been inserted. Internally, an antibouncing system is provided to avoid multiple switching. Chip select (active low). CS low level indicates an I/O operation request from µP. Interrupt Request (Active low). An IRQ low level indicates that a card insertion/extraction or Failure has occured. Program (Active low). PRG low level enables L6605 to deliver in output the VPPO level set by 3 bit DAC. I/O pin for data exchange between µP and the device. Through this pin flow 3 bit input DAC or 2 bit STATUS REGISTER code. External clock. Pin to connect an external capacitor for antibouncing delay time. 4 pins to ground. tional pin DATA configurated in output. The antibouncing circuitry, active during card insertion only, rejects ripetitive switching-on of the power supply sections. PIN CONNECTIONS (Top view) Powerdip 12+3+3 SO 12+4+4 THERMAL DATA Symbol R th j-amb Parameter Thermal Resistance Junction to Ambient L6605 60 L6605D 50 (*) Unit °C/W (*) Soldered an a 35µ thick 6cm2 P.C. board copper area. 2/10 L6605 ELECTRICAL CHARACTERISTICS (VS = 12V; Tj = 25°C) Symbol VS VCS Parameter Supply Voltage Card Supply Voltage (Logic Inputs onset) Test Condition ICS = 80mA, VS = 12V ICS = 1mA to 80mA VS = 10V to 15V CLOAD min = 5nF; CLOAD max = 20µF ICS ICSS VPPI VPPO Current Supply Card ICS Short Circuit VPP Supply Voltage Programming Voltage VS = 12V 81 VPPO + 2.5V IPP = 50mA; VPPI = 30V; T on < 5ms IPP = 1mA to 50mA VPPI = max. 33V (see note 1) C LOAD min = 5nF C LOAD max = 500nF (see note 2) IPP IPPs ton toff tshadow VSWLOW VSWHIGH tCKON tCKOFF tD tSET-UP1 tHOLD1 tSET-UP2 tHOLD2 tSCK tHCK f SR Output Program. Current IPP Short Circuit VPP, Rise Time VPP, Fall Time Shadow Timing Low Level Switch Input High Level Switch Input Clock ON Time Clock OFF Time Delay Time 1st bit Set-up Time 1st bit Hold Time Data Set-up Time Data Hold Time Clock Set-up Time Clock Hold Time Clock Frequency VPP Slew Rate From rest state to programming state and viceversa Logic inputs onset C LOAD = 50pF, ISINK = 4mA, VL = 0.4V VPPI = 30V 51 C LOAD min = 5nF C LOAD max = 500nF (see note 2) IL = 50mA (see note 1) Cbounce = 0.1µF 2 1 1 250 500 500 500 500 250 250 500 2 1 0.8 Vs-2V -2.5% -5% VDAC VDAC Min. 10 4.85 4.75 Typ. 12 5 5 Max. 15 5.15 5.25 Unit V V V 80 200 33 +2.5% +5% mA mA V V V 50 150 200 200 mA mA µs µs ms V V µs µs ns ns ns ns ns ns ns KHz V/µs tCKON VSTH VSHY TS TH Power ON/OFF Threshold VSTH Hysteresis Thermal Shutdown Thermal Hysteresis 8.5 0.6 180 20 9.5 V V °C °C Note 1: True for values in Tab. 1 only. ; Note 2: Values higher than 500nF are permitted, but the ton, toff timing will be out ISO norm. CIRCUIT OPERATION CARD POWER SUPPLY Regulated voltage to supply the card (5V/80mA). During nominal condition (VS = 12V, ICS = 80mA) the VCS range variation is equal to + 3%. While during line/load variation (VS = 10V to 15V; ICS = 1mA to 80mA) the VCS range is + 5%. An internal circuitry checks the I CS level; the pro- tection block activates an IRQ with the proper failure code when the output current is in 81mA to 200mA range. PROGRAMMING POWER SUPPLY L6605 works in step-down mode by means of the programmed output voltage VPP. 8VPP levels can be selected programming the 3 bit DAC as per Table 1. During nominal conditions (IPP = 50mA; VPPI = 30V) the VPP range variation is equal to 3/10 L6605 ±2.5%; while during line/load variation (IPP = 1mA to 50mA; VPPI = max. 33V) the VPP range is ±5%. An internal circuitry checks the IPP level; the protection block activates an IRQ with the proper failure code when the output current is in 51mA to 150mA range. Under the power ON/OFF threshold value the logic section and the power supply regulators are disabled. LOGIC SECTION L6605 includes a logic circuitry in order to protect, both card and itself. If a failure occours an asynchronous IRQ is sent to the µP; consequently the µP forces low CS signal as I/O request. After CS variation the µP sends also one ”data direction bit” into DATA DIRECTION REGISTER. Direction bit = ”0” Pin DATA is configurated in output and the µP reads the 2 bit STATUS REGISTER content Code 0 1 1st bit No insertion Card Inserted 2nd bit No Failure Failure Failure could be overtemperature over the 2 regulators (VPP, VCS). Direction bit = ”1” Pin DATA is configurated in input to allow the 3 bit DAC loading and than the programming of VPPo output level voltage. (see Table 1). During card insertion only rising edge of switch signal is detected , while during card extraction switch level is detected. In card extraction mode if occours a mechanical switch bouncing, which causes a pulse on SWITCH input pin with duration t ≥ 50µs the L6605 will have the 1st Status Register content equal to ”0” and 1 ms tshadow timing like during card insertion mode. Bouncing on SWITCH pin with duration T