ST2129B
2-bit dual supply level translator without direction control pin, pushpull output
Datasheet - production data
ESD performance on all pins: ±2 kV HBM
Small package and footprint
QFN8 1.4 x 1.2 x 0.55 mm
Applications
Low-voltage system level translation
Mobile phones and other mobile devices
Description
QFN8
(1.4 x 1.2 x 0.55 mm)
The ST2129B device is a 2-bit dual supply level
translator which provides the level shifting
capability to allow data transfer in a multi-voltage
system. Externally applied voltages, VCC and VL,
set the logic levels on either side of the device.
Its architecture allows bi-directional level
translation without a control pin.
Features
45 MHz: 90 Mbps (max.) data rate
at VL = 1.8 V, VCC = 3.3 V
Bi-directional level translation without direction
control pin
Wide voltage range (VL ≤ VCC):
– VL ranges from 1.65 to 3.6 V
– VCC ranges from VL to 5.5 V
Totem pole driving
The ST2129B device accepts VL from 1.65 to
3.6 V and VCC from VL to 5.5 V, making it ideal for
data transfer between low-voltage ASICs/PLD
and higher voltage systems. This device has
a tristate output mode which can be used to
disable all I/Os.
5.5 V tolerant Enable pin
Table 1. Device summary
Order code
Package
Packing
Package topmark
ST2129BQTR
QFN8 (1.4 x 1.2 x 0.55 mm)
Tape and reel (3000 parts per reel)
1A
February 2013
This is information on a product in full production.
DocID023308 Rev 2
1/21
www.st.com
1
Contents
ST2129B
Contents
1
2
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Device block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
Supplementary notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
Driver requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Load driving capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1
DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2
AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
DocID023308 Rev 2
ST2129B
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
AC characteristics - test conditions: VL = 1.65 - 1.95 V . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
AC characteristics - test conditions: VL = 2.3 - 2.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
AC characteristics - test conditions: VL = 3.0 - 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Test circuit switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Waveform symbol value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Mechanical data for QFN8 (1.4 x 1.2 x 0.55 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 18
QFN8 carrier tape dimensions - 8 mm width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
DocID023308 Rev 2
3/21
List of figures
ST2129B
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
4/21
Pin connection (top through view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Logic block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ST2129BQTR block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Waveform - propagation delay (f = 1 MHz, 50% duty cycle). . . . . . . . . . . . . . . . . . . . . . . . 16
Waveform - output enable and disable time (f = 1 MHz, 50% duty cycle) . . . . . . . . . . . . . 16
Package outline for QFN8 (1.4 x 1.2 x 0.55 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 18
QFN8 carrier tape - 8 mm width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
QFN8 reel for carrier tape - 8 mm width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DocID023308 Rev 2
ST2129B
Pin settings
1
Pin settings
1.1
Pin connection
Figure 1. Pin connection (top through view)
$0Y
1.2
Pin description
Table 2. Pin description
Pin number
Symbol
Name and function
1
VL
Supply voltage
2
I/OVL1
Data input/output
3
I/OVL2
Data input/output
4
GND
Ground
5
OE
Output enable
6
I/OVCC2
Data input/output
7
I/OVCC1
Data input/output
8
VCC
Supply voltage
DocID023308 Rev 2
5/21
Logic diagram
2
ST2129B
Logic diagram
Figure 2. Logic block diagram
Device block diagrams
Figure 3. ST2129BQTR block diagram
9&&
2(
,29/
N
,29&&
9/
RQHVKRWFLUFXLWEORFN
N
ST2149
$09
1. When OE is LOW, all I/Os are in high-impedance mode.
2. ST2129BQTR has 2 channels. For simplicity, the above diagram shows only 1 channel.
6/21
DocID023308 Rev 2
ST2129B
Logic diagram
Figure 4. Application block diagram
DocID023308 Rev 2
7/21
Supplementary notes
ST2129B
3
Supplementary notes
3.1
Driver requirement
For proper operation, the driver from each side of the device must have the capability to
source and sink a minimum of 1 mA current. The device architecture requires the driver to
source/sink maximum current of (VCC/4) mA to/from the weak 4 k output buffer.
3.2
Load driving capability
To support the architecture that allows level translation without direction pin, the one-shot
transistor is turned ON only during state transition at the output side. After the one-shot
transistor is turned OFF, only the 4 k resistor maintains the output logic state. So,
a resistive load or pull-up resistor less than 50 k is not recommended for proper operation.
3.3
Truth table
Table 3. Truth table
Enable
Bi-directional input/output
OE
I/OVCC
I/OVL
H(1)
H(2)
H(1)
H(1)
L
L
L
Z(3)
Z(3)
1. High level VL power supply referred.
2. High level VCC power supply referred.
3. Z = high impedance.
8/21
DocID023308 Rev 2
ST2129B
4
Maximum ratings
Maximum ratings
Stressing the device above the rating listed inTable 4: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in Table 5: Recommended
operating conditions of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Table 4. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VL
Supply voltage
-0.3 to 4.6
V
VCC
Supply voltage
-0.3 to 6.5
V
VOE
DC control input voltage
-0.3 to 6.5
V
-0.3 to VL + 0.3
V
-0.3 to VCC + 0.3
V
DC input diode current
-20
mA
II/OVL
DC output current
±25
mA
II/OVCC
DC output current
±25
mA
ISCTOUT
Short-circuit duration, continuous
40
mA
Power dissipation
500
mW
-65 to 150
°C
Lead temperature (10 seconds)
300
°C
Electrostatic discharge protection (HBM)
±2
kV
VI/OVL
VI/OVCC
IIK
PD
TSTG
TL
ESD
DC I/OVL input voltage (OE = GND or VL)
DC I/OVCC input voltage (OE = GND or VL)
Storage temperature
Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VL
Supply voltage
1.65
–
3.6
V
VCC
Supply voltage
VL
–
5.5
V
VOE
Input voltage (OE output enable pin, VL power
supply referred)
0
–
3.6
V
I/OVL voltage
0
–
VL
V
I/OVCC voltage
0
–
VCC
V
VI/OVL
VI/OVCC
TOP
Operating temperature
-40
–
85
°C
dt/dV
Input rise and fall time
0
–
1
ns/V
DocID023308 Rev 2
9/21
Electrical characteristics
ST2129B
5
Electrical characteristics
5.1
DC characteristics
Over recommended operating conditions unless otherwise noted. All typical values are at
TA = 25 °C.
Table 6. DC characteristics
Value
Symbol
Parameter
VL
VCC
Test
conditions
TA = 25 °C
-40 to 85 °C
Unit
Min.
Typ.
Max.
Min.
Max.
0.8 VL
–
–
0.8 VL
–
V
–
–
0.2 VL
–
0.2 VL
V
VIHL
High-level
input
voltage
(I/OVL)
1.65 to 3.6 VL to 5.5
VILL
Low-level
input
voltage
(I/OVL)
1.65 to 3.6 VL to 5.5
VIHC
High-level
input
voltage
(I/OVCC)
1.65 to 3.6 VL to 5.5
0.8 VCC
–
–
0.8 VCC
–
V
VILC
Low-level
input
voltage
(I/OVCC)
1.65 to 3.6 VL to 5.5
–
–
0.2 VCC
–
0.2 VCC
V
0.8 VL
–
V
0.2 VL
V
VIH-OE
High-level
input
1.65 to 3.6 VL to 5.5
voltage (OE)
0.8 VL
–
–
VIL-OE
Low-level
1.65 to 3.6 VL to 5.5
input
voltage (OE)
–
–
0.2 VL
VOHL
High-level
output
voltage
(I/OVL)
1.65 to 3.6 VL to 5.5
IO = -60 µA
VL - 0.4
–
–
VL - 0.4
–
V
VOLL
Low-level
output
voltage
(I/OVL)
1.65 to 3.6 VL to 5.5
IO = +60 µA
–
–
0.4
–
0.4
V
VOHC
High-level
output
voltage
(I/OVCC)
1.65 to 3.6 VL to 5.5
IO = -60 µA
VCC - 0.4
–
–
VCC - 0.4
–
V
10/21
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–
ST2129B
Electrical characteristics
Table 6. DC characteristics (continued)
Value
Symbol
VOLC
IOE
Parameter
Low-level
output
voltage
(I/OVCC)
VL
VCC
Test
conditions
TA = 25 °C
-40 to 85 °C
Min.
Typ.
Max.
Min.
Max.
Unit
1.65 to 3.6 VL to 5.5
IO = +60 µA
–
–
0.4
–
0.4
V
Control
input
1.65 to 3.6 VL to 5.5
leakage
current (OE)
VI = GND or
VL
–
–
0.1
–
1
µA
OE = GND
I/OVL = high
I/OVCC = low
–
–
0.1
–
1
µA
OE = GND
I/OVL = low
I/OVCC = high
–
–
0.1
–
1
µA
Highimpedance
leakage
IIO_LKG
current
(I/OVL,
I/OVCC)
1.65 to 3.6 VL to 5.5
Quiescent
supply
current VCC
1.65 to 3.6 VL to 5.5
OE = VL
–-
–
3.5
–
4.5
µA
Quiescent
supply
current VL
1.65 to 3.6 VL to 5.5
OE = VL
–
–
0.1
–
1
µA
IZ-VCC
Highimpedance
quiescent
supply
current VCC
1.65 to 3.6 VL to 5.5
OE = GND
I/O = Hi-Z
–
–
0.1
–
1
µA
IZ-VL
Highimpedance
quiescent
supply
current VL
1.65 to 3.6 VL to 5.5
OE = GND
I/O = Hi-Z
–
–
0.1
–
1
µA
IQVCC
IQVL
DocID023308 Rev 2
11/21
Electrical characteristics
5.2
ST2129B
AC characteristics
Load CL = 15 pF; driver tr = tf ≤ 6 ns over temperature range -40 °C to 85 °C.
Table 7. AC characteristics - test conditions: VL = 1.65 - 1.95 V
Symbol
VCC =
VL - 1.95 V
Parameter
VCC =
2.3 - 2.7 V
VCC =
3.0 - 3.6 V
VCC =
4.5 - 5.5 V
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tRVcc
Rise time I/OVcc
-
5.2
-
3.2
-
2.4
-
1.8
ns
tFVcc
Fall time I/OVcc
-
3.2
-
1.5
-
1.3
-
1.2
ns
tRVL
Rise time I/OVL
-
3.3
-
3.3
-
3.3
-
3.3
ns
tFVL
Fall time I/OVL
-
1.5
-
1.4
-
1.4
-
1.3
ns
Propagation delay time
tI/OVL-Vcc
I/OVL-LH to I/OVcc-LH
tPLH
-
7.6
-
5.8
-
5.0
-
4.4
ns
I/OVL-HL to I/OVcc-HL
tPHL
-
4.6
-
3.9
-
3.9
-
3.5
ns
I/OVcc-LH to I/OVL-LH
tPLH
-
7.1
-
6.6
-
4.8
-
4.6
ns
I/OVcc-HL to I/OVL-HL
tPHL
-
5.3
-
5.1
-
4.3
-
4.1
ns
Propagation delay time
tI/OVcc-VL
tPZL
Output enable time tPZL
-
28
-
28
-
28
-
28
ns
tPZH
Output enable time tPZH
-
90
-
90
-
90
-
90
ns
tPLZ
Output disable time tPLZ
120
-
120
-
120
-
120
ns
tPHZ
Output disable time tPHZ
80
-
60
-
50
-
50
ns
DR
Data rate(1)
-
90
-
90
-
90
-
Mbps
56
1. Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period
of input I/O signal; input I/O signal is at 50% duty cycle and output I/O signal duty cycle deviation is less than
50% ± 10%.
12/21
DocID023308 Rev 2
ST2129B
Electrical characteristics
Table 8. AC characteristics - test conditions: VL = 2.3 - 2.7 V
Symbol
VCC = VL - 2.7 V
Parameter
VCC = 3.0 - 3.6 V
VCC = 4.5 - 5.5 V
Unit
Min.
Max.
Min.
Max.
Min.
Max.
tRVcc
Rise time I/OVcc
-
3.3
-
2.2
-
1.7
ns
tFVcc
Fall time I/OVcc
-
1.7
-
1.6
-
1.4
ns
tRVL
Rise time I/OVL
-
2.2
-
2.2
-
1.9
ns
tFVL
Fall time I/OVL
-
1.3
-
1.2
-
1.2
ns
Propagation delay time
tI/OVL-Vcc I/OVL-LH to I/OVcc-LH
tPLH
-
4.8
-
4.3
-
3.9
ns
I/OVL-HL to I/OVcc-HL
tPHL
-
3.7
-
3.3
-
2.9
ns
tI/OVcc-VL I/OVcc-LH to I/OVL-LH
tPLH
-
3.9
-
3.5
-
3.5
ns
I/OVcc-HL to I/OVL-HL
tPHL
-
3.6
-
3.5
-
3.4
ns
Propagation delay time
tPZL
Output enable time tPZL
-
25
-
25
-
25
ns
tPZH
Output enable time tPZH
-
100
-
100
-
70
ns
tPLZ
Output disable time tPLZ
-
90
-
90
-
90
ns
tPHZ
Output disable time tPHZ
-
50
-
50
-
50
ns
DR
Data rate(1)
90
-
136
-
158
-
Mbps
1. Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of
input I/O signal; input I/O signal is at 50% duty cycle and output I/O signal duty cycle deviation is less than
50% ± 10%.
DocID023308 Rev 2
13/21
Electrical characteristics
ST2129B
Table 9. AC characteristics - test conditions: VL = 3.0 - 3.6 V
VCC = VL - 3.6 V
Symbol
VCC = 4.5 - 5.5 V
Parameter
Unit
Min.
Max.
Min.
Max.
tRVcc
Rise time I/OVcc
-
2.1
-
1.7
ns
tFVcc
Fall time I/OVcc
-
1.3
-
1.3
ns
tRVL
Rise time I/OVL
-
1.6
-
1.5
ns
tFVL
Fall time I/OVL
-
1.1
-
1.1
ns
Propagation delay time
tI/OVL-Vcc
I/OVL-LH to I/OVcc-LH
tPLH
-
4.1
-
4.1
ns
I/OVL-HL to I/OVcc-HL
tPHL
-
2.9
-
2.6
ns
I/OVcc-LH to I/OVL-LH
tPLH
-
4.0
-
4.0
ns
I/OVcc-HL to I/OVL-HL
tPHL
-
2.6
-
2.5
ns
Propagation delay time
tI/OVcc-VL
tPZL
Output enable time tPZL
-
15
-
15
ns
tPZH
Output enable time tPZH
-
70
-
15
ns
tPLZ
Output disable time tPLZ
-
70
-
70
ns
tPHZ
Output disable time tPHZ
-
50
-
50
ns
DR
Data rate(1)
144
-
186
-
Mbps
1. Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period
of input I/O signal; input I/O signal is at 50% duty cycle and output I/O signal duty cycle deviation is less than
50% ± 10%.
14/21
DocID023308 Rev 2
ST2129B
6
Test circuit
Test circuit
Figure 5. Test circuit
VL
VCC
VL
Pulse
generator
V CC
OPEN
GND
R1
D.U.T
CL
AM04080V1
Table 10. Test circuit switches
Test
CL
R1
Switch
tPLH, tPHL
15 pF
20 k
Open
tr, tf
15 pF
20 k
Open
tPZL, tPLZ
15 pF
20 k
VL or VCC
tPZH, tPHZ
15 pF
20 k
GND
Table 11. Waveform symbol value
Driving I/OVL
Driving I/OVCC
Symbol
1.65 V ≤ VL ≤ VCC
≤ 2.5 V
3.3 V ≤ VL ≤ VCC
≤ 5.5 V
1.65 V ≤ VL ≤ VCC
≤ 2.5 V
3.3 V ≤ VL≤ VCC
≤ 5.5 V
VIH
VL
VL
VCC
VCC
VIM
50% VL
50% VL
50% VCC
50% VCC
VOM
50% VCC
50% VCC
50% VL
50% VL
DocID023308 Rev 2
15/21
Test circuit
ST2129B
Figure 6. Waveform - propagation delay (f = 1 MHz, 50% duty cycle)
Figure 7. Waveform - output enable and disable time (f = 1 MHz, 50% duty cycle)
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ST2129B
7
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
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Package mechanical data
ST2129B
Figure 8. Package outline for QFN8 (1.4 x 1.2 x 0.55 mm) - 0.40 mm pitch
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1. Dimension b applies to metallized terminal and is measured between 0.10 and 0.20 mm from the terminal
tip. If the terminal has the optional radius on the other end of the terminal. Dimension b should not be
measured in that radius area.
2. Applied only for terminals.
3. Bilateral coplanarity zone applies to the exposed heatsink slug as well as the terminals.
4. Dimensions and tolerancing conform to ASME Y14.5M - 1994.
Table 12. Mechanical data for QFN8 (1.4 x 1.2 x 0.55 mm) - 0.40 mm pitch
Dimensions (mm)
Symbol
Note
Min.
Nom.
Max.
A
0.50
0.55
0.60
A1
0.00
-
0.05
b
0.15
0.20
0.25
(1)
B
0
-
12°
(2)
e
0.40 BSC
N
8
L
0.25
0.30
(3)
0.35
1. Dimension b applies to the metallized terminal and is measured between 0.10 and 0.20 mm from the
terminal tip. If the terminal has the optional radius on the other end of the terminal. Dimension b should not
be measured in that radius area.
2. All dimensions are in millimeters, B is in degrees.
3. N is the total number of terminals.
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Package mechanical data
Figure 9. QFN8 carrier tape - 8 mm width
1. Measured from centerline of sprocket hole to centerline of pocket.
2. Cumulative tolerance of 10 sprocket holes is ± 0.20.
3. Measured from centerline of sprocket hole to centerline of pocket.
4. Other material available.
5. Typical SR of form tape max. 10° /SR.
6. All dimensions are in millimeters unless otherwise stated.
Table 13. QFN8 carrier tape dimensions - 8 mm width
Carrier tape
Symbol
Ao
Bo
Ko
F
P1
W
Dimensions
1.52 ± 0.05
1.52 ± 0.05
0.73 ± 0.05
3.50 ± 0.05
4.00 ± 0.10
8.00 ± 0.10
Figure 10. QFN8 reel for carrier tape - 8 mm width
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Revision history
8
ST2129B
Revision history
Table 14. Document revision history
Date
Revision
14-Jun-2012
1
Initial release.
2
Updated document status (production data).
Updated Description (corrected RPNs), Description moved to page 1.
Added carrier tape (Figure 9 and Table 13).
Minor corrections throughout document.
18-Feb-2013
20/21
Changes
DocID023308 Rev 2
ST2129B
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