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ST2149BQTR

ST2149BQTR

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    UQFN12_2X1.7MM

  • 描述:

    IC LEVEL TRANSLATOR 4BIT 12QFN

  • 数据手册
  • 价格&库存
ST2149BQTR 数据手册
ST2149B 4-bit dual supply level translator without direction control pin Datasheet − production data Features ■ 45 MHz: 90 Mbps (max.) data rate at VL = 1.8 V, VCC = 3.3 V ■ Bi-directional level translation without direction control pin ■ Wide voltage range (VL ≤ VCC): – VL ranges from 1.65 to 3.6 V – VCC ranges from 1.65 to 5.5 V ■ Totem-pole driving ■ 5.5 V tolerant enable pin ■ ESD performance on all pins: ±2 kV HBM ■ Small package and footprint QFN12 (1.7 x 2.0 mm) QFN12 (1.7 x 2.0 mm) Table 1. Order code Applications ■ Low-voltage system level translation ■ Mobile phones and other mobile devices June 2012 This is information on a product in full production. Device summary Package Packing Tape and reel (3000 QFN12 ST2149BQTR (1.7 x 2.0 mm) parts per reel) Doc ID 023310 Rev 1 Package topmark 49A 1/23 www.st.com 1 Contents ST2149B Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Device block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 5 Supplementary notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 Driver requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 Load driving capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/23 Doc ID 023310 Rev 1 ST2149B List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC characteristics - test conditions: VL = 1.65 - 1.95 V . . . . . . . . . . . . . . . . . . . . . . . AC characteristics - test conditions: VL = 2.3 - 2.7 V . . . . . . . . . . . . . . . . . . . . . . . . . AC characteristics - test conditions: VL = 3.0 - 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . Test circuit switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Waveform symbol value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mechanical data for QFN12 (1.7 x 2.0 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . Carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Doc ID 023310 Rev 1 .....1 .....6 .....9 . . . . 10 . . . . 10 . . . . 11 . . . . 13 . . . . 14 . . . . 15 . . . . 16 . . . . 16 . . . . 19 . . . . 20 . . . . 21 . . . . 22 3/23 List of figures ST2149B List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. 4/23 Pin connection (top through view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Logic block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 ST2149BQTR block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Waveform - propagation delay (f = 1 MHz, 50% duty cycle). . . . . . . . . . . . . . . . . . . . . . . . 17 Waveform - output enable and disable time (f = 1 MHz, 50% duty cycle) . . . . . . . . . . . . . 17 Package outline for QFN12 (1.7 x 2.0 mm) - 0.40 mm pitch. . . . . . . . . . . . . . . . . . . . . . . . 18 Carrier tape for QFN12 (1.7 x 2.0 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Reel information for QFN12 (1.7 x 2.0 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . . . . . 21 Doc ID 023310 Rev 1 ST2149B 1 Description Description The ST2149B is a 4-bit dual supply level translator which provides the level shifting capability to allow data transfer in a multi-voltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of the device. Its architecture allows bi-directional level translation without a control pin. The ST2149B accepts VL from 1.65 to 3.6 V and VCC from VL to 5.5 V, making it ideal for data transfer between low-voltage ASICs/PLD and higher voltage systems. This device has a tri-state output mode which can be used to disable all I/Os. Doc ID 023310 Rev 1 5/23 Pin settings ST2149B 2 Pin settings 2.1 Pin connection Figure 1. Pin connection (top through view) /% 6## 6,  )/6,   )/6,    )/6## )/6,   )/6## )/6,   )/6##    ) / 6## '.$ !-6 2.2 Pin description Table 2. 6/23 Pin description Pin number Symbol Name and function 1 VL Supply voltage 2 I/OVL1 Data input/output 3 I/OVL2 Data input/output 4 I/OVL3 Data input/output 5 I/OVL4 Data input/output 6 GND Ground 7 I/OVCC4 Data input/output 8 I/OVCC3 Data input/output 9 I/OVCC2 Data input/output 10 I/OVCC1 Data input/output 11 VCC Supply voltage 12 OE Output enable Doc ID 023310 Rev 1 ST2149B 3 Logic diagram Logic diagram Figure 2. Logic block diagram Device block diagrams Figure 3. ST2149BQTR block diagram 6## /% )/6, K )/6## 6, ONE SHOTCIRCUITBLOCK K ST2149 !-6 1. When OE is LOW, all I/Os are in high-impedance mode. 2. ST2149BQTR has 4 channels. For simplicity, the above diagram shows only 1 channel. Doc ID 023310 Rev 1 7/23 Logic diagram ST2149B Figure 4. Application block diagram 6, 6## 6 , 6, SYSTEM CONTROLLER )/6, )/ 6, )/ 6, )/ 6, /% 6## )/ 6## )/6## )/ 6## )/6## 6## SYSTEM CONTROLLER !-6 8/23 Doc ID 023310 Rev 1 ST2149B Supplementary notes 4 Supplementary notes 4.1 Driver requirement For proper operation, the driver from each side of the device must be able to source and sink a minimum of 1 mA current. The device architecture requires the driver to source/sink maximum current of (VCC/4) mA to/from the weak 4 kΩ output buffer. 4.2 Load driving capability To support the architecture that allows level translation without the direction pin, the one-shot transistor is turned ON only during state transition at the output side. After the one-shot transistor is turned OFF, only the 4 kΩ resistor maintains the output logic state. So, a resistive load or pull-up resistor less than 50 kΩ is not recommended for proper operation. 4.3 Truth table Table 3. Truth table Enable Bi-directional input/output OE I/OVCC I/OVL H(1) H(2) H(1) H(1) L L L Z(3) Z(3) 1. High level VL power supply referred. 2. High level VCC power supply referred. 3. Z = high impedance. Doc ID 023310 Rev 1 9/23 Maximum ratings 5 ST2149B Maximum ratings Stressing the device above the ratings listed inTable 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in Recommended operating conditions of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. Absolute maximum ratings Symbol Parameter Value Unit VL Supply voltage -0.3 to 4.6 V VCC Supply voltage -0.3 to 6.5 V VOE DC control input voltage -0.3 to 6.5 V -0.3 to VL + 0.3 V -0.3 to VCC + 0.3 V DC input diode current -20 mA II/OVL DC output current ±25 mA II/OVCC DC output current ±25 mA ISCTOUT Short-circuit duration, continuous 40 mA Power dissipation 500 mW -65 to 150 °C Lead temperature (10 seconds) 300 °C Electrostatic discharge protection (HBM) ±2 kV VI/OVL VI/OVCC IIK PD TSTG TL ESD DC I/OVL input voltage (OE = GND or VL) DC I/OVCC input voltage (OE = GND or VL) Storage temperature Recommended operating conditions Table 5. Recommended operating conditions Symbol Min. Typ. Max. Unit VL Supply voltage 1.65 – 3.6 V VCC Supply voltage VL – 5.5 V VOE Input voltage (OE output enable pin, VL power supply referred) 0 – 3.6 V I/OVL voltage 0 – VL V I/OVCC voltage 0 – VCC V VI/OVL VI/OVCC 10/23 Parameter TOP Operating temperature -40 – 85 °C dt/dV Input rise and fall time 0 – 1 ns/V Doc ID 023310 Rev 1 ST2149B 6 Electrical characteristics Electrical characteristics Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25 °C. Table 6. DC characteristics Value Symbol Parameter VL VCC Test conditions TA = 25 °C -40 to 85 °C Unit Min. Typ. Max. Min. Max. 0.8 VL – – 0.8 VL – V – – 0.2 VL – 0.2 VL V VIHL High-level input voltage (I/OVL) 1.65 to 3.6 VL to 5.5 VILL Low-level input voltage (I/OVL) 1.65 to 3.6 VL to 5.5 VIHC High-level input voltage (I/OVCC) 1.65 to 3.6 VL to 5.5 0.8 VCC – – 0.8 VCC – V VILC Low-level input voltage (I/OVCC) 1.65 to 3.6 VL to 5.5 – – 0.2 VCC – 0.2 VCC V VIH-OE High-level input voltage (OE) 1.65 to 3.6 VL to 5.5 0.8 VL – – 0.8 VL – V VIL-OE Low-level input voltage (OE) 1.65 to 3.6 VL to 5.5 – – 0.2 VL 0.2 VL V VOHL High-level output voltage (I/OVL) 1.65 to 3.6 VL to 5.5 IO = -60 µA VL - 0.4 – – VL - 0.4 – V VOLL Low-level output voltage (I/OVL) 1.65 to 3.6 VL to 5.5 IO = +60 µA – – 0.4 – 0.4 V VOHC High-level output voltage (I/OVCC) 1.65 to 3.6 VL to 5.5 IO = -60 µA VCC - 0.4 – – VCC 0.4 – V VOLC Low-level output voltage (I/OVCC) 1.65 to 3.6 VL to 5.5 IO = +60 µA – – 0.4 – 0.4 V Control input leakage 1.65 to 3.6 VL to 5.5 current (OE) VI = GND or VL – – 0.1 – 1 µA IOE Doc ID 023310 Rev 1 – 11/23 Electrical characteristics Table 6. ST2149B DC characteristics (continued) Value Symbol Parameter High impedance leakage IIO_LKG current (I/OVL, I/OVCC) VL VCC 1.65 to 3.6 VL to 5.5 Test conditions TA = 25 °C -40 to 85 °C Unit Min. Typ. Max. Min. Max. OE = GND I/OVL = high I/OVCC = low – – 0.1 – 1 µA OE = GND I/OVL = low I/OVCC = high – – 0.1 – 1 µA Quiescent supply current VCC 1.65 to 3.6 VL to 5.5 OE = VL –- – 7 – 9 µA Quiescent supply current VL 1.65 to 3.6 VL to 5.5 OE = VL – – 0.1 – 1 µA IZ-VCC High impedance quiescent supply current VCC 1.65 to 3.6 VL to 5.5 OE = GND I/O = Hi-Z – – 0.1 – 1 µA IZ-VL High impedance quiescent supply current VL 1.65 to 3.6 VL to 5.5 OE = GND I/O = Hi-Z – – 0.1 – 1 µA IQVCC IQVL 12/23 Doc ID 023310 Rev 1 ST2149B Electrical characteristics AC characteristics Load CL = 15 pF; driver tr = tf ≤ 6 ns over temperature range -40 °C to 85 °C. Table 7. AC characteristics - test conditions: VL = 1.65 - 1.95 V VCC = VL-1.95 V VCC = 2.3-2.7 V Symbol VCC = 3.0-3.6 V VCC = 4.5-5.5 V Parameter Unit Min. Max. Min. Max. Min. Max. Min. Max. tRVcc Rise time I/OVcc - 5.2 - 3.2 - 2.4 - 1.8 ns tFVcc Fall time I/OVcc - 3.2 - 1.5 - 1.3 - 1.2 ns tRVL Rise time I/OVL - 3.3 - 3.3 - 3.3 - 3.3 ns tFVL Fall time I/OVL - 1.5 - 1.4 - 1.4 - 1.3 ns tI/OVL-Vcc I/OVL-LH to I/OVcc-LH tPLH - 7.6 - 5.8 - 5.0 - 4.4 ns I/OVL-HL to I/OVcc-HL tPHL - 4.6 - 3.9 - 3.9 - 3.5 ns tI/OVcc-VL I/OVcc-LH to I/OVL-LH tPLH - 7.1 - 6.6 - 4.8 - 4.6 ns I/OVcc-HL to I/OVL-HL tPHL - 5.3 - 5.1 - 4.3 - 4.1 ns tPZL Output enable time tPZL - 28 - 28 - 28 - 28 ns tPZH Output enable time tPZH - 90 - 90 - 90 - 90 ns tPLZ Output disable time tPLZ 120 - 120 - 120 - 120 ns tPHZ Output disable time tPHZ 80 - 60 - 50 - 50 ns - 90 - 90 - 90 - Mbps Propagation delay time Propagation delay time DR Data rate(1) 56 1. Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of input I/O signal; input I/O signal is at 50% duty cycle and output I/O signal duty cycle deviation is less than 50% ± 10%. Doc ID 023310 Rev 1 13/23 Electrical characteristics Table 8. Symbol ST2149B AC characteristics - test conditions: VL = 2.3 - 2.7 V Parameter VCC = VL-2.7 V VCC = 3.0-3.6 V Min. Max. Min. Max. Min. Max. VCC = 4.5-5.5 V Unit tRVcc Rise time I/OVcc - 3.3 - 2.2 - 1.7 ns tFVcc Fall time I/OVcc - 1.7 - 1.6 - 1.4 ns tRVL Rise time I/OVL - 2.2 - 2.2 - 1.9 ns tFVL Fall time I/OVL - 1.3 - 1.2 - 1.2 ns Propagation delay time tI/OVL-Vcc I/OVL-LH to I/OVcc-LH tPLH - 4.8 - 4.3 - 3.9 ns I/OVL-HL to I/OVcc-HL tPHL - 3.7 - 3.3 - 2.9 ns tI/OVcc-VL I/OVcc-LH to I/OVL-LH tPLH - 3.9 - 3.5 - 3.5 ns I/OVcc-HL to I/OVL-HL tPHL - 3.6 - 3.5 - 3.4 ns Propagation delay time tPZL Output enable time tPZL - 25 - 25 - 25 ns tPZH Output enable time tPZH - 100 - 100 - 70 ns tPLZ Output disable time tPLZ - 90 - 90 - 90 ns tPHZ Output disable time tPHZ - 50 - 50 - 50 ns DR Data rate(1) 90 - 136 - 158 - Mbps 1. Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of input I/O signal; input I/O signal is at 50% duty cycle and output I/O signal duty cycle deviation is less than 50% ± 10%. 14/23 Doc ID 023310 Rev 1 ST2149B Table 9. Electrical characteristics AC characteristics - test conditions: VL = 3.0 - 3.6 V VCC = VL-3.6 V Symbol VCC = 4.5-5.5 V Parameter Unit Min. Max. Min. Max. tRVcc Rise time I/OVcc - 2.1 - 1.7 ns tFVcc Fall time I/OVcc - 1.3 - 1.3 ns tRVL Rise time I/OVL - 1.6 - 1.5 ns tFVL Fall time I/OVL - 1.1 - 1.1 ns Propagation delay time tI/OVL-Vcc I/OVL-LH to I/OVcc-LH tPLH - 4.1 - 4.1 ns I/OVL-HL to I/OVcc-HL tPHL - 2.9 - 2.6 ns I/OVcc-LH to I/OVL-LH tPLH - 4.0 - 4.0 ns I/OVcc-HL to I/OVL-HL tPHL - 2.6 - 2.5 ns Propagation delay time tI/OVcc-VL tPZL Output enable time tPZL - 15 - 15 ns tPZH Output enable time tPZH - 70 - 15 ns tPLZ Output disable time tPLZ - 70 - 70 ns tPHZ Output disable time tPHZ - 50 - 50 ns DR Data rate(1) 144 - 186 - Mbps 1. Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of input I/O signal; input I/O signal is at 50% duty cycle and output I/O signal duty cycle deviation is less than 50% ± 10%. Doc ID 023310 Rev 1 15/23 Test circuit 7 ST2149B Test circuit Figure 5. Test circuit VL VCC VL Pulse generator V CC OPEN GND R1 D.U.T CL AM04080V1 Table 10. Test circuit switches Test CL R1 Switch tPLH, tPHL 15 pF 20 kΩ Open tr, tf 15 pF 20 kΩ Open tPZL, tPLZ 15 pF 20 kΩ VL or VCC tPZH, tPHZ 15 pF 20 kΩ GND Table 11. Waveform symbol value Driving I/OVL 16/23 Driving I/OVCC Symbol 1.65 V ≤ VL ≤ VCC ≤ 2.5 V 3.3 V ≤ VL ≤ VCC ≤ 5.5 V 1.65 V ≤ VL ≤ VCC ≤ 2.5 V 3.3 V ≤ VL≤ VCC ≤ 5.5 V VIH VL VL VCC VCC VIM 50% VL 50% VL 50% VCC 50% VCC VOM 50% VCC 50% VCC 50% VL 50% VL Doc ID 023310 Rev 1 ST2149B Test circuit Figure 6. Waveform - propagation delay (f = 1 MHz, 50% duty cycle) Figure 7. Waveform - output enable and disable time (f = 1 MHz, 50% duty cycle) Doc ID 023310 Rev 1 17/23 Package mechanical data 8 ST2149B Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 8. Package outline for QFN12 (1.7 x 2.0 mm) - 0.40 mm pitch $  ! " ).$%8!2%! $ X% % AAA # X AAA # X 4/06)%7 CCC # # !  EEE #  3%!4 ).' 0,!.% .X 3)$% 6)%7 ! .X , ).$%8!2%! $ X% E  .X B BBB # ! " DDD # 0). )$  X  "/44/-6)%7 !- 18/23 Doc ID 023310 Rev 1 ST2149B Package mechanical data Table 12. Mechanical data for QFN12 (1.7 x 2.0 mm) - 0.40 mm pitch Dimensions Symbol mm. Min. Nom. Max. A 0.45 0.50 0.55 A1 0.00 0.02 0.05 b 0.15 0.20 0.25 D 1.70 BSC E 2.00 BSC e 0.40 BSC L 0.35 0.45 aaa 0.05 bbb 0.07 ccc 0.10 ddd 0.05 eee 0.08 N 12 ND 1 NE 0.55 5 Notes (1),(2) LF part No. - LF DWG. No. B-2888 1. Dimensioning and tolerance conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. 3. N is the total number of terminals. 4. The location of the terminal #1 identifier and terminal numbering convention conforms to JEDEC publication 95 SPP-002. 5. ND and NE refer to the number of terminals on the D and E side respectively. 6. Dimension b applies to the metallized terminal. If the terminal has the optional radius on the other end of the terminal, dimension b should not be measured in that radius area. 7. Coplanarity applies to the terminals and all other bottom surface metallization. 8. NJ in the variation code refers to a package which is not currently JEDEC registered. Doc ID 023310 Rev 1 19/23 Package mechanical data Figure 9. ST2149B Carrier tape for QFN12 (1.7 x 2.0 mm) - 0.40 mm pitch 0  › 4 › $  Œ  2 MAX 0 › % › 9 $ ŒMIN & #, " 2 TYP    + % 7 ' 9 0 3ECTION9 9 ! !- 1. Measured from centerline of sprocket hole to centerline of pocket. 2. Cumulative tolerance of sprocket holes is ± 0.20. 3. Measured from centerline of sprocket hole to centerline of pocket. 4. Other material available. 5. All dimensions are in millimeters unless otherwise stated. Table 13. 20/23 Carrier tape dimensions Symbol Dimensions A0 1.80 ± 0.05 B0 2.25 ± 0.05 K0 0.60 ± 0.05 F 3.50 ± 0.05 P1 4.00 ± 0.1 D1 1.00 min. T 0.25 ± 0.03 G 0.75 min. E2 6.25 min. W 8.00 + 0.3 / -0.1 Doc ID 023310 Rev 1 ST2149B Package mechanical data Figure 10. Reel information for QFN12 (1.7 x 2.0 mm) - 0.40 mm pitch EINT 2 E 2 2 !- Table 14. Reel dimensions mm R1 R2 R3 Reel 7″ 13 180 60 Doc ID 023310 Rev 1 21/23 Revision history 9 ST2149B Revision history Table 15. 22/23 Document revision history Date Revision 19-Jun-2012 1 Changes Initial release. Doc ID 023310 Rev 1 ST2149B Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 023310 Rev 1 23/23
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