STB36NM60N

STB36NM60N Automotive-grade N-channel 600 V, 0.093 Ω, 29 A, MDmesh™ II Power MOSFET in a D²PAK package Datasheet — production data Features Order code TAB VDS @ STB36NM60N TJmax RDS(on) max. 650 V 0.105 Ω PTOT ID 29 A 210 W • Designed for automotive applications and AEC-Q101 qualified 3 1 • 100% avalanche tested D2 PAK • Low input capacitance and gate charge • Low gate input resistance Figure 1. Internal schematic diagram Applications • Switching applications '7$% Description This device is an N-channel Power MOSFET developed using the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. * 6 $0Y Table 1. Device summary Order code Marking Packages Packaging STB36NM60N 36NM60N D2PAK Tape and reel June 2015 This is information on a product in full production. DocID16099 Rev 5 1/15 www.st.com Contents STB36NM60N Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 .............................................. 8 DocID16099 Rev 5 STB36NM60N 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 600 V VGS Gate-source voltage ± 25 V ID Drain current (continuous) at TC = 25 °C 29 A ID Drain current (continuous) at TC = 100 °C 18 A IDM (1) Drain current (pulsed) 116 A PTOT Total dissipation at TC = 25 °C 210 W IAR Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max.) 10.5 A EAS Single pulse avalanche energy (Starting Tj = 25 °C, ID = IAR, VDD = 50 V.) 345 mJ 15 V/ns -55 to 150 °C 150 °C Value Unit 0.6 °C/W 30 °C/W dv/dt (2) Peak diode recovery voltage slope Tstg Tj Storage temperature Max. operating juncion temperature 1. Pulse width limited by safe operating area. 2. ISD ≤ 29 A, di/dt ≤ 400 A/µs, V DS peak ≤ V(BR)DSS, VDD = 80% V (BR)DSS Table 3. Thermal data Symbol Rthj-case Parameter Thermal resistance junction-case max Rthj-pcb(1) Thermal resistance junction-pcb max 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec DocID16099 Rev 5 3/15 15 Electrical characteristics 2 STB36NM60N Electrical characteristics (Tcase =25°C unless otherwise specified) Table 4. On /off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 IDSS VDS = 600 V Zero gate voltage drain current (VGS = 0) VDS = 600 V, TC=125 °C IGSS Gate-body leakage current (VDS = 0) Min. Typ. Max. Unit 600 V 10 µA 100 µA ±100 nA 3 4 V 0.093 0.105 Ω Min. Typ. Max. Unit VDS = 100 V, f = 1 MHz, VGS = 0 - 2722 173 1.75 - pF pF pF VGS = 0, VDS = 0 to 480 V - 458 - pF VGS = ± 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance 2 VGS = 10 V, ID = 14.5 A Table 5. Dynamic Symbol Ciss Coss Crss Parameter Test conditions Input capacitance Output capacitance Reverse transfer capacitance Coss eq.(1) Equivalent Output capacitance Rg Gate input resistance f =1MHz Gate DC Bias=0 Test signal level = 20 mV open drain - 2.9 - Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 480 V, ID = 29 A, VGS = 10 V (see Figure 15) - 83.6 14 45 - nC nC nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDS 4/15 DocID16099 Rev 5 STB36NM60N Electrical characteristics Table 6. Switching times Symbol td(on) tr Parameter Test conditions Turn-on delay time VDD = 300 V, ID = 14.5 A, RG = 4.7 Ω, VGS = 10 V (see Figure 14) Rise time td(off) tf Turn-off-delay time Fall time Min. Typ. Max Unit - 17 - ns - 34 - ns - 106 - ns - 67 - ns Min Typ. Table 7. Source drain diode Symbol ISD ISDM (1) VSD (2) trr Parameter Test conditions Max Unit Source-drain current - 29 A Source-drain current (pulsed) - 116 A - 1.6 V Forward on voltage ISD = 29 A, VGS = 0 Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 29 A, di/dt = 100 A/µs VDD= 60 V (see Figure 19) ISD = 29 A, di/dt = 100 A/µs VDD= 60 V Tj = 150 °C (see Figure 19) - 408 ns - 8 µC - 39 A - 480 ns - 10 µC - 42 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300µs, duty cycle 1.5% DocID16099 Rev 5 5/15 15 Electrical characteristics 2.1 STB36NM60N Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM09017v1 ID (A) Tj=150°C Tc=25°C Single pulse D S( on ) O Li per m at ite io d ni by n m this ax a R rea is 100 10 10µs 100µs 1ms 10ms 1 0.1 0.1 10 1 100 VDS(V) Figure 4. Output characteristics Figure 5. Transfer characteristics AM09020v1 ID (A) AM09021v1 ID (A) VGS=10V 80 80 VDS=20V 70 70 60 60 6V 50 50 40 40 30 30 20 20 5V 10 0 0 5 10 15 20 30 25 10 Figure 6. Gate charge vs gate-source voltage AM09022v1 VDS (V) VGS (V) 10 VDS VDD=480V ID=29A 0 0 VDS(V) 500 2 4 8 6 VGS(V) Figure 7. Static drain-source on-resistance AM09023v1 RDS(on) (Ω) VGS=10V 0.098 0.096 8 400 6 300 4 200 2 100 0.094 0.092 0 0 6/15 20 40 60 80 0 Qg(nC) 0.090 0.088 0.086 0 DocID16099 Rev 5 5 10 15 20 25 30 ID(A) STB36NM60N Electrical characteristics Figure 8. Capacitance variations Figure 9. Output capacitance stored energy AM09024v1 C (pF) AM09025v1 Eoss (µJ) 10000 Ciss 2 1000 Coss 100 1 10 1 0.1 Crss 1 100 10 Figure 10. Normalized gate threshold voltage vs temperature AM09026v1 VGS(th) (norm) 0 0 VDS(V) 200 100 300 400 500 VDS(V) Figure 11. Normalized on-resistance vs temperature AM09027v1 RDS(on) (norm) ID=250µA 2.1 1.10 ID=14.5A 1.9 1.7 1.00 1.5 1.3 0.90 1.1 0.80 0.9 0.70 -50 -25 0.5 -50 -25 0.7 0 25 50 75 100 TJ(°C) Figure 12. Normalized V(BR)DSS vs temperature AM00897v1 V(BR)DSS (norm) ID=1mA 0 25 50 TJ(°C) 75 100 Figure 13. Source-drain diode forward characteristics AM09039v1 VSD (V) 1.07 1.6 1.05 1.4 1.03 1.2 1.01 1.0 0.99 0.8 0.97 0.6 0.95 0.4 TJ=-50°C TJ=25°C TJ=150°C 0.93 -50 -25 0 25 50 75 100 TJ(°C) DocID16099 Rev 5 0 5 10 15 20 25 ISD(A) 7/15 15 Test circuits 3 STB36NM60N Test circuits Figure 14. Switching times test circuit for resistive load Figure 15. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 17. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/15 0 DocID16099 Rev 5 10% AM01473v1 STB36NM60N 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 20. D²PAK (TO-263) type A package outline DocID16099 Rev 5 9/15 15 Package information STB36NM60N Table 8. D²PAK (TO-263) type A mechanical data mm Dim. Min. Typ. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10 E1 8.50 8.70 8.90 E2 6.85 7.05 7.25 10.40 e 2.54 e1 4.88 5.28 H 15 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 10/15 Max. 0.4 0° 8° DocID16099 Rev 5 STB36NM60N Package information Figure 21. D²PAK recommended footprint(a) )RRWSULQW a. All dimension are in millimeters DocID16099 Rev 5 11/15 15 Packing information 5 STB36NM60N Packing information Figure 22. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 K0 For machine ref. only including draft and radii concentric around B0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 12/15 DocID16099 Rev 5 STB36NM60N Packing information Figure 23. Reel T REEL DIMENSIONS 40mm min. Access hole At slot location B D C N A Full radius G measured at hub Tape slot in core for tape start 25 mm min. width AM08851v2 Table 9. D²PAK (TO-263) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID16099 Rev 5 Min. Max. 330 13.2 26.4 30.4 13/15 15 Revision history 6 STB36NM60N Revision history Table 10. Document revision history Date Revision 16-Nov-2009 1 First release. 22-Jun-2011 2 Document status promoted from preliminary data to datasheet. 10-May-2012 3 Figure 6: Gate charge vs gate-source voltage has been modified. Minor text changes. 19-Sep-2014 4 – Modified: title and features – Minor text changes 5 – Updated title, internal schematic diagram and features in cover page. – Updated Table 3: Thermal data and Figure 12: Normalized V(BR)DSS vs temperature. – Updated Section 4: Package information. – Minor text changes. 09-Jun-2015 14/15 Changes DocID16099 Rev 5 STB36NM60N IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID16099 Rev 5 15/15 15