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STH160N4LF6-2

STH160N4LF6-2

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    H²PAK-2

  • 描述:

    MOSFETN-CH40V120AH2PAK-2

  • 数据手册
  • 价格&库存
STH160N4LF6-2 数据手册
STH160N4LF6-2 N-channel 40 V, 0.0018 mΩ typ., 120 A, STripFET™ VI DeepGATE™ Power MOSFET in a H²PAK-2 package Datasheet - production data Features Order code VDS STH160N4LF6-2 40 V TAB RDS(on) max 0.0022 Ω ID PTOT 120 A 150 W • RDS(on) * Qg industry benchmark 2 • Extremely low on-resistance RDS(on) 3 • Logic level drive 1 • High avalanche ruggedness H2PAK-2 • 100% avalanche tested Applications Figure 1. Internal schematic diagram • Switching applications Description 'Ć 7$% This device is an N-channel Power MOSFET developed using the 6th generation of STripFET™ DeepGATE™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages. *Ć  6Ć Ć $0Y Table 1. Device summary Order code Marking Package Packaging STH160N4LF6-2 160N4LF6 H2PAK-2 Tape and reel April 2014 This is information on a product in full production. DocID026265 Rev 1 1/17 www.st.com Contents STH160N4LF6-2 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 .............................................. 8 DocID026265 Rev 1 STH160N4LF6-2 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 40 V VGS Gate-source voltage ± 20 V ID Drain current (continuous) at TC = 25 °C 120 A ID Drain current (continuous) at TC = 100 °C 100 A Drain current (pulsed) 480 A Total dissipation at TC = 25 °C 150 W Derating factor 1 W/°C IAS Avalanche current, repetitive or not-repetitive (pulse width limited by Tjmax) 60 A EAS Single pulse avalanche energy 323 mJ Tstg Storage temperature -55 to 175 °C Value Unit Thermal resistance junction-case max 1.0 °C/W Thermal resistance junction-ambient max 62.5 °C/W IDM (1) PTOT Tj Operating junction temperature 1. Pulse width is limited by safe operating area Table 3. Thermal resistance Symbol Rthj-case Rthj-a Parameter DocID026265 Rev 1 3/17 17 Electrical characteristics 2 STH160N4LF6-2 Electrical characteristics (TCASE = 25 °C unless otherwise specified). Table 4. Static Symbol V(BR)DSS IDSS Parameter Test conditions Drain-source breakdown voltage (VGS= 0) Zero gate voltage drain current (VGS = 0) ID = 250 μA Min. Typ. 40 - VDS = 20 V - VDS = 20 V, Tc = 125 °C Max. Unit V 1 μA 10 μA ±100 nA Gate body leakage current (VDS = 0) VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 μA Static drain-source on-resistance VGS = 10 V, ID = 60 A 0.0018 0.0022 Ω RDS(on) VGS = 5 V, ID = 60 A 0.002 0.0027 Ω Min Typ. Max. Unit - 8130 - pF - 770 - pF - 670 - pF - 181 - nC - 22 - nC - 46 - nC Min. Typ. Max. Unit - 20 - ns - 131 - ns - 205 - ns - 116 - ns IGSS 1 - V Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 20 V, f=1 MHz, VGS = 0 V VDD = 20 V, ID = 60 A VGS = 10 V (see Figure 14) Table 6. Switching on/off (inductive load) Symbol td(on) tr td(off) tf 4/17 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 20 V, ID = 60 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15) Fall time DocID026265 Rev 1 STH160N4LF6-2 Electrical characteristics Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 120 A ISDM(1) Source-drain current (pulsed) - 480 A VSD(2) Forward on voltage ISD = 120 A, VGS = 0 - 0.97 V trr Reverse recovery time - 57 ns Qrr Reverse recovery charge - 53 nC IRRM Reverse recovery current ISD = 120 A, di/dt = 100 A/μs, VDD = 32 V (see Figure 17) - 1.86 A ISD 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5% DocID026265 Rev 1 5/17 17 Electrical characteristics 2.1 STH160N4LF6-2 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM15854v1 ID (A) Tj=175°C Tc=25°C Single pulse is e a n) ar i s DS(o th in ax R ion y m at er d b Op ite Lim 100 100µs 1ms 10 10ms 1 0.1 0.1 10 1 VDS(V) Figure 4. Output characteristics Figure 5. Transfer characteristics AM15797v1 ID (A) VGS= 6, 7, 8, 9, 10 V VGS= 5 V VDS= 0.6V 250 250 VGS= 4 V 200 200 150 150 100 100 50 50 VGS= 3 V 0 0 0.2 0.4 0.6 AM15799v1 VGS (V) VDD=20V ID=60V 12 0 0 0.8 VDS(V) Figure 6. Gate charge vs gate-source voltage 8 1.70 6 1.65 4 1.60 2 1.55 100 150 200 Qg(nC) 8 VGS(V) AM15800v1 RDS(on) (mΩ) 1.75 50 6 Figure 7. Static drain-source on-resistance 10 0 4 2 VGS=10V 1.80 0 6/17 AM15798v1 ID (A) 1.50 10 DocID026265 Rev 1 20 30 40 50 60 ID(A) STH160N4LF6-2 Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized V(BR)DSS vs temperature AM15801v1 C (pF) AM15802v1 V(BR)DSS (norm) 1.1 ID=250 µA 1.08 1.06 10000 Ciss 1.04 1.02 1 1000 Coss Crss 0.98 0.96 0.94 100 0 8 24 16 32 VDS(V) Figure 10. Normalized gate threshold voltage vs temperature AM15803v1 VGS(th) (norm) 0.92 -75 -25 25 75 125 TJ(°C) Figure 11. Normalized on-resistance vs temperature AM15804v1 RDS(on) (norm) 1.2 2 ID=250 µA 1 VGS=10V 1.5 0.8 0.6 1 0.4 0.5 0.2 0 -75 -25 25 75 125 TJ(°C) 0 -75 -25 25 75 125 TJ(°C) Figure 12. Source-drain diode forward characteristics AM15805v1 VSD (V) TJ=-55°C 0.9 TJ=25°C 0.85 0.8 0.75 0.7 TJ=150°C 0.65 0.6 0.55 0.5 0 20 40 60 80 ISD(A) DocID026265 Rev 1 7/17 17 Test circuits 3 STH160N4LF6-2 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 16. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/17 0 DocID026265 Rev 1 10% AM01473v1 STH160N4LF6-2 Test circuits Figure 19. Gate charge waveform Id Vds Vgs Vgs(th) Qgs1 Qgs2 Qgd DocID026265 Rev 1 9/17 17 Package mechanical data 4 STH160N4LF6-2 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/17 DocID026265 Rev 1 STH160N4LF6-2 Package mechanical data Figure 20. H²PAK-2 drawing 8159712_C DocID026265 Rev 1 11/17 17 Package mechanical data STH160N4LF6-2 Table 8. H²PAK-2 mechanical data mm Dim. Min. Typ. Max. A 4.30 4.80 A1 0.03 0.20 C 1.17 1.37 e 4.98 5.18 E 0.50 0.90 F 0.78 0.85 H 10.00 10.40 H1 7.40 7.80 - 12/17 L 15.30 15.80 L1 1.27 1.40 L2 4.93 5.23 L3 6.85 7.25 L4 1.5 1.7 M 2.6 2.9 R 0.20 0.60 V 0° 8° DocID026265 Rev 1 STH160N4LF6-2 Package mechanical data Figure 21. H²PAK-2 recommended footprint (dimensions are in mm) 8159712_C DocID026265 Rev 1 13/17 17 Packaging mechanical data 5 STH160N4LF6-2 Packaging mechanical data Figure 22. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F K0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v2 14/17 DocID026265 Rev 1 STH160N4LF6-2 Packaging mechanical data Figure 23. Reel T REEL DIMENSIONS 40mm min. Access hole At sl ot location B D C N A Full radius G measured at hub Tape slot in core for tape start 25 mm min. width AM08851v2 Table 9. H²PAK-2 leads tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID026265 Rev 1 Min. Max. 330 13.2 26.4 30.4 15/17 17 Revision history 6 STH160N4LF6-2 Revision history Table 10. Document revision history 16/17 Date Revision 24-Apr-2014 1 Changes First release. DocID026265 Rev 1 STH160N4LF6-2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2014 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com DocID026265 Rev 1 17/17 17
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