STH80N10LF7-2AG

STH80N10LF7-2AG Datasheet Automotive-grade N-channel 100 V, 7 mΩ typ., 80 A, STripFET™ F7 Power MOSFET in an H2PAK-2 package Features TAB 2 Order code VDS RDS(on) max. ID PTOT STH80N10LF7-2AG 100 V 10 mΩ 80 A 110 W 3 1 H2PAK-2 D(TAB) • • AEC-Q101 qualified Among the lowest RDS(on) on the market • • Excellent FoM (figure of merit) Low Crss/Ciss ratio for EMI immunity • High avalanche ruggedness Applications • Switching applications G(1) Description S(2, 3) DTG1S23NZ This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Product status link STH80N10LF7-2AG Product summary Order code STH80N10LF7-2AG Marking 80N10LF7 Package H²PAK-2 Packing Tape and reel DS11708 - Rev 2 - January 2019 For further information contact your local STMicroelectronics sales office. www.st.com STH80N10LF7-2AG Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 100 V VGS Gate-source voltage ±20 V Drain current (continuous) at Tcase = 25 °C 80 Drain current (continuous) at Tcase = 100 °C 54 IDM (1) Drain current (pulsed) 320 A PTOT Total dissipation at Tcase = 25 °C 110 W Single pulse avalanche energy 108 mJ -55 to 175 °C ID EAS (2) Tstg Storage temperature range Tj Operating junction temperature range A 1. Pulse width is limited by safe operating area. 2. Tj ≤ 25 °C, ID=80 A, VDD= 60 V Table 2. Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter Value Thermal resistance junction-case 1.36 Thermal resistance junction-pcb 35 Unit °C/W 1. When mounted on a 1-inch² FR-4 board, 2oz Cu. DS11708 - Rev 2 page 2/14 STH80N10LF7-2AG Electrical characteristics 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified). Table 3. Static Symbol V(BR)DSS Parameter Test conditions Min. VGS = 0 V, ID = 1 mA Drain-source breakdown voltage Typ. Max. Unit 100 V VGS = 0 V, VDS = 100 V 1 (1) IDSS Zero gate voltage drain current VGS = 0 V, VDS = 100 V µA 10 Tj= 125 °C IGSS Gate-body leakage current VDS = 0 V, VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance ±100 nA 2.5 V 1 VGS = 10 V, ID = 40 A 7 10 VGS = 4.5 V, ID = 40 A 9 16 mΩ 1. Defined by design, not subject to production test. Table 4. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 V VDD = 50 V, ID = 80 A, VGS = 4.5 V (see Figure 13. Test circuit for gate charge behavior) Min. Typ. Max. Unit - 2900 - - 1077 - - 99 - - 28.3 - - 10.4 - - 14.3 - pF nC Table 5. Switching times Symbol Parameter td(on) Turn-on delay time - 14.7 - Rise time VDD = 50 V, ID = 40 A RG = 4.7 Ω, VGS = 10 V (see Figure 12. Test Turn-off delay time circuit for resistive load switching times) - 33 - - 69.3 - Fall time - 21 - tr td(off) tf DS11708 - Rev 2 Test conditions Min. Typ. Max. Unit ns page 3/14 STH80N10LF7-2AG Electrical characteristics Table 6. Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 80 A ISDM (1) Source-drain current (pulsed) - 320 A VSD (2) Forward on voltage - 1.5 V trr VGS = 0 V, ISD = 80 A Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 80 A, di/dt = 100 A/µs, VDD = 80 V (see Figure 14. Test circuit for inductive load switching and diode recovery times) - 55.7 ns - 79.6 nC - 2.9 A 1. Pulse width limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DS11708 - Rev 2 page 4/14 STH80N10LF7-2AG Electrical characteristics curves 2.1 Electrical characteristics curves Figure 1. Safe operating area ID in this area is (A) Operation limited by R DS(on) Figure 2. Thermal impedance K GIPG300520160948SOA GIPG300520161008ZTH 10 2 t p =10 µs 0.05 10 1 10 -1 t p =100 µs 10 0 t p =1 ms T j ≤175 °C T c = 25°C single pulse 10 -1 10 -1 10 0 10 1 t p =10 ms V DS (V) 10 2 10 -2 10 -5 Figure 3. Output characteristics ID (A) V GS =6, 7, 8, 9, 10 V GIPG300520161010OCH 250 10 -1 t p (s) ID (A) GIPG300520161010TCH V DS =6 V 150 V GS =4 V 100 100 V GS =3.5 V 50 50 V GS =3 V 1 2 3 4 5 V DS (V) Figure 5. Gate charge vs gate-source voltage V GS (V) GIPG300520161011QVG 10 0 0 4 5 6 V GS (V) GIPG300520160942RID V GS =4.5 V 9 4 7 2 6 24 3 R DS(on) (mΩ) 8 16 2 Figure 6. Static drain-source on-resistance 6 8 1 10 V DS = 50 V I D = 80 A 8 DS11708 - Rev 2 10 -2 200 150 0 0 10 -3 Figure 4. Transfer characteristics 250 V GS =5 V 200 0 0 10 -4 32 40 48 Q g (nC) 5 0 V GS =10 V 20 40 60 80 I D (A) page 5/14 STH80N10LF7-2AG Electrical characteristics curves Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations C (pF) GIPG300520161010CVR V GS(th) (norm.) C ISS 10 1.2 3 I D =250 µA 1.0 C OSS 0.8 f = 1 MHz 10 2 0.6 0.4 C RSS 10 1 0 GIPG300520160945VTH 20 40 60 80 100 0.2 -75 V DS (V) 25 V (BR)DSS (norm.) GIPG300520160944RON V GS = 10 V I D = 40 A 1.8 125 175 T j (°C) GIPG300520160945BDV 1.06 2.2 75 Figure 10. Normalized V(BR)DSS vs temperature Figure 9. Normalized on-resistance vs temperature R DS(on) (norm.) -25 I D = 1 mA 1.04 1.02 1.4 1.00 1.0 0.98 0.6 0.2 -75 0.96 -25 25 75 125 175 0.94 -75 T j (°C) -25 25 75 125 175 T j (°C) Figure 11. Source-drain diode forward characteristics V SD (V) GIPG300520160947SDF 1.1 1.0 T j = -55 °C 0.9 T j = 25 °C 0.8 T j = 175 °C 0.7 0.6 0.5 0 DS11708 - Rev 2 20 40 60 80 I SD (A) page 6/14 STH80N10LF7-2AG Test circuits 3 Test circuits Figure 12. Test circuit for resistive load switching times Figure 13. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 14. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 15. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 17. Switching time waveform Figure 16. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS11708 - Rev 2 page 7/14 STH80N10LF7-2AG Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 H²PAK-2 shallow gullwing package information Figure 18. H²PAK-2 shallow gullwing package outline 8159712_8 DS11708 - Rev 2 page 8/14 STH80N10LF7-2AG H²PAK-2 shallow gullwing package information Table 7. H²PAK-2 shallow gullwing mechanical data Dim. mm Min. Typ. Max. A 4.30 - 4.70 A1 -0.05 - 0.08 C 1.17 - 1.37 e 4.98 - 5.18 E 0.50 - 0.90 F 0.78 - 0.85 H 10.00 - 10.40 H1 7.40 - 7.80 L 15.30 - 15.80 L1 1.27 - 1.40 L2 4.93 - 5.23 L3 6.85 - 7.25 L4 1.50 - 1.70 M 2.60 - 2.90 R 0.20 - 0.60 V 0° - 8° Figure 19. H²PAK-2 recommended footprint (dimensions are in mm) 8159712_7_footprint DS11708 - Rev 2 page 9/14 STH80N10LF7-2AG Packing information 4.2 Packing information Figure 20. Tape outline 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F K0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v2 DS11708 - Rev 2 page 10/14 STH80N10LF7-2AG Packing information Figure 21. Reel outline T REEL DIMENSIONS 40 mm min. Access hole At slot location B D C N A G measured Tape slot In core for Full radius At hub Tape start Table 8. Tape and reel mechanical data Tape Dim. DS11708 - Rev 2 Reel mm mm Dim. Min. Max. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 330 13.2 26.4 30.4 page 11/14 STH80N10LF7-2AG Revision history Table 9. Document revision history DS11708 - Rev 2 Date Version Changes 13-Jun-2016 1 First release 14-Jan-2019 2 Updated description title and Section Features. page 12/14 STH80N10LF7-2AG Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 H²PAK-2 shallow gullwing package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 DS11708 - Rev 2 page 13/14 STH80N10LF7-2AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS11708 - Rev 2 page 14/14