VNL5300S5TR-E

VNL5300S5-E OMNIFET III fully protected low-side driver Datasheet - production data Description The VNL5300S5-E is a monolithic device made using STMicroelectronics® VIPower® technology, intended for driving resistive or inductive loads with one side connected to the battery. SO-8 Built-in thermal shutdown protects the chip from overtemperature and short-circuit. Output current limitation protects the device in an overload condition. In case of long duration overload, the device limits the dissipated power to a safe level up to thermal shutdown intervention. Thermal shutdown, with automatic restart, allows the device to recover normal operation as soon as a fault condition disappears. Fast demagnetization of inductive loads is achieved at turn-off. Features Type Vclamp RDS(on) ID VNL5300S5-E 41 V 300 mΩ 2A • Drain current: 2 A • ESD protection • Overvoltage clamp • Thermal shutdown • Current and power limitation • Very low standby current • Very low electromagnetic susceptibility • Compliant with European directive 2002/95/EC • Open drain status output Table 1. Devices summary Order codes Package SO-8 December 2013 This is information on a product in full production. Tube Tape and reel VNL5300S5-E VNL5300S5TR-E DocID023394 Rev 5 1/21 www.st.com Contents VNL5300S5-E Contents 1 Block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 5 6 2/21 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 DocID023394 Rev 5 VNL5300S5-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 PowerMOS section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 SO-8 thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 DocID023394 Rev 5 3/21 3 List of figures VNL5300S5-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. 4/21 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Configuration diagrams (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 SO-8 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . 14 SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Thermal fitting model of a LSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 DocID023394 Rev 5 VNL5300S5-E 1 Block diagrams and pins configurations Block diagrams and pins configurations Figure 1. Block diagram $2!). 6833/< 92/7$*( 6833/< &RQWURO 'LDJQRVWLF 2))6WDWH 2SHQORDG /2*,& &XUUHQW /LPLWDWLRQ ,1387 3RZHU &ODPS '5,9(5 29(57(03(5$785( 3527(&7,21 67$786 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 *1' ("1($'5 Table 2. Pin function Name Function INPUT Voltage controlled input pin with hysteresis, CMOS compatible. It Controls output switch state DRAIN PowerMOS drain SOURCE PowerMOS source and ground reference for the control section SUPPLY VOLTAGE Supply voltage connected to the signal part (5 V) STATUS Open drain digital diagnostic pin DocID023394 Rev 5 5/21 20 Block diagrams and pins configurations VNL5300S5-E Figure 2. Current and voltage conventions *% 7%4 %3"*/ **/ 7*/ */165 *45"5 45"564 *4 745"5 4611-: 70-5"(& 4063$& 74611-: ("1($'5 Figure 3. Configuration diagrams (top view) SO-8 Table 3. Suggested connections for unused and N.C. pins Connection / pin Floating To ground STATUS X (1) Not allowed 1. X: do not care. 6/21 DocID023394 Rev 5 N.C. INPUT X X X Through 10 kΩ resistor VNL5300S5-E Electrical specifications 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. Absolute maximum ratings Symbol VDS Drain-source voltage (VIN = 0 V) Value Unit Internally clamped V Internally limited A 6 A ID DC drain current -ID Reverse DC drain current IS DC supply current -1 to 10 mA IIN DC input current -1 to 10 mA ISTAT DC status current -1 to 10 mA VESD1 Electrostatic discharge (R = 1.5 kΩ; C = 100 pF) – DRAIN – SUPPLY, INPUT, STATUS VESD2 Electrostatic discharge on output pin only (R = 330 Ω, C = 150 pF) 5000 4000 V 2000 V Junction operating temperature -40 to 150 °C Tstg Storage temperature -55 to 150 °C EAS Single pulse avalanche energy (L = 19 mH, Tj = 150 °C, RL = 0, IOUT = IlimL) 26 mJ Tj 2.2 Parameter Thermal data Table 5. Thermal data Symbol Rthj-amb Parameter Thermal resistance junction-ambient DocID023394 Rev 5 Maximum value Unit 115 °C/W 7/21 20 Electrical specifications 2.3 VNL5300S5-E Electrical characteristics Values specified in this section are for Vsupply = VIN = 4.5 V to 5.5 V, -40°C < Tj < 150°C; unless otherwise stated. Table 6. PowerMOS section Symbol Vsupply RON Parameter Operating supply voltage Test conditions Min. Typ. Max. Unit - 3.5 5 5.5 V ID = 0.8 A; Tj = 25 °C, Vsupply = VIN = 4.5 V ON-state resistance IDSS mΩ ID = 0.8 A; Tj = 150°C, Vsupply = VIN = 4.5 V VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 0.8 A VCLTH 300 Drain-source clamp threshold voltage OFF-state output current 600 41 46 52 VIN = 0 V; ID = 2 mA 36 VIN = 0 V; VDS = 13 V; Tj = 25°C 0 3 VIN = 0 V; VDS = 13 V; Tj = 125°C 0 5 V V µA Table 7. Source drain diode Symbol VSD Parameter Test conditions Forward on voltage ID = 0.8 A; VIN = 0 V Min. Typ. Max. Unit — 0.8 — V Table 8. Status pin Symbol Parameter Test conditions Min. Typ. Max. Unit VSTAT Status low output voltage ISTAT = 1 mA 0.5 V ILSTAT Status leakage current Normal operation, VSTAT = 5 V 10 µA CSTAT Status pin input capacitance Normal operation, VSTAT = 5 V 100 pF VSTCL Status clamp voltage ISTAT = 1 mA 5.5 7 V ISTAT = -1 mA -0.7 Table 9. Logic input Symbol 8/21 Parameter Test conditions VIL Low-level input voltage IIL Low-level input current VIH High-level input voltage IIH High-level input current VI(hyst) Input hysteresis voltage VIN = 0.9 V Min. Max. Unit 0.9 V 1 µA 2.1 V VIN = 2.1 V DocID023394 Rev 5 Typ. 10 0.13 µA V VNL5300S5-E Electrical specifications Table 9. Logic input (continued) Symbol VICL Parameter Test conditions IIN = 1 mA Input clamp voltage Min. Typ. 5.5 Max. Unit 7 V IIN = -1 mA -0.7 Table 10. Openload detection Symbol VOl td(oloff) Parameter Test conditions Min. Typ. Max. Unit 0.6 1.2 1.7 V 45 425 1100 µs Min. Typ. Max. Unit OFF-state; Tj = 25°C; VIN = VDRAIN = 0 V; 10 25 ON-state; VIN = 5 V; VDS = 0 V 25 65 Openload OFF-state voltage detection threshold VIN = 0 V Delay between INPUT falling edge and STATUS falling edge IOUT = 0 A in openload condition Table 11. Supply section Symbol IS VSCL Parameter Test conditions Supply current ISCL = 1 mA Supply clamp voltage µA 5.5 7 V ISCL = -1 mA -0.7 Table 12. Switching characteristics(1) Symbol td(ON) td(OFF) Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time RL = 16 Ω; VCC = 13 V(2) — 8 — µs Turn-off delay time RL = 16 Ω; VCC = 13 V(2) — 12 — µs V(2) — 11 — µs tr Rise time RL = 16 Ω; VCC = 13 tf Fall time RL = 16 Ω; VCC = 13 V(2) — 7 — µs WON Switching energy losses at turn-on RL = 16 Ω; VCC = 13 V(2) — 0.026 — mJ WOFF Switching energy losses at turn-off RL = 16 Ω; VCC = 13 V(2) — 0.016 — mJ Qg Total gate charge VSUPPLY = VIN = 5 V — 0.6 — nC 1. See Figure 5: Application schematic 2. See Figure 4: Switching characteristics DocID023394 Rev 5 9/21 20 Electrical specifications VNL5300S5-E Table 13. Protection and diagnostics Symbol Parameter IlimH DC short-circuit current VDS = 13 V; Vsupply = VIN = 5 V IlimL Short-circuit current during thermal cycling VDS = 13 V; TR < Tj < TTSD; Vsupply = VIN = 5 V tdlimL Step response current limit VDS = 13 V; Vinput = 5 V TTSD Shutdown temperature TR Reset temperature TRS Thermal reset of STATUS THYST Test conditions Min. Typ. Max. Unit 2 2.8 3.8 A 150 1.4 A 7 µs 175 200 TRS + 1 TRS + 5 °C 135 Thermal hysteresis (TTSD - TR) °C 7 °C Table 14. Truth table Conditions 10/21 INPUT DRAIN STATUS Normal operation L H H L H H Current limitation L H H X H H Overtemperature L H H H H L Undervoltage L H H H X X Output voltage < VOL L H L L L H DocID023394 Rev 5 °C VNL5300S5-E Electrical specifications Figure 4. Switching characteristics DocID023394 Rev 5 11/21 20 Application information 3 VNL5300S5-E Application information Figure 5. Application schematic 9FF 9 5/ 9 0LFUR&RQWUROOHU 5VXSSO\ 96833/< '5$,1 N ,1387 5SURW 67$786 5SURW 6285&( '!0'#&4 3.1 MCU I/O protection ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from latching up(a). The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the LSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os: Equation 1 ( V OHμC – V IH ) 0.7 -------------------- ≤ R prot ≤ --------------------------------------I latchup I IH max Let: • Ilatchup > 20 mA • VOHµC > 4.5 V • 35 Ω ≤ Rprot ≤ 100 KΩ Then, the recommended value is Rprot = 1 KΩ a. In case of negative transient on the drain pin. 12/21 DocID023394 Rev 5 VNL5300S5-E Application information Figure 6. Maximum demagnetization energy VNL5300 - Maximum turn off current versus inductance I (A) 10 1 VNL5300 - Single Pulse Repetitive pulse Tjstart=100°C Repetitive pulse Tjstart=125°C 0.1 1 10 100 1000 L (mH) VNL5300 - Maximum turn off Energy versus Tdemag 1000 VNL5300 - Single Pulse 100 Repetitive pulse Tjstart=100°C E [mJ] Repetitive pulse Tjstart=125°C 10 1 0.01 0.1 1 10 100 Tdemag [ms] GAPG1107131511CFT 1. Values are generated with RL = 0Ω. In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. DocID023394 Rev 5 13/21 20 Package and PC board thermal data VNL5300S5-E 4 Package and PC board thermal data 4.1 SO-8 thermal data Figure 7. SO-8 PC board ("1($'5 Note: Layout condition of Rth and Zth measurements (Board finish thickness 1.6 mm +/- 10%; Board double layer; Board dimension 78 mm x 86 mm; Board Material FR4; Cu thickness 0.070 mm (front and back side); Thermal vias separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm). Figure 8. SO-8 Rthj-amb vs PCB copper area in open box free air condition 57+MDPE              1$#
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MBZPVU ("1($'5 14/21 DocID023394 Rev 5 VNL5300S5-E Package and PC board thermal data Figure 9. SO-8 thermal impedance junction ambient single pulse =7+ƒ&:  &X IRRWSULQW &X FP         7LPHV ("1($'5 Equation 2: pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tP/T Figure 10. Thermal fitting model of a LSD in SO-8 GAPGCFT00533 Note: The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. DocID023394 Rev 5 15/21 20 Package and PC board thermal data VNL5300S5-E Table 15. SO-8 thermal parameters 16/21 Area/island (cm2) Footprint 2 R1 (°C/W) 2.8 2.8 R2 (°C/W) 3.7 3.7 R3 (°C/W) 3.5 3.5 R4 (°C/W) 34 25 R5 (°C/W) 36 20 R6 (°C/W) 35 27 C1 (W.s/°C) 0.00002 0.00002 C2 (W.s/°C) 0.001 0.001 C3 (W.s/°C) 0.005 0.005 C4 (W.s/°C) 0.02 0.02 C5 (W.s/°C) 0.15 0.15 C6 (W.s/°C) 2.5 3.5 DocID023394 Rev 5 VNL5300S5-E Package and packing information 5 Package and packing information 5.1 ECOPACK® In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 SO-8 mechanical data Figure 11. SO-8 package dimensions GAPGCFT00145 DocID023394 Rev 5 17/21 20 Package and packing information VNL5300S5-E Table 16. SO-8 mechanical data Millimeters Symbol Min. Typ. Max. A 1.75 A1 0.10 0.25 A2 1.25 b 0.28 0.48 c 0.17 0.23 D(1) 4.80 4.90 5.00 E 5.80 6.00 6.20 E1(2) 3.80 3.90 4.00 e 1.27 h 0.25 0.50 L 0.40 1.27 L1 1.04 k 0° 8° ccc 0.10 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15 mm in total (both side). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. 5.3 SO-8 packing information Figure 12. SO-8 tube shipment (no suffix) B C A Base q.ty Bulk q.ty Tube length (± 0.5) A B C (± 0.1) 100 2000 532 3.2 6 0.6 All dimensions are in mm. 18/21 DocID023394 Rev 5 VNL5300S5-E Package and packing information Figure 13. SO-8 tape and reel shipment (suffix “TR”) Reel dimensions Base q.ty Bulk q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape hole spacing Component spacing Hole diameter Hole diameter Hole position Compartment depth Hole spacing W P0 (± 0.1) P D (+ 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape No components Components No components 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed DocID023394 Rev 5 19/21 20 Revision history 6 VNL5300S5-E Revision history Table 17. Document revision history Date Revision 02-Jul-2012 1 Initial release. 2 Table 5: Thermal data: – Rthj-amb: updated value Table 6: PowerMOS section: – RON: updated value Table 11: Supply section: – IS: updated value Table 12: Switching characteristics: – td(ON), td(OFF), tr, WON, WOFF: updated values Table 13: Protection and diagnostics: – tdlimL: updated value Updated Figure 5: Application schematic Updated Section 3.1: MCU I/O protection Updated Chapter 4: Package and PC board thermal data 18-Jul-2013 3 Table 4: Absolute maximum ratings: – -ID: updated value – EAS: updated parameter value Table 12: Switching characteristics: – td(ON), tr, WON, WOFF: updated typical values Added Figure 6: Maximum demagnetization energy 18-Sep-2013 4 Updated disclaimer. 13-Dec-2013 5 Table 6: PowerMOS section: – RON: updated test conditions 23-May-2013 20/21 Changes DocID023394 Rev 5 VNL5300S5-E Please Read Carefully: Information in this document is provided solely in connection with ST products. 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