IRF740A
www.vishay.com
Vishay Siliconix
Power MOSFET
FEATURES
D
• Low gate charge Qg results in simple drive
requirement
TO-220AB
Available
• Improved gate, avalanche, and dynamic dV/dt
ruggedness
• Fully characterized capacitance and avalanche voltage
and current
• Effective Coss specified
G
G
D
S
S
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
N-Channel MOSFET
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
400
VGS = 10 V
0.55
Qg (Max.) (nC)
36
Qgs (nC)
9.9
Qgd (nC)
Configuration
APPLICATIONS
• Switch mode power supply (SMPS)
• Uninterruptable power supply
• High speed power switching
16
Single
TYPICAL SMPS TOPOLOGIES
• Single transistor flyback Xfmr. reset
• Single transistor forward Xfmr. reset (both for US line input
only)
ORDERING INFORMATION
Package
Lead (Pb)-free
TO-220AB
IRF740APbF
IRF740APbF-BE3
Lead (Pb)-free and halogen-free
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
400
Gate-source voltage
VGS
± 30
Continuous drain current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
UNIT
V
10
6.3
A
IDM
40
1.0
W/°C
Single pulse avalanche energy b
EAS
630
mJ
Repetitive avalanche current a
IAR
10
A
Repetitive avalanche energy a
EAR
12.5
mJ
Linear derating factor
Maximum power dissipation
TC = 25 °C
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d
Mounting torque
For 10 s
6-32 or M3 screw
PD
125
W
dV/dt
5.9
V/ns
TJ, Tstg
- 55 to + 150
300d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = 50 V, starting TJ = 25 °C, L = 12.6 mH, Rg = 25 Ω, IAS = 10 A (see fig. 12)
c. ISD ≤ 10 A, dV/dt ≤ 330 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91051
1
For technical questions, contact: hvm@vishay.com
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740A
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Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
62
Case-to-sink, flat, greased surface
RthCS
0.50
-
Maximum junction-to-case (drain)
RthJC
-
1.0
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 μA
400
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.48
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
nA
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage
Gate-source leakage
Zero gate voltage drain current
Drain-source on-state resistance
Forward transconductance
IGSS
IDSS
RDS(on)
gfs
VGS = ± 30 V
-
-
± 100
VDS = 400 V, VGS = 0 V
-
-
25
VDS = 320 V, VGS = 0 V, TJ = 125 °C
-
-
250
-
-
0.55
Ω
4.9
-
-
S
ID = 6.0 Ab
VGS = 10 V
VDS = 50 V, ID = 6.0
Ab
μA
Dynamic
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Output capacitance
Coss
Effective output capacitance
Coss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
1030
-
-
170
-
-
7.7
-
VGS = 0 V, VDS = 1.0 V, f = 1.0 MHz
-
1490
-
VGS = 0 V, VDS = 320 V, f = 1.0 MHz
-
52
-
VGS = 0 V, VDS = 0 V to 320 V
-
61
-
-
-
36
Total gate charge
Qg
Gate-source charge
Qgs
-
-
9.9
Gate-drain charge
Qgd
-
-
16
Turn-on delay time
td(on)
-
10
-
tr
-
35
-
-
24
-
-
22
-
-
-
10
-
-
40
Rise time
Turn-off delay time
Fall time
td(off)
VGS = 10 V
ID = 10 A, VDS = 320 V,
see fig. 6 and 13b
VDD = 200 V, ID = 10 A,
Rg = 10 Ω, RD = 19.5 Ω, see fig. 10b
tf
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulsed diode forward current a
Body diode voltage
IS
ISM
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 10 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 10 A, dI/dt = 100 A/μsb
-
-
2.0
V
-
240
360
ns
-
1.9
2.9
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91051
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740A
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Vishay Siliconix
102
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
ID, Drain-to-Source Current (A)
Top
10
1
4.5 V
0.1
20 µs Pulse Width
TJ = 25 °C
10-2
0.1
1
102
10
VDS, Drain-to-Source Voltage (V)
91051_01
RDS(on), Drain-to-Source On Resistance
(Normalized)
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
ID = 10 A
VGS = 10 V
2.5
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
91051_04
Fig. 1 - Typical Output Characteristics, TC = 25 °C
102
3.0
Fig. 3 - Normalized On-Resistance vs. Temperature
105
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
10
4.5 V
1
104
C, Capacitance (pF)
ID, Drain-to-Source Current (A)
Top
Ciss
103
Coss
102
Crss
10
20 µs Pulse Width
TJ = 150 °C
0.1
0.1
1
VDS, Drain-to-Source Voltage (V)
91051_02
1
102
10
Fig. 4 - Typical Capacitance vs. Drain-to-Source Voltage
20
TJ = 150 °C
1
TJ = 25 °C
0.1
4.0
91051_03
20 µs Pulse Width
VDS = 50 V
5.0
6.0
7.0
8.0
9.0
Fig. 2 - Typical Transfer Characteristics
ID = 10 A
VDS = 320 V
16
VDS = 200 V
VDS = 80 V
12
8
4
For test circuit
see figure 13
0
0
10.0
VGS, Gate-to-Source Voltage (V)
S21-0853-Rev. D, 16-Aug-2021
VGS, Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
102
10
103
VDS, Drain-to-Source Voltage (V)
91051_05
Fig. 1 - Typical Output Characteristics, TC = 150 °C
102
10
1
91051_06
10
20
30
40
QG, Total Gate Charge (nC)
Fig. 5 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91051
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740A
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Vishay Siliconix
10.0
10
TJ = 150 °C
1
8.0
ID, Drain Current (A)
ISD, Reverse Drain Current (A)
102
TJ = 25 °C
6.0
4.0
2.0
VGS = 0 V
0.1
0.2
0.4
0.6
0.8
1.2
1.0
0.0
25
1.4
VSD, Source-to-Drain Voltage (V)
91051_07
VGS
ID, Drain Current (A)
10
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
1 ms
Fig. 9 - Switching Time Test Circuit
VDS
10 ms
102
150
D.U.T.
Rg
100 µs
1
125
RD
VDS
10 µs
TC = 25 °C
TJ = 150 °C
Single Pulse
100
Fig. 8 - Maximum Drain Current vs. Case Temperature
Operation in this area limited
by RDS(on)
10
75
TC, Case Temperature (°C)
91051_09
Fig. 6 - Typical Source-Drain Diode Forward Voltage
102
50
90 %
103
VDS, Drain-to-Source Voltage (V)
91051_08
Fig. 7 - Maximum Safe Operating Area
10 %
VGS
td(on)
td(off) tf
tr
Fig. 10 - Switching Time Waveforms
Thermal Response (ZthJC)
10
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
10-2
10-3
10-5
91051_11
S21-0853-Rev. D, 16-Aug-2021
PDM
t1
Single Pulse
(Thermal Response)
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
10-4
10-3
10-2
0.1
1
10
t1, Rectangular Pulse Duration (s)
Document Number: 91051
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740A
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Vishay Siliconix
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
15 V
Driver
L
VDS
D.U.T.
Rg
+
A
- VDD
IAS
20 V
tp
0.01 Ω
Fig. 12 - Unclamped Inductive Test Circuit
VDSav, Avalanche Voltage (V)
580
560
540
520
500
480
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0 10.0
IAV, Avalanche Current (A)
91051_12d
Fig. 15 - Typical Drain-to-Source Voltage vs.
Avalanche Current
VDS
tp
QG
VGS
IAS
QGS
EAS, Single Pulse Avalanche Energy (mJ)
Fig. 13 - Unclamped Inductive Waveforms
1400
ID
Top
4.5 A
6.3 A
Bottom 10 A
1200
1000
QGD
VG
Charge
Fig. 16 - Basic Gate Charge Waveform
800
Current regulator
Same type as D.U.T.
600
50 kΩ
400
12 V
0.2 µF
0.3 µF
200
+
D.U.T.
0
25
91051_12c
50
75
100
125
-
VDS
150
Starting TJ, Junction Temperature (°C)
VGS
3 mA
Fig. 14 - Maximum Avalanche Energy vs. Drain Current
IG
ID
Current sampling resistors
Fig. 17 - Gate Charge Test Circuit
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91051
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740A
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Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
Period
P.W.
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 18 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91051.
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91051
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 01-Jan-2023
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Document Number: 91000