SOT-23

SQ2360EES www.vishay.com Vishay Siliconix Automotive N-Channel 60 V (D-S) 175 °C MOSFET PRODUCT SUMMARY VDS (V) RDS(on) () at VGS = 10 V RDS(on) () at VGS = 4.5 V ID (A) Configuration TO-236 (SOT-23) FEATURES 60 0.085 0.130 4.4 Single D • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • AEC-Q101 Qualifiedc • 100 % Rg and UIS Tested • Typical ESD Protection 800 V • Compliant to RoHS Directive 2002/95/EC G 1 3 D G S 2 Top View SQ2360EES Marking Code: 8Mxxx S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free SOT-23 SQ2360EES-T1-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Source Current (Diode Conduction) Pulsed Drain Currenta Single Pulse Avalanche Current Single Pulse Avalanche Energy Maximum Power Dissipationa Operating Junction and Storage Temperature Range L = 0.1 mH TC = 25 °C TC = 125 °C TC = 25 °C TC = 125 °C SYMBOL VDS VGS ID IS IDM IAS EAS PD TJ, Tstg LIMIT 60 ± 20 4.4 2.5 3.7 17 6 1.8 3 1 - 55 to + 175 mJ W °C A UNIT V THERMAL RESISTANCE RATINGS PARAMETER Junction-to-Ambient Junction-to-Foot (Drain) Notes a. Pulse test; pulse width  300 μs, duty cycle  2 %. b. When mounted on 1" square PCB (FR-4 material). c. Parametric verification ongoing. PCB Mountb SYMBOL RthJA RthJF LIMIT 166 50 UNIT °C/W S11-2111-Rev. E, 07-Nov-11 1 Document Number: 65352 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2360EES www.vishay.com Vishay Siliconix SPECIFICATIONS (TC = 25 °C, unless otherwise noted) PARAMETER Static Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current On-State Drain Currenta VDS VGS(th) IGSS IDSS ID(on) VGS = 0, ID = 250 μA VDS = VGS, ID = 250 μA VDS = 0 V, VGS = ± 20 V VGS = 0 V VGS = 0 V VGS = 0 V VGS = 10 V VGS = 10 V Drain-Source On-State Resistancea RDS(on) VGS = 10 V VGS = 10 V VGS = 4.5 V Forward Transconductanceb Dynamicb Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Chargec Gate-Source Chargec Gate-Drain Chargec Gate Resistance Turn-On Delay Rise Timec Turn-Off Delay Timec Fall Timec Pulsed Currenta Forward Voltage Timec Ciss Coss Crss Qg Qgs Qgd Rg td(on) tr td(off) tf ISM VSD IF = 1.5 A, VGS = 0 VDD = 30 V, RL = 15  ID  2 A, VGEN = 10 V, Rg = 1  f = 1 MHz VGS = 10 V VDS = 30 V, ID = 2 A VGS = 0 V VDS = 25 V, f = 1 MHz 1.24 295 55 35 7.40 0.95 1.94 2.46 5 11 10 8 0.8 370 70 55 12 3.68 8 17 15 12 17 1.2 A V ns  nC pF gfs VDS = 60 V VDS = 60 V, TJ = 125 °C VDS = 60 V, TJ = 175 °C VDS5 V ID = 6 A, TJ = 25 °C ID = 6 A, TJ = 125 °C ID = 6 A, TJ = 175 °C ID = 5 A 60 1.5 10 0.058 0.081 5.8 2.5 ± 5.5 1 50 150 0.085 0.197 0.258 0.130 A   S μA V μA SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS = - 15 V, ID = 1.9 A Source-Drain Diode Ratings and Characteristicsb Notes a. Pulse test; pulse width  300 μs, duty cycle  2 %. b. Guaranteed by design, not subject to production testing. c. Independent of operating temperature. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S11-2111-Rev. E, 07-Nov-11 2 Document Number: 65352 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2360EES www.vishay.com TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 0.005 10-2 Vishay Siliconix 0.004 I GSS - Gate Current (mA) I GSS - Gate Current (A) 10-4 0.003 TJ = 25 °C 0.002 TJ = 150 °C 10-6 TJ = 25 °C 10-8 0.001 0.000 0 6 12 18 24 VGS - Gate-to-Source Voltage (V) 30 10-10 0 6 12 18 24 VGS - Gate-to-Source Voltage (V) 30 Gate Current vs. Gate-Source Voltage 12 VGS = 10 V thru 5 V 10 VGS = 4 V I D - Drain Current (A) 8 I D - Drain Current (A) 8 10 12 Gate Current vs. Gate-Source Voltage 6 6 4 4 TC = 25 °C TC = 125 °C TC = - 55 °C 2 VGS = 3 V 2 0 0 1 2 3 4 5 VDS - Drain-to-Source Voltage (V) 0 0 1 2 3 4 5 VGS - Gate-to-Source Voltage (V) Output Characteristics 10 0.25 Transfer Characteristics g fs - Transconductance (S) TC = - 55 °C 6 TC = 25 °C 4 TC = 125 °C 2 R DS(on) - On-Resistance (Ω) 8 0.20 0.15 0.10 VGS = 4.5 V VGS = 10 V 0.05 0 0.0 0.00 0.4 0.8 1.2 1.6 2.0 0 2 I D - Drain Current (A) 4 6 8 ID - Drain Current (A) 10 12 Transconductance On-Resistance vs. Drain Current S11-2111-Rev. E, 07-Nov-11 3 Document Number: 65352 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2360EES www.vishay.com TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 600 10 VDS = 30 V ID = 2 A VGS - Gate-to-Source Voltage (V) 8 Vishay Siliconix 500 C - Capacitance (pF) 400 Ciss 6 300 4 200 Coss Crss 100 2 0 0 10 20 30 40 50 60 VDS - Drain-to-Source Voltage (V) 0 0 2 4 6 8 10 Qg - Total Gate Charge (nC) Capacitance 2.5 Gate Charge 10 R DS(on) - On-Resistance (Normalized) ID = 1.5 A 2.1 VGS = 10 V I S - Source Current (A) 1 TJ = 25 °C 0.1 TJ = 150 °C 1.7 1.3 0.01 0.9 0.5 - 50 - 25 0 25 50 75 100 125 TJ - Junction Temperature (°C) 150 175 0.001 0.0 0.3 0.6 0.9 1.2 VSD - Source-to-Drain Voltage (V) 1.5 On-Resistance vs. Junction Temperature 0.5 0.5 Source-Drain Diode Forward Voltage R DS(on) - On-Resistance (Ω) 0.4 VGS(th) Variance (V) 0.2 0.3 - 0.1 0.2 TJ = 125 °C 0.1 TJ = 25 °C 0.0 0 2 4 6 8 10 VGS - Gate-to-Source Voltage (V) - 0.4 ID = 250 µA - 0.7 ID = 5 mA - 1.0 - 50 - 25 0 25 50 75 100 TJ - Temperature (°C) 125 150 175 On-Resistance vs. Gate-Source Voltage Threshold Voltage S11-2111-Rev. E, 07-Nov-11 4 Document Number: 65352 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2360EES www.vishay.com TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 80 IDM Limited Vishay Siliconix VDS - Drain-to-Source Voltage (V) ID = 1 mA 76 ID - Drain Current (A) 10 100 μs Limited by RDS(on)* 72 1 1 ms 10 ms 100 ms 1s 10 s, DC 68 0.1 64 TC = 25 °C Single Pulse BVDSS Limited 60 - 50 - 25 0 25 50 75 100 125 TJ - Junction Temperature (°C) 150 175 0.01 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Drain-Source Breakdown vs. Junction Temperature Safe Operating Area THERMAL RATINGS (TA = 25 °C, unless otherwise noted) 2 1 Duty Cycle = 0.5 Normalized Effective Transient Thermal Impedance 0.2 Notes: 0.1 0.1 0.05 0.02 PDM t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 166 °C/W Single Pulse 0.01 10-4 10-3 10-2 10-1 1 3. TJM - T A = PDMZthJA(t) 4. Surface Mounted 10 100 600 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient S11-2111-Rev. E, 07-Nov-11 5 Document Number: 65352 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2360EES www.vishay.com THERMAL RATINGS (TA = 25 °C, unless otherwise noted) 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 Vishay Siliconix 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10-4 10-3 10-2 Square Wave Pulse Duration (s) 10-1 1 Normalized Thermal Transient Impedance, Junction-to-Foot Note • The characteristics shown in the two graphs - Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C) - Normalized Transient Thermal Impedance Junction-to-Foot (25 °C) are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities can widely vary depending on actual application parameters and operating conditions. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?65352. S11-2111-Rev. E, 07-Nov-11 6 Document Number: 65352 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SOT-23 (TO-236): 3-LEAD b 3 E1 1 2 E S e1 e D 0.10 mm A A2 0.004" Seating Plane A1 C L L1 C C q 0.25 mm Gauge Plane Seating Plane Dim A A1 A2 b c D E E1 e e1 L L1 S q ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479 MILLIMETERS Min 0.89 0.01 0.88 0.35 0.085 2.80 2.10 1.20 0.95 BSC 1.90 BSC 0.40 0.64 Ref 0.50 Ref 3° 8° 3° 0.60 0.016 INCHES Max 1.12 0.10 1.02 0.50 0.18 3.04 2.64 1.40 Min 0.035 0.0004 0.0346 0.014 0.003 0.110 0.083 0.047 0.0374 Ref 0.0748 Ref Max 0.044 0.004 0.040 0.020 0.007 0.120 0.104 0.055 0.024 0.025 Ref 0.020 Ref 8° Document Number: 71196 09-Jul-01 www.vishay.com 1 AN807 Vishay Siliconix Mounting LITTLE FOOTR SOT-23 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. ambient air. This pattern uses all the available area underneath the body for this purpose. 0.114 2.9 See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286), for the basis of the pad design for a LITTLE FOOT SOT-23 power MOSFET footprint . In converting this footprint to the pad set for a power device, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. 0.081 2.05 0.150 3.8 0.059 1.5 0.0394 1.0 0.037 0.95 FIGURE 1. Footprint With Copper Spreading The electrical connections for the SOT-23 are very simple. Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. As in the other LITTLE FOOT packages, the drain pin serves the additional function of providing the thermal connection from the package to the PC board. The total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. Also, heat spreads in a circular fashion from the heat source. In this case the drain pin is the heat source when looking at heat spread on the PC board. Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. Figure 1 shows the footprint with copper spreading for the SOT-23 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device. Document Number: 70739 26-Nov-03 www.vishay.com 1 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SOT-23 0.037 (0.950) 0.022 (0.559) (2.692) 0.053 (1.341) 0.097 (2.459) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index (0.724) 0.029 (1.245) 0.106 0.049 APPLICATION NOTE Document Number: 72609 Revision: 21-Jan-08 www.vishay.com 25 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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