TPL905233-S5TR-S

TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Features Applications • • • • • • • • • • Input Voltage Range: 1.75 V to 5.5 V Output Voltage Range: 1.2 V to 3.6 V ±2.5% Output Accuracy Over Line, Load Regulation, and Operating Temperature Range 500-mA Maximum Output Current High PSRR: 88 dB at 10 kHz 61 dB at 100 kHz 45 dB at 1 MHz 8.6-μVRMS Output Voltage Noise • • • • • Output Reverse Current Protection • • Video Surveillance The TPL9052 series of products have high PSRR with 88 dB at 10 kHz and 8.6-μVRMS ultra-low noise. These features make the TPL9052 series of products very suitable for noise-sensitive applications with high noise from the previous stage power supply, such as highperformance analog devices, or high-definition imaging equipment. Excellent Transient Response Stable with a 1-μF or Greater Ceramic Output Capacitor Output Shortage Protection Over-Temperature and Over-Current Protection The TPL9052 series of products integrate protection features: output reverse current protection, output shortage protection, over-temperature protection, and overload protection. All these features significantly improve the system reliability and simplify the circuitry design under different operating conditions. Junction Temperature Range: −40°C to +125°C Qualified for Automotive Applications with AEC-Q100 Reliability Test Industrial and Automotive Temperature Range Package: – Digital Cameras and Audio Devices Power Supply The TPL9052 series of products are 500-mA high-PSRR, ultra-low noise, and low-dropout linear regulators with high-output accuracy. The TPL9052 series of products support both fixed output voltage ranging from 1.2 V to 3.6 V and are stable with 1-μF or larger ceramic output capacitors. 82 dB at 1 kHz • • • Mobile Phones and Tablets Description Low Dropout Voltage: 150 mV typical at 500 mA – – – – Portable and Battery-Powered Equipment The TPL9052 series of products provide SOT23-5 packages with guaranteed operating junction temperature (TJ) ranging from −40°C to +125°C. SOT23-5 Typical Application Circuit Input CIN = 1µF Off On www.3peak.com VOUT VIN COUT = 1µF TPL9052 EN Output GND 1 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Table of Contents Features................................................................................................................................................................1 Applications......................................................................................................................................................... 1 Description........................................................................................................................................................... 1 Typical Application Circuit..................................................................................................................................1 Product Family Table...........................................................................................................................................3 Revision History...................................................................................................................................................3 Pin Configuration and Functions....................................................................................................................... 4 Specifications.......................................................................................................................................................5 Absolute Maximum Ratings (1) .......................................................................................................................5 ESD, Electrostatic Discharge Protection........................................................................................................ 5 Recommended Operating Conditions............................................................................................................ 5 Thermal Information........................................................................................................................................5 Electrical Characteristics................................................................................................................................ 6 Typical Performance Characteristics.............................................................................................................. 8 Detailed Description.......................................................................................................................................... 10 Overview.......................................................................................................................................................10 Functional Block Diagram.............................................................................................................................10 Feature Description...................................................................................................................................... 10 Application and Implementation...................................................................................................................... 12 Application Information ................................................................................................................................ 12 Typical Application........................................................................................................................................12 Layout................................................................................................................................................................. 13 Layout Guideline...........................................................................................................................................13 Tape and Reel Information................................................................................................................................ 14 Package Outline Dimensions........................................................................................................................... 15 SOT23-5....................................................................................................................................................... 15 Order Information.............................................................................................................................................. 16 IMPORTANT NOTICE AND DISCLAIMER......................................................................................................... 17 www.3peak.com 2 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Product Family Table Order Number Output Voltage (V) AEC-Q100 Reliability Test Package TPL905212-S5TR-S 1.2 V PASS SOT23-5 TPL905215-S5TR-S 1.5 V PASS SOT23-5 TPL905218-S5TR-S 1.8 V PASS SOT23-5 TPL905225-S5TR-S 2.5 V PASS SOT23-5 TPL905228-S5TR-S 2.8 V PASS SOT23-5 TPL905230-S5TR-S 3.0 V PASS SOT23-5 TPL905233-S5TR-S 3.3 V PASS SOT23-5 TPL905236-S5TR-S 3.6 V PASS SOT23-5 Revision History Date Revision 2022-05-31 Rev.Pre.0 2022-12-01 Rev.A.0 2023-06-15 Rev.A.1 www.3peak.com Notes Preliminary Version. Initial Released, Qualified for Automotive Applications with AEC-Q100 Reliability Test. 1. Removed 4.5 V Output Option. 2. Updated Thermal Information. 3 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Pin Configuration and Functions TPL9052-S SOT23-5 Package Top View IN 1 5 OUT 4 NC Part Number GND 2 EN 3 Table 1. Pin Functions: TPL9052-S Pin Name Pin Number I/O Description EN 3 I Regulator enable pin. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup, connect EN to IN directly. GND 2 – Ground reference pin. Connect the GND pin to the PCB ground plane directly. IN 1 I Input voltage pin. Bypass IN to GND with a 1-μF or greater capacitor. NC 4 – No connection. OUT 5 O Regulated output voltage pin. Bypass OUT to GND with a 1-μF or greater capacitor. www.3peak.com 4 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Specifications Absolute Maximum Ratings (1) Parameter Min Max Unit IN, EN −0.3 6 V OUT −0.3 6 V TJ Junction Temperature Range −40 150 °C TSTG Storage Temperature Range −65 150 °C TL Lead Temperature (Soldering 10 sec) 260 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. (2) All voltage values are with respect to GND. ESD, Electrostatic Discharge Protection Parameter HBM Condition Human Body Model ESD CDM Charged Device Model ESD Minimum Level Unit ANSI/ESDA/JEDEC JS-001 (1) ±6000 V ANSI/ESDA/JEDEC JS-002 (2) ±1500 V (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Recommended Operating Conditions Parameter Min Max Unit IN 1.75 5.5 V EN 0 VIN V OUT 0 5.5 V COUT 1 10 µF 0.001 0.1 Ω −40 125 °C 0 400 mW ESR of COUT TJ Junction Temperature Range PD Power Dissipation Thermal Information Package Type θJA θJC θJB Unit SOT23-5 125.0 73.5 69.3 °C/W www.3peak.com 5 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Electrical Characteristics All test conditions: VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, CIN = 1 µF, COUT = 1 µF, −40°C ≤ TJ ≤ +125°C, unless otherwise noted. Parameter Conditions Min Typ Max Unit 5.5 V Supply Voltage and Current VIN Input Supply Voltage range 1.75 IGND Ground Pin Current IOUT = 0 mA 120 ISHDN Shutdown Current EN = GND 0.02 µA 2 µA Enable Input Voltage and Current VIH(EN) EN Logic-input High Level Output Enable 1.2 VIN V VIL(EN) EN Logic-input Low Level Output Disable 0 0.4 V IEN EN Pin Leakage Current VEN = 5 V 2 µA 1 Regulated Output Voltage and Current −40°C ≤ TJ ≤ +125°C, 0 mA ≤ VOUT Output Voltage Accuracy Line Regulation ΔVOUT VDO (1) Load Regulation Dropout Voltage IOUT ≤ 300 mA −40°C ≤ TJ ≤ +125°C, 0 mA ≤ IOUT ≤ 500 mA −2.5% 2.5% 1 mV 5 mV VOUT = 3.3 V, IOUT = 100 mA 30 mV VOUT = 3.3 V, IOUT = 300 mA 90 180 mV VOUT = 3.3 V, IOUT = 500 mA 150 300 mV 500 mA VIN = VOUT(NOM) + 1 V, IOUT = 1 mA to 500 mA Output Current VOUT in regulation ICL Output Current Limit VOUT = 0.9 × VOUT(NOM) ISC Short-circuit Current Limit RDIS Active Output Discharge Resistance Power Supply Rejection Ratio 2% VIN = VOUT(NOM) + 1 V to 5.5 V IOUT PSRR −2% 0 550 800 mA RLOAD = 20 mΩ, TA = 25°C 100 mA VEN < VIL(EN) 290 Ω IOUT = 20 mA, f = 100 Hz 82 dB IOUT = 20 mA, f = 1 kHz 82 dB IOUT = 20 mA, f = 10 kHz 88 dB IOUT = 20 mA, f = 100 kHz 61 dB IOUT = 20 mA, f = 1 MHz 45 dB VN Output Noise Voltage IOUT = 150 mA, BW = 10 Hz to 100 kHz 8.6 μVRMS tSTR Start-up Time VOUT reaches 95% of nominal output voltage after EN = high 750 μs 165 ºC Temperature Range TSD Thermal Shutdown Temperature www.3peak.com 6 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Parameter Conditions Thermal Shutdown Hysteresis Min Typ 15 Max Unit ºC (1) Dropout voltage is the minimum input-to-output voltage differential needed to maintain regulation at a specified output current and measure for VOUT(NOM) ≥ 1.8 V. In the dropout mode, the output voltage will be equal to: VIN − VDROPOUT. www.3peak.com 7 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Typical Performance Characteristics All test conditions: VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, CIN = 1 µF, COUT = 1 µF, −40°C ≤ TJ ≤ +125°C, unless otherwise noted. 0.2 –40°C 25°C 85°C 125°C Shutdown Current (µA) Ground Current (µA) 300 200 100 0 25°C 0.15 0.1 0.05 0 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Supply Voltage (V) Supply Voltage (V) Figure 1. Quiescent Current vs Input Voltage Figure 2. Shutdown Current vs Input Voltage 3.350 3.310 –40°C 25°C –40°C 25°C 85°C 125°C 85°C 125°C Output Voltage (V) Output Voltage (V) 3.320 3.300 3.290 3.325 3.300 3.275 VOUT = 3.3 V 3.280 3.5 4 4.5 5 5.5 0 Supply Voltage (V) 1.0 0.9 0.8 100 200 300 400 500 Load Current (mA) Figure 3. Line Regulation Figure 4. Load Regulation 3.350 VOUT = 3.3 V Output Voltage (V) Line Regulation (mV) VOUT = 3.3 V 3.250 0.7 0.6 0.5 0.4 0.3 0.2 0.1 3.325 10 mA 100 mA 200 mA 300 mA 500 mA 3.300 3.275 VOUT = 3.3 V 0.0 3.250 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (°C) Ambient Temperature (°C) Figure 5. Line Regulation vs. Temperature www.3peak.com Figure 6. Output Voltage vs. Temperature 8 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO 1 150 −40°C 25°C 85°C 125°C VIH(EN) Enable Threshold (V) Dropout Voltage (mV) 200 100 50 0 VIL(EN) 0.9 0.8 0.7 0.6 0 100 200 300 400 500 -40 -25 -10 5 Load Current (mA) Figure 7. Dropout Voltage vs Output Current Figure 8. Enable Threshold vs. Temperature 1E+4 Noise Density (nV/sqrt(Hz)) 120 100 PSRR(dB) 20 35 50 65 80 95 110 125 Ambient Temperature (°C) 80 60 IOUT = 1 mA 40 IOUT = 10 mA IOUT = 100 mA 20 IOUT = 300 mA 0 IOUT = 100 mA 1E+3 1E+2 1E+1 1E+0 10 100 1K 10K 100K 1M 10 Frequency (Hz) 1K 10K 100K Frequency (Hz) Figure 9. PSRR Figure 10. Noise Output VPP = 21.766 mV VIN = 3.9 V to 4.9 V IOUT = 1 mA to 100 mA Output VPP = 4.388 mV Figure 11. Load Transient www.3peak.com 100 Figure 12. Line Transient 9 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Detailed Description Overview The TPL9052 series of products are 500-mA high-PSRR, ultra-low noise, low-dropout linear regulators with high-output accuracy. The TPL9052 series of products support both fixed output voltage ranging from 1.2 V to 3.6 V and are stable with 1-μF or larger ceramic output capacitors. The TPL9052 series of products have high PSRR with 88 dB at 10 kHz and 8.6-μVRMS ultra-low noise. These features make the TPL9052 series very suitable for noise-sensitive applications with high noise from the previous stage power supply, such as high-performance analog devices, or high-definition imaging equipment. The TPL9052 series of products integrate protection features: output reverse current protection, output shortage protection, over-temperature protection, and overload protection. All these features significantly improve the system reliability and simplify circuitry design under different operating conditions. Functional Block Diagram Reverse Current Protection IN OUT Current Control Thermal Control Regulator Control EA + VREF RDIS – EN Enable Control GND Figure 13. Functional Block Diagram Feature Description Enable (EN) The enable pin (EN) is active high. Connect this pin to the GPIO of an external processor or digital logic control circuit to enable and disable the device. Or connect this pin to the IN pin for self-bias applications. Operating Voltage Range (VIN) The TPL9052 series does not include any dedicated UVLO circuitry. The output voltage of the TPL9052 series is not well regulated until VIN exceeds 1.75 V or (VOUT + VDO), whichever is greater. www.3peak.com 10 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Regulated Output Voltage (VOUT) The TPL9052 series is available in fixed voltage versions of 1.2 V to 4.5 V. When the input voltage is higher than VOUT(NOM) + 1, the output pin is the regulated output based on the selected voltage version. When the input voltage falls below VOUT(NOM) + 1, the output pin tracks the input voltage minus the dropout voltage based on the load current. Reverse-Current Protection (RCP) The TPL9052 series provides the reverse-current protection (RCP) to prevent the output reverse current. If large capacitors are used at the output, there would be a large reverse current when the input voltage is lower than the output voltage. The TPL9052 series can shut off the regulator and body diode path to prevent the device from being damaged due to reverse current faults. Current Limit The TPL9052 series integrates an internal current limit that helps to protect the regulator during fault conditions. When the output is shorted, the LDO supplies a typical current of 100 mA. The output voltage is not regulated when the device is in current limit, and VOUT = ICL × RLOAD. Thermal Shutdown During normal operation, the LDO junction temperature should not exceed 125°C. When the junction temperature exceeds the thermal-shutdown threshold, the LDO shuts down the output immediately. Until when the junction temperature falls below a value, which equals to thermal-shutdown threshold minus thermal-shutdown hysteresis, the output turns on again. www.3peak.com 11 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Application and Implementation Note Information in the following application sections is not part of the 3PEAK’s component specification and 3PEAK does not warrant its accuracy or completeness. 3PEAK’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. Application Information The TPL9052 devices are a series of 500-mA high-PSRR, ultra-low noise, low-dropout linear regulators. The following application schematic shows a typical usage of the TPL9052 series. Typical Application Figure 14 shows the typical application schematic of the TPL9052 series. Input CIN = 1µF COUT = 1µF TPL9052 Off On Output VOUT VIN EN GND Figure 14. Typical Application Circuit Input Capacitor and Output Capacitor 3PEAK recommends adding a 1-μF or greater capacitor with a 0.1-μF bypass capacitor in parallel at the IN pin to keep the input voltage stable. The voltage rating of the capacitors must be greater than the maximum input voltage. To ensure loop stability, the TPL9052 series requires an output capacitor of 1 μF or greater. 3PEAK recommends selecting an X5R- or X7R-type ceramic capacitor with low ESR over temperature. Both input capacitors and output capacitors must be placed as close to the device pins as possible. Power Dissipation During normal operation, the LDO junction temperature should not exceed 125°C. Using the below equations to calculate the power dissipation and estimate the junction temperature. The power dissipation can be calculated using Equation 1. PD = VIN − VOUT × IOUT + VIN × IGND (1) The junction temperature can be estimated using Equation 2. θJA is the junction-to-ambient thermal resistance. TJ = TA + PD × θJA www.3peak.com (2) 12 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Layout Layout Guideline • • Both input capacitors and output capacitors must be placed as close to the device pins as possible. • It is recommended to use wide and thick copper to minimize I×R drop and heat dissipation. It is recommended to bypass the input pin to ground with a 0.1-μF bypass capacitor. The loop area formed by the bypass capacitor connection, the IN pin, and the GND pin of the system must be as small as possible. www.3peak.com 13 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Tape and Reel Information Order Number Package TPL9052xxS5TR-S (1) SOT23-5 D1 (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) 180.0 13.1 3.2 3.2 1.4 P0 (mm) W0 (mm) 4.0 8.0 Pin1 Quadrant Q3 (1) Output voltage value, xx = 12 to 36. e.g., 33 means 3.3 V output voltage. www.3peak.com 14 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Package Outline Dimensions SOT23-5 www.3peak.com 15 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO Order Information Order Number Operating Temperature Range Package Marking Information MSL Transport Media, Quantity TPL905212-S5TR-S −40°C to +125°C SOT23-5 L8G MSL3 Tape and Reel, 3,000 TPL905215-S5TR-S −40°C to +125°C SOT23-5 L8I MSL3 Tape and Reel, 3,000 TPL905218-S5TR-S −40°C to +125°C SOT23-5 L8K MSL3 Tape and Reel, 3,000 TPL905225-S5TR-S −40°C to +125°C SOT23-5 L8P MSL3 Tape and Reel, 3,000 TPL905228-S5TR-S −40°C to +125°C SOT23-5 L8T MSL3 Tape and Reel, 3,000 TPL905230-S5TR-S −40°C to +125°C SOT23-5 L8W MSL3 Tape and Reel, 3,000 TPL905233-S5TR-S −40°C to +125°C SOT23-5 L8Z MSL3 Tape and Reel, 3,000 TPL905236-S5TR-S −40°C to +125°C SOT23-5 L82 MSL3 Tape and Reel, 3,000 Eco Plan Green: 3PEAK defines "Green" to mean RoHS compatible and free of halogen substances. www.3peak.com 16 / 17 DA20230603A1 TPL9052-S Series 500-mA High PSRR, Ultra-low Noise LDO IMPORTANT NOTICE AND DISCLAIMER Trademarks. Any of the 思瑞浦 or 3PEAK trade names, trademarks, graphic marks, and domain names(“Trademarks”) contained in this document/material are the property of 3PEAK. You may NOT reproduce, modify, publish, transmit or distribute any Trademark without the prior written consent of 3PEAK. Performance Information. Performance tests or performance range contained in this document/material are results of design simulation or actual tests conducted under designated testing environment. Any differences in testing environment or simulation environment, including but not limited to testing method, testing process or testing temperature, may affect actual performance of the product. Forward-Looking Statements. The information in this document/material may contain forward-looking statements, except for statements or descriptions of historical facts. These forward-looking statements are based upon our current understanding of our industry, management philosophy and certain assumptions and speculative calculations. These forward-looking statements are subject to risks and uncertainties and our actual results may differ. Please do not rely solely on the above information to make your business decisions. Disclaimer. 3PEAK provides technical and reliability data (including data sheets), design resources (including reference designs), application or other design recommendations, networking tools, security information and other resources "As Is". 3PEAK makes no warranty as to the absence of defects, and makes no warranties of any kind, express or implied, including, without limitation, implied warranties as to merchantability, fitness for a particular purpose or non-infringement of any third-party’s intellectual property rights. www.3peak.com 17 / 17 DA20230603A1