ATA6564
High-Speed CAN Transceiver
with Silent Mode - CAN FD Ready
Features
General Description
• Fully ISO 11898-2, ISO 11898-2: 2016 and SAE
J2962-2 Compliant
• CAN FD Ready
• Communication Speed up to 5 Mbit/s
• Low Electromagnetic Emission (EME) and High
Electromagnetic Immunity (EMI)
• Differential Receiver with Wide Common Mode
Range
• Compatible to 3.3V and 5V Microcontrollers
• Functional Behavior Predictable under all Supply
Conditions
• Transceiver Disengages from the Bus When Not
Powered-Up
• RXD Recessive Clamping Detection
• High Electrostatic Discharge (ESD) Handling
Capability on the Bus Pins
• Bus Pins Protected Against Transients in
Automotive Environments
• Transmit Data (TXD) Dominant Time-out Function
• Undervoltage Detection on VCC and VIO Pins
• CANH/CANL Short-Circuit and Overtemperature
Protected
• Fulfills the OEM “Hardware Requirements for LIN,
CAN and FlexRay Interfaces in Automotive
Applications”, Rev. 1.3
• Qualified According to AEC-Q100
• Two Ambient Temperature Grades:
- ATA6564-GAQW1 and ATA6564-GBQW1 up
to Tamb = +125°C
- ATA6564-GAQW0 and ATA6564-GBQW0 up
to Tamb = +150°C
• Packages: 8-pin SOIC, 8-pin VDFN with Wettable
Flanks (Moisture Sensitivity Level 1)
The ATA6564 is a high-speed CAN transceiver that
provides an interface between a controller area
network (CAN) protocol controller and the physical
two-wire CAN bus. The transceiver is designed for
high-speed (up to 5 Mbit/s) CAN applications in the
automotive industry, providing differential transmit and
receive capability to (a microcontroller with) a CAN
protocol controller.
Applications
Classical CAN and CAN FD networks in Automotive,
Industrial, Aerospace, Medical and Consumer
applications.
2017-2019 Microchip Technology Inc.
It offers improved electromagnetic compatibility (EMC)
and electrostatic discharge (ESD) performance, as well
as features such as:
• ideal passive behavior to the CAN bus when the
supply voltage is off
• direct interfacing to microcontrollers with supply
voltages from 3V to 5V
Two operating modes together with the dedicated
fail-safe features make the ATA6564 an excellent
choice for all types of high-speed CAN networks
especially in nodes which do not require a Standby
mode with wake-up capability via the bus.
Package Types
ATA6564
8-pin SOIC
TXD
1
GND
2
8
S
7
CANH
ATA6564
VCC
3
6
CANL
RXD
4
5
VIO
ATA6564
8-pin VDFN
TXD
GND
VCC
RXD
ATA6564
S
CANH
CANL
VIO
DS20005784C-page 1
ATA6564
ATA6564 Family Members
Device
Grade 0
ATA6564-GAQW0
x
ATA6564-GBQW0
x
Grade 1
VDFN8
SOIC8
x
x
ATA6564-GAQW1
x
ATA6564-GBQW1
x
Description
Silent mode, VIO - pin for compatibility
with 3,3V and 5V microcontroller
Silent mode, VIO - pin for compatibility
with 3,3V and 5V microcontroller
x
x
Silent mode, VIO - pin for compatibility
with 3,3V and 5V microcontroller
Silent mode, VIO - pin for compatibility
with 3,3V and 5V microcontroller
Functional Block Diagram
VIO
VCC
5
3
ATA6564
VCC
Temperature
Protection
VIO
7
CANH
TXD
TXD
Time-OutTimer
1
8
Slope
Control
and
Driver
HSC(1)
VIO
4
CANL
Control
Unit
S
RXD
6
MUX
2
GND
Note 1: HSC: High-speed comparator.
DS20005784C-page 2
2017-2019 Microchip Technology Inc.
ATA6564
1.0
DEVICE OVERVIEW
The ATA6564 is a stand-alone high-speed CAN
transceiver compliant with the ISO 11898-2, ISO
11898-2: 2016 and SAE J2962-2 CAN standards. It
provides very low current consumption in Silent mode.
FIGURE 1-1:
1.1
Operating Modes
The ATA6564 supports two operating modes: Silent
and Normal. These modes can be selected via the S
pin. See Figure 1-1 and Table 1-1 for a description of
the operating modes.
OPERATING MODES
VCC < Vuvd(VCC) or
VIO < Vuvd(VIO)
VCC < Vuvd(VCC) or
VIO < Vuvd(VIO)
Unpowered
Mode
VCC > Vuvd(VCC) and
VIO > Vuvd(VIO) and
S=1
VCC > Vuvd(VCC) and
VIO > Vuvd(VIO) and
S=0
S = 0 and
TXD = 1 and
Error = 0
Silent
Mode
Normal
Mode
S = 1 or
Error = 1
TABLE 1-1:
OPERATING MODES
Mode
1.1.1
Outputs
S
Pin TXD
CAN Driver
Pin RXD
x(2)
x(2)
Recessive
Recessive
Silent
HIGH
x(2)
Recessive
Active(1)
Normal
LOW
LOW
Dominant
LOW
LOW
HIGH
Recessive
HIGH
Unpowered
Note 1:
2:
Inputs
LOW if the CAN bus is dominant, HIGH if the CAN bus is recessive.
Irrelevant
NORMAL MODE
A low level on the S pin together with a high level on
pin TXD selects the Normal mode. In this mode the
transceiver is able to transmit and receive data via the
CANH and CANL bus lines (see Section “Functional
Block Diagram”). The output driver stage is active
and drives data from the TXD input to the CAN bus.
The high-speed comparator (HSC) converts the
analog data on the bus lines into digital data which is
output to pin RXD. The bus biasing is set to VVCC/2
and the undervoltage monitoring of VCC is active.
Please note that the device cannot enter Normal mode
as long as TXD is at ground level.
The slope of the output signals on the bus lines is
controlled and optimized in a way that ensures the
lowest possible electromagnetic emission (EME).
To switch the device in normal operating mode, set the
S pin to low and the TXD pin to high (see Table 1-1
and Figure 1-2). The S pin provides a pull-down
resistor to GND, thus ensuring a defined level if the pin
is open.
2017-2019 Microchip Technology Inc.
DS20005784C-page 3
ATA6564
FIGURE 1-2:
SWITCHING FROM SILENT MODE TO NORMAL MODE
S
t
TXD
t
tdel(sil-norm) =
10μs max
Operation
Mode
Silent Mode
Normal Mode
t
1.1.2
SILENT MODE
A high level on the S pin selects Silent mode. This
receive-only mode can be used to test the connection
of the bus medium. In Silent mode the ATA6564 can
still receive data from the bus, but the transmitter is
disabled and therefore no data can be sent to the CAN
bus. The bus pins are released to recessive state. All
other IC functions, including the high-speed
comparator (HSC), continue to operate as they do in
Normal mode. Silent mode can be used to prevent a
faulty CAN controller from disrupting all network
communications.
1.2
1.2.1
Fail-safe Features
TXD DOMINANT TIME-OUT
FUNCTION
A TXD dominant time-out timer is started when the
TXD pin is set to LOW. If the LOW state on the TXD pin
persists for longer than tto(dom)TXD, the transmitter is
disabled, releasing the bus lines to recessive state.
This function prevents a hardware and/or software
application failure from driving the bus lines to a
permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is
reset when the TXD pin is set to high. If the low state
on the TXD pin was longer than tto(dom)TXD, then the
TXD pin has to be set to high longer 4 µs in order to
reset the TXD dominant time-out timer.
DS20005784C-page 4
1.2.2
INTERNAL PULL-UP/PULL-DOWN
STRUCTURE AT THE TXD AND S
INPUT PINS
The TXD pin has an internal pull-up resistor to VIO and
the S pin an internal pull-down resistor to GND. This
ensures a safe, defined state in case one or all of these
pins are left floating.
1.2.3
UNDERVOLTAGE DETECTION ON
PINS VCC AND VIO
If VVCC or VVIO drop below their respective
undervoltage detection levels (Vuvd(VCC) and Vuvd(VIO)
(see Section TABLE 2-1:, Electrical Characteristics),
the transceiver switches off and disengages from the
bus until VVCC and VVIO have recovered. The logic
state of the S pin is ignored until the VCC voltage or the
VIO voltage has recovered.
1.2.4
OVERTEMPERATURE
PROTECTION
The
output
drivers
are
protected
against
overtemperature conditions. If the junction temperature
exceeds the shutdown junction temperature, TJsd, the
output drivers are disabled until the junction
temperature drops below TJsd and pin TXD is at high
level again. This ensures that output driver oscillations
due to temperature drift are avoided.
2017-2019 Microchip Technology Inc.
ATA6564
FIGURE 1-3:
RELEASE OF TRANSMISSION AFTER OVERTEMPERATURE CONDITION
Failure
Overtemp
OT
Overtemperature
t
TXD
9,2
GND
t
BUS VDIFF
(CANH-CANL)
D
R
D
R
D
R
tt
RXD
9,2
GND
t
1.2.5
SHORT-CIRCUIT PROTECTION OF
THE BUS PINS
The CANH and CANL bus outputs are short-circuit protected, either against GND or a positive supply voltage.
A current-limiting circuit protects the transceiver
against damage. If the device is heating up due to a
continuous short on CANH or CANL, the internal
overtemperature protection switches off the bus
transmitter.
FIGURE 1-4:
1.2.6
RXD RECESSIVE CLAMPING
This fail-safe feature prevents the controller from
sending data on the bus if its RXD line is clamped to
HIGH (e.g., recessive). That is, if the RXD pin cannot
signalize a dominant bus condition because it is e.g,
shorted to VCC, the transmitter within ATA6564 is
disabled to avoid possible data collisions on the bus. In
Normal and Silent mode, the device permanently
compares the state of the high-speed comparator
(HSC) with the state of the RXD pin. If the HSC
indicates a dominant bus state for more than tRC_det
without the RXD pin doing the same, a recessive
clamping situation is detected and the device is forced
into Silent mode. This Fail-safe mode is released by
either entering Unpowered mode or if the RXD pin is
showing a dominant (e.g., LOW) level again.
RXD RECESSIVE CLAMPING DETECTION
CAN
TXD
RXD
Operation
Mode
Normal
Silent
Normal
If the clamping condition is removed and a
dominant bus is detected, the transceiver
goes back to normal mode.
2017-2019 Microchip Technology Inc.
DS20005784C-page 5
ATA6564
1.3
Pin Descriptions
The descriptions of the pins are listed in Table 1-2.
TABLE 1-2:
PIN FUNCTION TABLE
Pin Number
Pin Name
1
TXD
2
GND
Ground supply
3
VCC
Supply voltage
4
RXD
Receive data output; reads out data from the bus lines
5
VIO
Supply voltage for I/O level adapter
Note 1:
Description
Transmit data input
6
CANL
Low-level CAN bus line
7
CANH
High-level CAN bus line
8
S
Silent mode control input
9
EP(1)
Exposed Thermal Pad: Heat slug, internally connected to the GND pin.
Only for the VDFN package.
DS20005784C-page 6
2017-2019 Microchip Technology Inc.
ATA6564
1.4
Typical Application
3.3V
BAT
12V
100nF
Microcontroller
5
TXD
RXD
GND
+
5V
12V
VCC
VIO
VDD
S
22μF
100nF
(1)
3
7
CANH
CANH
8
1
ATA6564
4
6
CANL
CANL
2
GND
GND
(1) The size of this capacitor depends on the used external voltage regulator.
Note 1: For VDFN package: Heat slug must always be connected to GND.
2017-2019 Microchip Technology Inc.
DS20005784C-page 7
ATA6564
2.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
DC Voltage at CANH and CANL ................................................................................................................ –27V to +42V
Transient Voltage on CANH and CANL (ISO 7637 part 2) ..................................................................... –150V to +100V
Max. differential bus voltage......................................................................................................................... –5V to +18V
DC voltage on all other pins ..................................................................................................................... –0.3V to +5.5V
ESD on CANH and CANL pins (IEC 61000-4-2)......................................................................................................±8 kV
ESD (HBM following STM 5.1 with 1.5 k/100 pF) (Pins CANH, CANL to GND)................................................... ±6 kV
Component Level ESD (HBM according to ANSI/ESD STM 5.1) JESD22-A114, AEC-Q 100 (002) ...................... ±4 kV
CDM ESD STM 5.3.1 ............................................................................................................................................. ±750V
ESD machine model AEC-Q100-RevF(003) .......................................................................................................... ±200V
Virtual Junction Temperature................................................................................................................. –40°C to +175°C
Storage Temperature..............................................................................................................................–55°C to +150°C
† Notice: Stresses beyond those listed below may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
DS20005784C-page 8
2017-2019 Microchip Technology Inc.
ATA6564
TABLE 2-1:
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Grade 1: Tamb = –40°C to +125°C, Grade 0: Tamb = –40°C to +150°C, TvJ 170°C,
VVCC= 4.5V to 5.5V; VVIO = 2.8V to 5.5V; RL = 60, CL = 100 pF, unless otherwise specified. All voltages are defined
in relation to ground; positive currents flow into the IC.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Supply, Pin VCC
Supply Voltage
VVCC
4.5
—
5.5
V
IVCC_sil
1.9
2.5
3
mA
Silent Mode, VTXD = VVIO
Supply Current in Normal
Mode
IVCC_rec
IVCC_dom
IVCC_short
2
30
5
70
85
mA
50
Recessive, VTXD = VVIO
Dominant, VTXD = 0V
Short between CANH and
CANL(Note 1)
Undervoltage Detection
Threshold on Pin VCC
Vuvd(VCC)
2.75
—
4.5
V
Supply Current in Silent
Mode
I/O Level Adapter Supply, Pin VIO
Supply Voltage on Pin VIO
VVIO
2.8
—
5.5
V
IVIO_rec
10
80
250
µA
Normal and Silent Mode
recessive, VTXD = VVIO
IVIO_dom
50
350
500
µA
Normal and Silent Mode
dominant, VTXD = 0V
Vuvd(VIO)
1.3
—
2.7
V
High-Level Input Voltage
VIH
0.7
VVIO
—
VVIO +
0.3
V
Low-Level Input Voltage
VIL
–0.3
—
0.3
VVIO
V
Pull-Down Resistor to GND
Rpd
75
125
175
kΩ
VS = VVIO
Low-Level Leakage Current
IL
–2
—
+2
µA
VS = 0V
High-Level Input Voltage
VIH
0.7
VVIO
—
VVIO +
0.3
V
Low-Level Input Voltage
VIL
–0.3
—
0.3
VVIO
V
Pull-up Resistor to VIO
RTXD
20
35
50
kΩ
VTXD = 0V
High-Level Leakage Current
ITDX
–2
—
+2
µA
Normal Mode, VTXD = VVIO
Input Capacitance
CTXD
—
5
10
pF
Note 3
Supply Current on Pin VIO
Undervoltage Detection
Threshold on Pin VIO
Mode Control Input, Pin S
CAN Transmit Data Input, Pin TXD
CAN Receive Data Output, Pin RXD
High-Level Output Current
IOH
–8
—
-1
mA
VRXD = VVIO – 0.4V, VVIO = VVCC
Low-Level Output Current
IOL
2
—
12
mA
VRXD = 0.4V, Bus Dominant
Bus Lines, Pins CANH and CANL
Single Ended Dominant
Output Voltage
V
VO(dom)
2.75
0.5
Note 1:
2:
3:
3.5
1.5
4.5
2.25
VTXD = 0V, t < tto(dom)TXD
RL = 50 to 65
- pin CANH
- pin CANL(Note 1)
100% correlation tested.
Characterized on samples.
Design parameter.
2017-2019 Microchip Technology Inc.
DS20005784C-page 9
ATA6564
TABLE 2-1:
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Grade 1: Tamb = –40°C to +125°C, Grade 0: Tamb = –40°C to +150°C, TvJ 170°C,
VVCC= 4.5V to 5.5V; VVIO = 2.8V to 5.5V; RL = 60, CL = 100 pF, unless otherwise specified. All voltages are defined
in relation to ground; positive currents flow into the IC.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Transmitter Voltage
Symmetry
VSym
0.9
1
1.1
—
VSym = (VCANH + VCANL)
/VVCC(Note 3)
Bus Differential Output
Voltage
VDiff
1.5
—
3
V
VTXD = 0V, t < tto(dom)TXD
RL = 45 to 65
1.5
—
3.3
V
VTXD = 0V, t < tto(dom)TXD
RL = 70 (Note 3)
1.5
—
5
V
VTXD = 0V, t < tto(dom)TXD
RL = 2240 (Note 3)
–50
—
+50
mV
VVCC = 4.75V to 5.25V
VTXD = VVIO, receive, no load
Recessive Output Voltage
VO(rec)
2
0.5 x
VVCC
3
V
Normal and Silent Mode,
VTXD = VVIO, no load
Differential Receiver
Threshold Voltage (HSC)
Vth(RX)dif
0.5
0.7
0.9
V
Normal and Silent Mode,
Vcm(CAN) = –27V to +27V
Differential Receiver
Hysteresis Voltage (HSC)
Vhys(RX)dif
50
120
200
mV
Normal and Silent Mode,
Vcm(CAN) = –27V to +27V
Dominant Output Current
IIO(dom)
–75
35
—
–35
75
mA
mA
VTXD = 0V, t < tto(dom)TXD,
VVCC = 5V
- pin CANH, VCANH = –5V
- pin CANL, VCANL = +40V
Recessive Output Current
IIO(rec)
–5
—
+5
mA
Normal and Silent Mode,
VTXD = VVIO, no load,
VCANH = VCANL = –27V to +32V
Leakage Current
IIO(leak)
–5
0
+5
µA
VVCC = VVIO = 0V,
VCANH = VCANL = 5V
IIO(leak)
–5
0
+5
µA
VCC = VIO connected to GND
with 47k
VCANH = VCANL = 5V (Note 3)
Ri
9
15
28
kΩ
VCANH = VCANL = 4V
Ri
9
15
28
kΩ
–2V ≤ VCANH ≤ +7V,
–2V ≤ VCANL ≤ +7V (Note 3)
∆Ri
–1
0
+1
%
Between CANH and CANL
VCANH = VCANL = 4V
∆Ri
–1
0
+1
%
–2V ≤ VCANH ≤ +7V,
–2V ≤ VCANL ≤ +7V (Note 3)
Ri(dif)
18
30
56
kΩ
VCANH = VCANL = 4V
Ri(dif)
18
30
56
kΩ
–2V ≤ VCANH ≤ +7V,
–2V ≤ VCANL ≤ +7V (Note 3)
Common-Mode Input
Capacitance
Ci(cm)
—
—
20
pF
f = 500 kHz, CANH and CANL
referred to GND (Note 3)
Differential Input
Capacitance
Ci(dif)
—
—
10
pF
f = 500 kHz, between CANH and
CANL (Note 3)
Input Resistance
Input Resistance Deviation
Differential Input Resistance
Note 1:
2:
3:
100% correlation tested.
Characterized on samples.
Design parameter.
DS20005784C-page 10
2017-2019 Microchip Technology Inc.
ATA6564
TABLE 2-1:
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Grade 1: Tamb = –40°C to +125°C, Grade 0: Tamb = –40°C to +150°C, TvJ 170°C,
VVCC= 4.5V to 5.5V; VVIO = 2.8V to 5.5V; RL = 60, CL = 100 pF, unless otherwise specified. All voltages are defined
in relation to ground; positive currents flow into the IC.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Differential Bus Voltage
Range for RECESSIVE State
Detection
VDiff_rec
–3
—
+0.5
V
Normal and Silent Mode (Note 3)
–27V ≤ VCANH ≤ +27V,
–27V ≤ VCANL ≤ +27V
Differential Bus Voltage
Range for DOMINANT State
Detection
VDiff_dom
0.9
—
8
V
Normal and Silent Mode (Note 3)
-27V ≤ VCANH ≤ +27V,
-27V ≤ VCANL ≤ +27V
Transceiver Timing, Pins CANH, CANL, TXD, and RXD, see Figure Figure 2-1 and Figure 2-2
Delay Time from TXD to Bus
Dominant
td(TXD-busdom)
40
—
130
ns
Normal Mode (Note 2)
Delay Time from TXD to Bus
Recessive
td(TXD-busrec)
40
—
130
ns
Normal Mode (Note 2)
Delay Time from Bus
Dominant to RXD
td(busdom-RXD)
20
—
100
ns
Normal and Silent Mode (Note 2)
Delay Time from Bus
Recessive to RXD
td(busrec-RXD)
20
—
100
ns
Normal and Silent Mode (Note 2)
Propagation Delay from TXD
to RXD
tPD(TXD-RXD)
ns
ns
Normal Mode
RL = 60, CL = 100 pF
Rising Edge at Pin TXD
Falling Edge at Pin TXD
40
40
—
—
210
200
tPD(TXD-RXD)
—
—
—
—
300
300
ns
ns
Normal Mode
RL = 150, CL = 100 pF
Rising Edge at Pin TXD (Note 3)
Falling Edge at Pin TXD (Note 3)
TXD Dominant Time-out
Time
tto(dom)TXD
0.8
—
3
ms
VTXD = 0V, Normal Mode
Delay Time for Normal Mode
to Silent Mode Transition
tdel(norm-sil)
—
—
10
µs
Rising at Pin S (Note 3)
Delay Time for Silent Mode
to Normal Mode Transition
tdel(sil-norm)
—
—
10
µs
Falling at Pin S (Note 3)
Debouncing Time for
Recessive Clamping State
Detection
tRC_det
—
90
—
ns
V(CANH-CANL) > 900 mV
RXD = HIGH (Note 3)
Transceiver Timing for Higher Bit Rates, Pins CANH, CANL, TXD, and RXD, see Figure 2-1 and Figure 2-3,
External Capacitor on the RXD Pin CRXD ≤ 20 pF
Recessive Bit Time on Pin
RXD
Recessive Bit Time on the
Bus
Note 1:
2:
3:
tBit(RXD)
400
—
550
ns
Normal Mode, tBit(TXD) = 500 ns
(Note 1)
RL = 60, CL = 100 pF
tBit(RXD)
120
—
220
ns
Normal Mode, tBit(TXD) = 200 ns
RL = 60, CL = 100 pF
tBit(Bus)
435
—
530
ns
Normal Mode, tBit(TXD) = 500 ns
(Note 1)
RL = 60, CL = 100 pF
tBit(Bus)
155
—
210
ns
Normal Mode, tBit(TXD) = 200 ns
RL = 60, CL = 100 pF
100% correlation tested.
Characterized on samples.
Design parameter.
2017-2019 Microchip Technology Inc.
DS20005784C-page 11
ATA6564
TABLE 2-1:
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Grade 1: Tamb = –40°C to +125°C, Grade 0: Tamb = –40°C to +150°C, TvJ 170°C,
VVCC= 4.5V to 5.5V; VVIO = 2.8V to 5.5V; RL = 60, CL = 100 pF, unless otherwise specified. All voltages are defined
in relation to ground; positive currents flow into the IC.
Parameters
Receiver Timing Symmetry
Note 1:
2:
3:
Sym.
Min.
Typ.
Max.
Units
Conditions
tRec
–65
—
+40
ns
Normal mode, tBit(TXD) = 500ns
tRec = tBit(RXD)–tBit(Bus) (Note 1)
RL = 60, CL = 100 pF
tRec
–45
—
+15
ns
Normal mode, tBit(TXD) = 200ns
tRec = tBit(RXD)–tBit(Bus)
RL = 60, CL = 100 pF
100% correlation tested.
Characterized on samples.
Design parameter.
TABLE 2-2:
TEMPERATURE SPECIFICATIONS
Parameters
Sym.
Min.
Typ.
Max.
Units
Thermal Resistance Virtual Junction to
Ambient
RthvJA
—
145
—
K/W
Thermal Shutdown of the Bus Drivers
for ATA6564-GAQW1 (Grade 1)
TvJsd
150
—
195
°C
Thermal Shutdown of the Bus Drivers
for ATA6564-GAQW0 (Grade 0)
TvJsd
170
—
195
°C
TvJsd_hys
—
15
—
°C
Thermal Resistance Virtual Junction to
Heat Slug
RthvJC
—
10
—
K/W
Thermal Resistance Virtual Junction to
Ambient, where Heat Slug is soldered
to PCB according to JEDEC
RthvJA
—
50
—
K/W
Thermal Shutdown of the Bus Drivers
for ATA6564-GBQW1 (Grade 1)
TvJsd
150
—
195
°C
Thermal Shutdown of the Bus Drivers
for ATA6564-GBQW0 (Grade 0)
TvJsd
170
—
195
°C
TvJsd_hys
—
15
—
°C
Conditions
8-Pin SOIC
Thermal Shutdown Hysteresis
8-Pin VDFN
Thermal Shutdown Hysteresis
DS20005784C-page 12
2017-2019 Microchip Technology Inc.
ATA6564
FIGURE 2-1:
TIMING TEST CIRCUIT FOR THE ATA6564 CAN TRANSCEIVER
+5V
+
22μF
100nF
5
VIO
1
TXD
3
VCC
7
CANH
RL
4
15pF
RXD
GND
6
CANL
S
2
FIGURE 2-2:
CL
8
CAN TRANSCEIVER TIMING DIAGRAM 1
HIGH
TXD
LOW
CANH
CANL
dominant
0.9V
VDiff
0.5V
recessive
HIGH
0.7VIO
RXD
0.3VIO
LOW
td(TXD-busdom)
td(TXD-busrec)
td(busdom-RXD)
tPD(TXD-RXD)
2017-2019 Microchip Technology Inc.
td(busrec-RXD)
tPD(TXD-RXD)
DS20005784C-page 13
ATA6564
FIGURE 2-3:
CAN TRANSCEIVER TIMING DIAGRAM 2
70%
TXD
30%
5 x tBit(TXD)
tBit(TXD)
VDiff
900mV
500mV
tBit(Bus)
RXD
70%
30%
tBit(RXD)
DS20005784C-page 14
2017-2019 Microchip Technology Inc.
ATA6564
3.0
PACKAGING INFORMATION
3.1
Package Marking Information
8-Lead SOIC
Example
Grade 1
Grade 0
Atmel 721
Atmel 721
ATA6564H
ATA6564
1729256
1729256
Example
8-Lead VDFN 3 X 3 mm
Grade 0
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Grade 1
6564H
6564
256
256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
2017-2019 Microchip Technology Inc.
DS20005784C-page 15
ATA6564
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A
D
NOTE 5
N
E
2
E1
2
E1
E
NOTE 1
2
1
e
B
NX b
0.25
C A–B D
NOTE 5
TOP VIEW
0.10 C
C
A A2
SEATING
PLANE
8X
A1
SIDE VIEW
0.10 C
h
R0.13
h
R0.13
H
SEE VIEW C
VIEW A–A
0.23
L
(L1)
VIEW C
Microchip Technology Drawing No. C04-057-SN Rev D Sheet 1 of 2
DS20005784C-page 16
2017-2019 Microchip Technology Inc.
ATA6564
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
Number of Pins
N
e
Pitch
Overall Height
A
Molded Package Thickness
A2
§
Standoff
A1
Overall Width
E
Molded Package Width
E1
Overall Length
D
Chamfer (Optional)
h
Foot Length
L
Footprint
L1
Foot Angle
c
Lead Thickness
b
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
MIN
1.25
0.10
0.25
0.40
0°
0.17
0.31
5°
5°
MILLIMETERS
NOM
8
1.27 BSC
6.00 BSC
3.90 BSC
4.90 BSC
1.04 REF
-
MAX
1.75
0.25
0.50
1.27
8°
0.25
0.51
15°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Microchip Technology Drawing No. C04-057-SN Rev D Sheet 2 of 2
2017-2019 Microchip Technology Inc.
DS20005784C-page 17
ATA6564
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
C
Y1
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Contact Pad Spacing
C
Contact Pad Width (X8)
X1
Contact Pad Length (X8)
Y1
MIN
MILLIMETERS
NOM
1.27 BSC
5.40
MAX
0.60
1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2057-SN Rev B
DS20005784C-page 18
2017-2019 Microchip Technology Inc.
ATA6564
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
N
(DATUM A)
(DATUM B)
E
NOTE 1
2X
0.10 C
1
2
2X
TOP VIEW
0.10 C
0.10 C
C
A
A1
SEATING
PLANE
8X
(A3)
0.08 C
SIDE VIEW
0.10
C A B
D2
1
A
2
NOTE 1
0.10
A
C A B
E2
K
N
L
8X b
e
BOTTOM VIEW
0.10
0.05
C A B
C
Microchip Technology Drawing C04-21358 Rev B Sheet 1 of 2
2017-2019 Microchip Technology Inc.
DS20005784C-page 19
ATA6564
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
A4
PARTIALLY
PLATED
E3
SECTION A–A
Units
Dimension Limits
Number of Terminals
N
e
Pitch
Overall Height
A
Standoff
A1
Terminal Thickness
A3
Overall Length
D
Exposed Pad Length
D2
Overall Width
E
Exposed Pad Width
E2
b
Terminal Width
Terminal Length
L
K
Terminal-to-Exposed-Pad
Wettable Flank Step Cut Depth
A4
E3
Wettable Flank Step Cut Width
MIN
0.80
0.00
2.30
1.50
0.25
0.35
0.20
0.10
-
MILLIMETERS
NOM
8
0.65 BSC
0.85
0.03
0.203 REF
3.00 BSC
2.40
3.00 BSC
1.60
0.30
0.40
0.13
-
MAX
0.90
0.05
2.50
1.70
0.35
0.45
0.15
0.04
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-21358 Rev B Sheet 2 of 2
DS20005784C-page 20
2017-2019 Microchip Technology Inc.
ATA6564
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Y2
EV
8
ØV
C X2
EV
CH
G1
Y1
1
2
SILK SCREEN
X1
G2
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
Contact Pitch
E
Optional Center Pad Width
X2
Optional Center Pad Length
Y2
Contact Pad Spacing
C
Contact Pad Width (X8)
X1
Contact Pad Length (X8)
Y1
Contact Pad to Center Pad (X8)
G1
Contact Pad to Contact Pad (X6)
G2
Pin 1 Index Chamfer
CH
Thermal Via Diameter
V
Thermal Via Pitch
EV
MIN
MILLIMETERS
NOM
0.65 BSC
MAX
1.70
2.50
3.00
0.35
0.80
0.20
0.20
0.20
0.33
1.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-23358 Rev B
2017-2019 Microchip Technology Inc.
DS20005784C-page 21
ATA6564
NOTES:
DS20005784C-page 22
2017-2019 Microchip Technology Inc.
ATA6564
APPENDIX A:
REVISION HISTORY
Revision C (August 2019)
The following is the list of modifications:
1.
2.
Updated TABLE 2-2: “Temperature Specifications”.
Added test conditions at several parameters in
TABLE 2-1: “Electrical Characteristics”.
Revision B (July 2017)
The following is the list of modifications:
3.
4.
5.
6.
7.
8.
9.
Added the new device ATA6564-GBQW0 and
updated the related information across the
document.
Updated ATA6564 Family Members Table.
Corrected TABLE 2-1: Electrical Characteristics.
Updated TABLE 2-2: Temperature Specifications.
Updated the VDFN8 package drawing and
added a Grade 0 package example to
Section 3.1, Package Marking Information.
Added a ATA6564-GBQW0 example to
“Product Identification System” section.
Various typographical edits.
Revision A (June 2017)
• Original release of this document.
2017-2019 Microchip Technology Inc.
DS20005784C-page 23
ATA6564
NOTES:
DS20005784C-page 24
2017-2019 Microchip Technology Inc.
ATA6564
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
Device
[X](1)
XX
X
X
Examples:
a)
ATA6564-GAQW0:
Package Tape and Reel Package directives Temperature
Option
classification
Range
Device:
ATA6564:
Package:
GA
GB
=
=
High-speed CAN Transceiver with Silent
Mode CAN FD Ready
8-Lead SOIC
8-Lead VDFN
Tape and Reel
Option:
Q
=
330 mm diameter Tape and Reel
Package
directives
classification:
W
=
Package according to RoHS(2)
Temperature
Range:
0
1
=
=
Temperature Grade 0 (-40°C to +150°C)
Temperature Grade 1 (-40°C to +125°C)
according to RoHS,
Temperature Grade 0
b)
ATA6564-GBQW0:
ATA6564, 8-Lead VDFN,
Tape and Reel, package
according to RoHS,
Temperature Grade 0
c)
ATA6564-GAQW1:
ATA6564, 8-Lead SOIC,
Tape and Reel, package
according to RoHS,
Temperature Grade 1
d)
2017-2019 Microchip Technology Inc.
ATA6564, 8-Lead SOIC,
Tape and Reel, package
ATA6564-GBQW1:
ATA6564, 8-Lead VDFN,
Tape and Reel, package
according to RoHS,
Temperature Grade 1
Note
1:
Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and is
not printed on the device package. Check with
your Microchip Sales Office for package
availability with the Tape and Reel option.
2:
RoHS compliant, Maximum concentration
value of 0.09% (900 ppm) for Bromine (Br)
and Chlorine (Cl) and less than 0.15% (1500
ppm) total Bromine (Br) and Chlorine (Cl) in
any homogeneous material. Maximum
concentration value of 0.09% (900 ppm) for
Antimony (Sb) in any homogeneous material.
DS20005784C-page 25
ATA6564
NOTES:
DS20005784C-page 26
2017-2019 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA
are registered trademarks of Microchip Technology Incorporated in
the U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company,
EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,
IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision
Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire,
SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, Vite, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2019, Microchip Technology Incorporated, All Rights Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
2017-2019 Microchip Technology Inc.
ISBN: 978-1-5224-4978-2
DS20005784C-page 27
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
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Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
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Tel: 61-2-9868-6733
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Tel: 91-80-3090-4444
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Tel: 408-436-4270
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Tel: 905-695-1980
Fax: 905-695-2078
DS20005784C-page 28
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2017-2019 Microchip Technology Inc.
05/14/19
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