SAMB11 QFN SOC
Ultra-low Power BLE 4.1 SoC
DATASHEET
Description
The SAMB11 is an ultra-low power Bluetooth® SMART (BLE 4.1) System on a Chip
with Integrated MCU, Transceiver, Modem, MAC, PA, TR Switch, and Power
Management Unit (PMU). It is a standalone Cortex®-M0 applications processor with
embedded Flash memory and BLE connectivity.
The qualified Bluetooth Smart protocol stack is stored in dedicated ROM, the
firmware includes L2CAP service layer protocols, Security Manager, Attribute
protocol (ATT), Generic Attribute Profile (GATT) and the Generic Access Profile
(GAP). Additionally, application profiles such as Proximity, Thermometer, Heart Rate,
Blood Pressure, and many others are supported and included in the protocol stack.
Features
2.4GHz transceiver and Modem
– -95dBm/-93dBm programmable receiver sensitivity
– -20 to +3.5dBm programmable TX output power
– Integrated T/R switch
– Single wire antenna connection
ARM® Cortex®-M0 32-bit processor
– Single wire Debug (SWD) interface
– 4-channel DMA controller
– Brown-out detector and Power On Reset
– Watchdog Timer
Memory
– 128kB embedded RAM (96kB available for application)
– 128kB embedded ROM
– 256kB Stacked Flash Memory
Hardware Security Accelerators
– AES-128
– SHA-256
Peripherals
– 23 digital and 4 mixed-signal GPIOs with 96kΩ internal programmable pull-up or
down resistors and retention capability, and 3 wake up GPIOs with 96kΩ internal
pull-up resistor
– 2x SPI Master/Slave
– 2x I2C Master/Slave and 1x I2C Slave
– 2x UART
– Three-axis quadrature decoder
– 4x Pulse Width Modulation (PWM), three General Purpose Timers, and one
Wakeup Timer
– 4-channel 11-bit ADC
Clock
– Integrated 26MHz RC oscillator
Atmel-42426D-SAM-B11-Ultra-Low-Power-BLE-4.1-SoC-Datasheet_08/2016
– 26MHz crystal oscillator
– Integrated 2MHz sleep RC oscillator
– 32.768kHz RTC crystal oscillator
Ultra Low Power
– 1.1µA sleep current (8K RAM retention and RTC running)
– 3.0mA peak TX current (0dBm, 3.6V)
– 4.2mA peak RX current (3.6V, -93dBm sensitivity)
Integrated Power Management
– 2.3 to 4.3V battery voltage range
– 2.3 to 3.6V input range for I/O (limited by Flash memory)
– Fully integrated Buck DC/DC converter
Bluetooth SIG Certification
– The ATSAMB11 uses the ATBTLC1000 as its Bluetooth controller and is certified
under the ATBTLC1000.
QD ID Controller (see declaration D028678)
QD ID Host (see declaration D028679)
2
SAMB11
Ultra Low Power BLE 4.1 SoC [Datasheet]
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Atmel-42426D-SAM-B11-Ultra-Low-Power-BLE-4.1-SoC-Datasheet_08/2016
Ta bl e of Conte nts
1
Ordering Information ................................................................................................... 5
2
Package Information ................................................................................................... 5
3
Block Diagram ............................................................................................................. 6
4
Pinout Information....................................................................................................... 7
5
Package drawing ....................................................................................................... 10
6
Power Management ................................................................................................... 11
6.1
6.2
6.3
6.4
6.5
6.6
7
Clocking ..................................................................................................................... 19
7.1
7.2
7.3
7.4
8
Overview ........................................................................................................................................ 19
26MHz Crystal Oscillator (XO) ....................................................................................................... 20
32.768kHz RTC Crystal Oscillator (RTC XO) ................................................................................ 21
7.3.1 General Information ..................................................................................................... 21
7.3.2 RTC XO Design and Interface Specification ................................................................ 23
7.3.3 RTC Characterization with Gm Code Variation at Supply 1.2V and Temp. = 25°C ..... 23
7.3.4 RTC Characterization with Supply Variation and Temp. = 25°C .................................. 24
2MHz and 26MHz Integrated RC Oscillator ................................................................................... 25
CPU and Memory Subsystem ................................................................................... 27
8.1
8.2
8.3
8.4
9
Power Architecture ........................................................................................................................ 11
DC/DC Converter ........................................................................................................................... 12
Power Consumption....................................................................................................................... 13
6.3.1 Description of Device States ........................................................................................ 13
6.3.2 Controlling the Device States ....................................................................................... 14
6.3.3 Current Consumption in Various Device States ........................................................... 14
Power-up Sequence ...................................................................................................................... 15
Power On Reset (POR) and Brown Out Detector (BOD) ............................................................... 16
Digital and Mixed-Signal I/O Pin Behavior during Power-Up Sequences....................................... 17
ARM Subsystem ............................................................................................................................ 27
8.1.2 Features....................................................................................................................... 27
8.1.3 Module Descriptions .................................................................................................... 28
Memory Subsystem ....................................................................................................................... 29
8.2.1 Shared Instruction and Data Memory .......................................................................... 29
8.2.2 ROM ............................................................................................................................ 30
8.2.3 BLE Retention Memory ................................................................................................ 30
Non-volatile Memory ...................................................................................................................... 30
Flash Memory ................................................................................................................................ 30
Bluetooth Low Energy (BLE) Subsystem ................................................................ 31
9.1
9.2
9.3
BLE Core ....................................................................................................................................... 31
9.1.1 Features....................................................................................................................... 31
BLE Radio...................................................................................................................................... 31
9.2.1 Receiver Performance ................................................................................................. 31
9.2.2 Transmitter Performance ............................................................................................. 32
Atmel Bluetooth SmartConnect Stack ............................................................................................ 33
10 External Interfaces .................................................................................................... 34
SAMB11 Ultra Low Power BLE 4.1 SoC [Datasheet]
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3 3
10.1 Overview ........................................................................................................................................ 34
10.2 I2C Master/Slave Interface ............................................................................................................. 36
10.2.1 Description ................................................................................................................... 36
10.2.2 I2C Interface Timing ..................................................................................................... 37
10.3 SPI Master/Slave Interface ............................................................................................................ 38
10.3.1 Description ................................................................................................................... 38
10.3.2 SPI Interface Modes .................................................................................................... 39
10.3.3 SPI Slave Timing ......................................................................................................... 40
10.3.4 SPI Master Timing ....................................................................................................... 41
10.4 UART Interface .............................................................................................................................. 42
10.5 GPIOs ............................................................................................................................................ 42
10.6 Analog to Digital Converter (ADC) ................................................................................................. 44
10.6.1 Overview ...................................................................................................................... 44
10.6.2 Timing .......................................................................................................................... 44
10.6.3 Performance ................................................................................................................ 45
10.7 Software Programmable Timer and Pulse Width Modulator .......................................................... 48
10.8 Clock Output .................................................................................................................................. 48
10.8.1 Variable Frequency Clock Output Using Fractional Divider ......................................... 48
10.8.2 Fixed Frequency Clock Output .................................................................................... 48
10.9 Three-axis Quadrature Decoder .................................................................................................... 49
11 Reference Design ...................................................................................................... 50
12 Bill of Material (BOM) ................................................................................................ 51
13 Electrical Characteristics .......................................................................................... 52
13.1 Absolute Maximum Ratings ........................................................................................................... 52
13.2 Recommended Operating Conditions ............................................................................................ 52
13.3 DC Characteristics ......................................................................................................................... 53
14 Reflow Profile Information ........................................................................................ 54
14.1 Storage Condition .......................................................................................................................... 54
14.1.1 Moisture Barrier Bag Before Opened ........................................................................... 54
14.1.2 Moisture Barrier Bag Open .......................................................................................... 54
14.2 Stencil Design ................................................................................................................................ 54
14.3 Baking Conditions .......................................................................................................................... 54
14.4 Soldering and Reflow Condition ..................................................................................................... 54
14.4.1 Reflow Oven ................................................................................................................ 54
15 Errata .......................................................................................................................... 56
16 Reference Documentation and Support................................................................... 57
16.1 Reference Documents ................................................................................................................... 57
17 Document Revision History ...................................................................................... 58
4
SAMB11
Ultra Low Power BLE 4.1 SoC [Datasheet]
4
Atmel-42426D-SAM-B11-Ultra-Low-Power-BLE-4.1-SoC-Datasheet_08/2016
1
Ordering Information
Ordering Code
2
Package
Description
ATSAMB11G18A-MU-T
6x6mm QFN 48
SAMB11Tape & Reel
ATSAMB11G18A-MU-Y
6x6mm QFN 48
SAMB11 Tray
Package Information
Table 2-1.
SAMB11 6x6 QFN 48 Package Information
Parameter
Value
Package Size
6x6
QFN Pad Count
48
Total Thickness
0.85
QFN Pad Pitch
0.4
Pad Width
0.2
Exposed Pad size
4.2x4.2
Units
mm
Tolerance
±0.1 mm
+0.15/-0.05mm
mm
SAMB11 Ultra Low Power BLE 4.1 SoC [Datasheet]
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3
Block Diagram
Figure 3-1.
6
SAMB11 Block Diagram
SAMB11
Ultra Low Power BLE 4.1 SoC [Datasheet]
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Atmel-42426D-SAM-B11-Ultra-Low-Power-BLE-4.1-SoC-Datasheet_08/2016
4
Pinout Information
SAMB11 is offered in an exposed pad 48-pin QFN package. This package has an exposed paddle that must be
connected to the system board ground. The QFN package pin assignment is shown in Figure 4-1. The color
shading is used to indicate the pin type as follows:
Red – analog
Green – digital I/O (switchable power domain)
Blue – digital I/O (always-on power domain)
Yellow – digital I/O power
Purple – PMU
Shaded green/red – configurable mixed-signal GPIO (digital/analog)
The SAMB11 pins are described in Table 4-1.
Figure 4-1.
SAMB11 Pin Assignment
SAMB11 Ultra Low Power BLE 4.1 SoC [Datasheet]
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Table 4-1.
Pin #
Pin Name
Pin Type
Description / Default Function
1
VDD_VCO
Analog/RF
RF Supply 1.2V
2
VDD_RF
Analog/RF
RF Supply 1.2V
3
RFIO
Analog/RF
RX input and TX output
4
VDD_AMS
Analog/RF
AMS Supply 1.2V
LP_GPIO_0
Digital I/O, Programmable
Pull-Up/Down
SWD Clock
LP_GPIO_1
Digital I/O, Programmable
Pull-Up/Down
SWD I/O
LP_GPIO_2
Digital I/O, Programmable
Pull-Up/Down
UART1 RXD
LP_GPIO_3
Digital I/O, Programmable
Pull-Up/Down
UART1 TXD
LP_GPIO_4
Digital I/O, Programmable
Pull-Up/Down
UART1 CTS
LP_GPIO_22
Digital I/O, Programmable
Pull-Up/Down
GPIO
LP_GPIO_23
Digital I/O, Programmable
Pull-Up/Down
GPIO
LP_GPIO_5
Digital I/O, Programmable
Pull-Up/Down
UART1 RTS
LP_GPIO_6
Digital I/O, Programmable
Pull-Up/Down
UART2 RXD
LP_GPIO_7
Digital I/O, Programmable
Pull-Up/Down
UART2 TXD
LP_GPIO_8
Digital I/O, Programmable
Pull-Up/Down
I2C0 SDA (high-drive pad, see Table 13-3)
5
6
7
8
9
10
11
12
13
14
15
16
LP_GPIO_9
Digital I/O, Programmable
Pull-Up/Down
I2C0 SCL (high-drive pad, see Table 13-3)
17
LP_GPIO_10
Digital I/O, Programmable
Pull-Up/Down
SPI0 SCK
18
LP_GPIO_11
Digital I/O, Programmable
Pull-Up/Down
SPI0 MOSI
19
LP_GPIO_12
Digital I/O, Programmable
Pull-Up/Down
SPI0 SSN
20
LP_GPIO_13
Digital I/O, Programmable
Pull-Up/Down
SPI0 MISO
21
VSW
PMU
DC/DC Converter Switching Node
22
VBATT_BUCK
PMU
DC/DC Converter Supply and General Battery Connection
23
VDDC_PD4
PMU
DC/DC Converter 1.2V output and feedback node
GPIO_MS1
Mixed Signal I/O,
Programmable Pull-Up/Down
Configurable to be a GPIO Mixed Signal only (ADC
interface)
24
8
SAMB11 Pin Description with Default Peripheral Mapping
SAMB11
Ultra Low Power BLE 4.1 SoC [Datasheet]
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Atmel-42426D-SAM-B11-Ultra-Low-Power-BLE-4.1-SoC-Datasheet_08/2016
Pin #
25
26
27
28
29
Pin Name
Pin Type
Description / Default Function
GPIO_MS2
Mixed Signal I/O,
Programmable Pull-Up/Down
Configurable to be a GPIO Mixed Signal only (ADC
interface)
CHIP_EN
PMU
Master Enable for chip
GPIO_MS3
Mixed Signal I/O,
Programmable Pull-Up/Down
Configurable to be a GPIO Mixed Signal only (ADC
interface)
GPIO_MS4
Mixed Signal I/O,
Programmable Pull-Up/Down
Configurable to be a GPIO Mixed Signal only (ADC
interface)
PMU
Low Power LDO output (connect to 1µF decoupling
cap)
LP_LDO_OUT_1P2
30
RTC_CLK_P
PMU
RTC terminal + / 32.768kHz XTAL +
31
RTC_CLK_N
PMU
RTC terminal - / 32.768kHz XTAL +
Digital Input
Test Mode Selection (SCAN ATE) /GND for normal
operation
AO_GPIO_0
Digital I/O, Programmable
Pull-Up
Always On External Wakeup
AO_GPIO_1
Digital I/O, Programmable
Pull-Up
Always On External Wakeup
AO_GPIO_2
Digital I/O, Programmable
Pull-Up
Always On External Wakeup
LP_GPIO_14
Digital I/O, Programmable
Pull-Up/Down
UART2 CTS
LP_GPIO_15
Digital I/O, Programmable
Pull-Up/Down
UART2 RTS
32
33
34
35
36
37
AO_TEST_MODE
38
LP_GPIO_16
Digital I/O, Programmable
Pull-Up/Down
GPIO
39
VDDIO
I/O Power
I/O Supply can be less than or equal to
VBATT_BUCK
40
LP_GPIO_17
Digital I/O, Programmable
Pull-Up/Down
GPIO
41
LP_GPIO_18
Digital I/O, Programmable
Pull-Up/Down
GPIO
42
LP_GPIO_19
Digital I/O, Programmable
Pull-Up/Down
GPIO
43
LP_GPIO_20
Digital I/O, Programmable
Pull-Up/Down
GPIO
44
XO_P
Analog/RF
XO Crystal +
45
XO_N
Analog/RF
XO Crystal -
46
TPP
Analog/RF
Test MUX + output
47
TPN
Analog/RF
Test MUX – output
48
VDD_SXDIG
Analog/RF
RF Supply 1.2V
SAMB11 Ultra Low Power BLE 4.1 SoC [Datasheet]
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5
Package drawing
The SAMB11 QFN package is RoHS/green compliant.
Figure 5-1.
10
SAMB11 6x6 QFN 48 Package Outline Drawing
SAMB11
Ultra Low Power BLE 4.1 SoC [Datasheet]
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6
Power Management
6.1
Power Architecture
SAMB11 uses an innovative power architecture to eliminate the need for external regulators and reduce the
number of off-chip components. The integrated power management block includes a DC/DC buck converter and
separate Low Dropout (LDO) regulators for different power domains. The DCDC buck converter converts battery
voltage to a lower internal voltage for the different circuit blocks and does this with high efficiency. The DCDC
requires three external components for proper operation (two inductors L 4.7µH and 9.1nH, and one capacitor C
4.7µF).
The stacked Flash has a supply pin that is internally connected to the VDDIO pin.
Figure 6-1.
SAMB11 Power Architecture
RF/AMS
VDD_VCO
LDO2
1.0V
~
SX
VDD_AMS,
VDD_RF,
VDD_SXDIG
RF/AMS Core
VDDIO
Digital
RF/AMS Core Voltage
Pads
Digital Core
eFuse
dcdc_ena
PMU
2.5V
Digital Core Voltage
Sleep
Osc
EFuse
LDO
LP LDO
ena
Dig Core
LDO
ena
CHIP_EN
VDDC_PD4
ena
DC/DC Converter
VBATT_BUCK
Vin
Vout
VSW
Off-Chip
LC
SAMB11 Ultra Low Power BLE 4.1 SoC [Datasheet] 11 1
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1
6.2
DC/DC Converter
The DC/DC Converter is intended to supply current to the BLE digital core and the RF transceiver core. The
DC/DC consists of a power switch, 26MHz RC oscillator, controller, external inductor, and an external capacitor.
The DCDC is utilizing pulse skipping discontinuous mode as its control scheme. The DC/DC specifications are
shown in the following tables and charts.
Table 6-1.
DC/DC Converter Specifications (performance is guaranteed for 4.7µF L and 4.7µF C)
Parameter
Symbol
Min.
Typ.
Max.
Unit
IREG
0
10
30
mA
Dependent on external component values and
DC/DC settings with acceptable efficiency
(1)
CEXT
4.7 10%
4.7
20
µF
External capacitance range
External inductor range
LEXT
2.2 10%
4.7
4.7
+10%
µH
External inductance range
Battery voltage
VBAT
2.3
3.3
4.3
Output current capability
External capacitor range
Note
Functionality and stability given
V
Output voltage range
VREG
Current consumption
IDD
1.05
1.2
125
Startup time
tstartup
50
Voltage ripple
ΔVREG
5
10
η
85
VOS
0
Line Regulation
ΔVREG
10
Load regulation
ΔVREG
5
Efficiency
Overshoot at startup
Note:
1.
Table 6-2.
1.47
25mV step size
µA
DC/DC quiescent current
600
µs
Dependent on external component values and
DC/DC settings
30
mV
Dependent on external component values and
DC/DC settings
%
No overshoot, no output pre-charge
mV
From 2.35 - 4.3V
From 0 - 10mA
External Cap: Sum of all caps connected to the DC/DC output node.
DC/DC Converter Allowable Onboard Inductor and Capacitor Values (VBATT=3V)
Vripple [mV]
Inductor [µH]
RX sensitivity (1) [dBm]
Efficiency [%]
C=2.2µF
C=4.7µF
C=10µF
2.2
83
N/A
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