ATSAMB11-MR210CA/MR510CA
Ultra Low Power BLE 4.1 Module
DATASHEET
Description
The Atmel® ATSAMB11-MR210CA is an ultra-low power Bluetooth® SMART (BLE
4.1) module with Integrated MCU, Transceiver, Modem, MAC, PA, TR Switch, and
Power Management Unit (PMU). It is a standalone Cortex®-M0 applications
processor with embedded Flash memory and BLE connectivity.
The qualified Bluetooth Smart protocol stack is stored in dedicated ROM, the
firmware includes L2CAP service layer protocols, Security Manager, Attribute
protocol (ATT), Generic Attribute Profile (GATT), and the Generic Access Profile
(GAP). Additionally, application profiles such as Proximity, Thermometer, Heart Rate,
Blood Pressure, and many others are supported and included in the protocol stack.
The module contains all circuitry required including a ceramic high gain antenna,
26MHz crystal, and PMU circuitry. The customer simply needs to place the module
on the customer PCB design, provide power and a 32kHz Real Time Clock or crystal.
All References to ATSAMB11-MR210CA, refer to the ATSAMB11-MR510CA as well.
Features
Complies with Bluetooth V4.1, ETSI EN 300 328 and EN 300 440 Class 2, FCC
CFR47 Part 15, and ARIB STD-T66
Bluetooth Certification
– QD ID Controller (see declaration D028678)
– QD ID Host (see declaration D028679)
2.4GHz transceiver and Modem
– -95dBm/-93dBm programmable receiver sensitivity
– -20 to +3.5dBm programmable TX output power
– Integrated T/R switch
– Incorporated antenna
ARM® Cortex®-M0 32-bit processor
– Single wire Debug (SWD) interface
– Four-channel DMA controller
– Brown-out detector and Power On Reset
– Watch Dog Timer
Memory
– 128KB embedded RAM (96KB available for application)
– 128KB embedded ROM
– 256KB stacked Flash memory
Hardware Security Accelerators
– AES-128
Atmel-42498D-SAMB11-MR210CA-MR510CA_Datasheet_09/2016
– SHA-256
Peripherals
– 23 digital and three wakeup GPIO with 96kΩ Internal Pullup resistors, four Mixed
Signal GPIO
– 2x SPI (Master/Slave)
– 2x I2C (Master/Slave)
– 2x UART
– 1x SPI Flash
– 3-axis quadrature decoder
– 4x Pulse Width Modulation (PWM), three General Purpose Timers, and one
Wake up Timer
– Four channel 11-bit ADC
Clock
– Integrated 26MHz oscillator
– 26MHz crystal oscillator
– Fully integrated sleep oscillator
Ultra-low power
– Less than 1.1µA sleep current (8K RAM retention and RTC running)
– 3.2mA peak TX current (0dBm, 3.6V)
– 5.0mA peak RX current (3.6V, -95dBm sensitivity)
Integrated Power management
– 2.3 - 4.2V input range for PMU
– 2.3 - 3.6V input range for I/O (limited by Flash memory)
– Fully integrated Buck DC-DC converter
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ATSAMB11-MR210CA/MR510CA
[DATASHEET]
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Table of Contents
3
Block Diagram ............................................................................................................. 5
4
Pin Out Information ..................................................................................................... 6
4.1
4.2
4.3
5
Electrical Specifications ........................................................................................... 10
5.1
5.2
5.3
5.4
5.5
6
Application Schematic ......................................................................................................................... 15
Applications Schematic with 32.768kHz Crystal .................................................................................. 16
Application Schematic BOM ................................................................................................................ 17
Placement and Routing Guidelines .......................................................................... 18
8.1
8.2
9
Device States ...................................................................................................................................... 12
Receiver Performance......................................................................................................................... 13
Transmitter Performance ..................................................................................................................... 14
Application Schematic .............................................................................................. 15
7.1
7.2
7.3
8
Absolute Maximum Ratings ................................................................................................................. 10
Recommended Operating Conditions ................................................................................................. 10
Restrictions for the Power States ........................................................................................................ 10
Power-up Sequence ............................................................................................................................ 11
RTC Pins ............................................................................................................................................. 11
Characteristics........................................................................................................... 12
6.1
6.2
6.3
7
Pin Assignment ..................................................................................................................................... 6
Pin Description ...................................................................................................................................... 7
Module Outline Drawing ........................................................................................................................ 9
Power and Ground .............................................................................................................................. 19
Interferers ............................................................................................................................................ 19
Reflow Profile Information ........................................................................................ 20
9.1
9.2
9.3
9.4
9.5
Storage Conditions .............................................................................................................................. 20
9.1.1 Moisture Barrier Bag Before Opened ..................................................................................... 20
9.1.2 Moisture Barrier Bag Open ..................................................................................................... 20
Stencil Design ..................................................................................................................................... 20
Baking Conditions ............................................................................................................................... 20
Soldering and Reflow Condition .......................................................................................................... 20
9.4.1 Reflow Oven ........................................................................................................................... 20
Module Assembly Considerations ....................................................................................................... 21
10 Reference Documentation and Support................................................................... 22
10.1 Reference Documents......................................................................................................................... 22
11 Certifications ............................................................................................................. 23
11.1 Agency Compliance ............................................................................................................................ 23
12 Errata .......................................................................................................................... 24
13 Document Revision History ...................................................................................... 25
ATSAMB11-MR210CA/MR510CA [DATASHEET]
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1
Ordering Information
Ordering code
Package
Description
ATATSAMB11-MR210CA
22 x 15mm
Chip Antenna
ATATSAMB11-MR510CA
22 x 15mm
Chip Antenna
The ATATSAMB11-MR510CA module is identical to ATATSAMB11-MR210CA regarding the module footprint and
functionality. The ATATSAMB11-MR510CA also includes the capability of hardware encryption.
2
Package Information
ATATSAMB11-MR210/MR510 Module Information (1)
Table 2-1.
Parameter
Package Size
Value
Units
22.88 X 15.36
mm
Pad Count
40
Total Thickness
~2.1
Pad Pitch
0.9002
Pad Width
0.500
mm
Exposed Pad size
Note:
4
1.
4.4 x 4.4
For details, see Package Drawing in Section 4.3.
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Tolerance
3
Block Diagram
The following image shows the block diagram of the ATSAMB11-MR210CA/MR510 module.
Figure 3-1.
Block Diagram
VDDIO
VBAT
Antenna
Chip_En
AO_GPIO_0/1/2
LP_GPIO
SAMB11
BLE 4.1 SOC
Matching
GPIO_MS1/MS2/MS3/MS4
26MHz
From 32.768kHz
crystal or clock
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4
Pin Out Information
4.1
Pin Assignment
The following image shows the module top view and pin numbering.
P14
P15
P16
P27
P13
P28
P12
P29
P11
P30
P10
P31
P9
P32
P33
ATSAMB11-MR210CA
Module
P8
P7
P34
P6
P35
P5
P36
P4
P37
P3
P38
P2
P39
P1
ATMEL CORP.
ATSAMB11_MR210CA REV___
6
P17
P18
P19
P20
P21
P22
P23
P24
P25
ATSAMB11-MR210 Pin Assignments
P26
Figure 4-1.
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4.2
Pin Description
Table 4-1.
#
Pin Description
Name
Type
Description
Notes
1
Ground
Power
Ground Pin. Connect to PCB ground
2
LP_GPIO_0
I/O
Used for Single Wire Debug Clock
Debug interface pin. Connect to a
header or test point.
3
LP_GPIO_1
I/O
Used for Single Wire Debug Data
Debug interface pin. Connect to a
header or test point.
4
VBAT
Power
Power Supply Pin for the on chip Power Management Unit (PMU).
Connect to a 2.35V – 4.3V power supply.
5
LP_GPIO_2
I/O
General Purpose I/O
Default function is Host UART RXD
6
LP_GPIO_3
I/O
General Purpose I/O
Default function is Host UART TXD
7
LP_GPIO_4
I/O
General Purpose I/O
Default function is Host UART CTS
8
LP_GPIO_22
I/O
General Purpose I/O
9
LP_GPIO_23
I/O
General Purpose I/O
10
LP_GPIO_5
I/O
General Purpose I/O
Default function is Host UART RTS
11
LP_GPIO_6
I/O
General Purpose I/O
Default function is Debug UART
RXD
12
LP_GPIO_7
I/O
General Purpose I/O
Default function is Debug UART
TXD
13
LP_GPIO_8
I/O
General Purpose I/O
Default function is I2C_SDA
14
Ground
Power
Ground Pin. Connect to PCB ground.
15
LP_GPIO_9
I/O
General Purpose I/O
Default function is I2C_SCL
16
LP_GPIO_10
I/O
General Purpose I/O
Default function is SPI_SCK
17
LP_GPIO_11
I/O
General Purpose I/O
Default function is SPI_MOSI
18
LP_GPIO_12
I/O
General Purpose I/O
Default function is SPI_SSN
19
LP_GPIO_13
I/O
General Purpose I/O
Default function is SPI_MISO
20
GPIO_MS1
I/O
Mixed Signal I/O
Configurable to be a GPIO or ADC
input
21
GPIO_MS2
I/O
Mixed Signal I/O
Configurable to be a GPIO or ADC
input
22
Chip_En
Control
Chip Enable. A high level turns on the On Chip PMU and enables operation of the device. Low disables the device and turns off the PMU.
Control this pin with a host GPIO. If
not used, tie to VDDIO.
23
GPIO_MS3
I/O
Mixed Signal I/O
Configurable to be a GPIO or ADC
input
24
GPIO_MS4
I/O
Mixed Signal I/O
Configurable to be a GPIO or ADC
input
25
RTC_CLKP
Positive Pin for Real Time Clock Crystal
Connect to a 32kHz Crystal
26
Ground
27
RTC_CLKN
28
AO_GPIO_0
I/O
Always on GPIO_0. Can be used to wake up the device from sleep.
Can also be used as a general purpose I/O.
29
AO_GPIO_1
I/O
Always on GPIO_0. Can be used to wake up the device from sleep.
Can also be used as a general purpose I/O.
Power
Ground Pin. Connect to PCB ground.
Negative Pin for Real Time Clock Crystal
Connect to a 32kHz Crystal
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#
8
Name
Type
Description
Notes
30
AO_GPIO_2
I/O
Always on GPIO_0. Can be used to wake up the device from sleep.
Can also be used as a general purpose I/O.
31
LP_GPIO_14
I/O
General Purpose I/O
Default function is Debug I2C_SDA
32
VDDIO
Power
Power Supply Pin for the I/O pins. Connect to a 2.3V – 3.6V power
supply.
I/O supply can be less than or equal
to VBAT
33
LP_GPIO_15
I/O
General Purpose I/O
Default function is Debug I2C_SCL
34
LP_GPIO_16
I/O
General Purpose I/O
35
LP_GPIO_17
I/O
General Purpose I/O
36
LP_GPIO_18
I/O
General Purpose I/O
37
LP_GPIO_19
I/O
General Purpose I/O
38
LP_GPIO_20
I/O
General Purpose I/O
39
Ground
Power
Ground Pin. Connect to PCB ground.
40
Paddle
Power
Center Ground Paddle
ATSAMB11-MR210CA/MR510CA
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Connect to inner PCB ground plane
with an array of vias
Module Outline Drawing
The following figure shows the bottom view of the module and the module dimensions. All dimensions are in
millimeters.
Figure 4-2.
ATSAMB11-MR210CA Module Dimensions (millimeters)
15.367
ATSAMB11MR210CA
2.082
1.295
0.70 Typ
NOTE: THIS PAD MUST BE
SOLDERED TO GND.
0.50 Typ
P1
P39
P39
22.885
P1
4.400
P38
P2
P37
SHIELD
15.286
P3
P36
P4
P35
P5
4.400
P34
P6
P33
P7
P32
P31
P30
P8
4.743
6.224
P29
2.345
SHIELD
2.222
P11
P14
P15
P16
P17
P18
P19
P20
P22
0.787
SIDE VIEW
TOP VIEW
P10
P13
P23
0.900
PITCH
P9
P12
P24
1.266
P28
P27
P25
PCB
5.606
P21
13.866
P26
4.3
BOTTOM VIEW
DIMENSION UNITS: MM
DRAWING NOT TO SCALE
UNTOLERANCED DIMENSIONS
Figure 4-3.
ATSAMB11-MR210CA Customer PCB Footprint
15.367
NOTE: THIS PAD M UST
0.50 TYP
BE TIE D TO GN D.
1.50
TYP
P39
P1
4.400
16.70
4.400
0.90 PITCH
6.224
4.743
5.606
1.266
2.222
2.345
SOLDER PAD FOOTPRINT
TOP VIEW
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5
Electrical Specifications
5.1
Absolute Maximum Ratings
The values listed in this section are ratings that can be peaked by the device, but not sustained without causing
irreparable damage to the device.
Table 5-1.
ATSAMB11-MR210CA Absolute Maximum Ratings
Symbol
Characteristic
Min.
Max.
VDDIO
I/O Supply Voltage
-0.3
4.2
VBAT
Battery Supply Voltage
-0.3
5.0
VIN (1)
Digital Input Voltage
-0.3
VDDIO
(2)
Analog Input Voltage
-0.3
1.5
VAIN
VESDHBM (3)
TA
ESD Human Body Model -1000, -2000(see notes below)
Storage Temperature
5.2
1.
2.
3.
-65
150
ºC
125
VIN corresponds to all the digital pins.
VAIN corresponds to the following analog pins: RFIO.
For VESDHBM, each pin is classified as Class 1, or Class 2, or both:
The Class 1 pins include all the pins (both analog and digital)
The Class 2 pins include all digital pins only
VESDHBM is ±1kV for Class1 pins. VESDHBM is ±2kV for Class2 pins
Recommended Operating Conditions
Table 5-2.
Note:
5.3
V
+1000, +2000(see notes below)
Junction Temperature
Note:
Unit
ATSAMB11-MR210CA Recommended Operating Conditions
Symbol
Characteristic
Min.
Typ.
Max.
VDDIO
I/O Supply Voltage Low Range
2.3
3.3
3.6
VBAT
Battery Supply Voltage (1)
2.3
3.6
4.3
Operating Temperature
-40
1.
Units
V
85
ºC
VBAT supply must be greater than or equal to VDDIO.
Restrictions for the Power States
When VDDIO is off (either disconnected or at ground potential), a voltage must not be applied to the device pins.
This is because each pin contains an ESD diode from the pin to the VDDIO supply. This diode will turn on when a
voltage higher than one diode-drop is supplied to the pin. This, in turn, will try to power up the part through the
VDDIO supply.
If a voltage must be applied to the signal pads while the chip is in a low power state, the VDDIO supply must be
on.
Similarly, to prevent the pin-to-ground diode from turning on, do not apply a voltage that is more than 0.3V below
ground to any pin.
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5.4
Power-up Sequence
The power-up/down sequence for ATSAMB1-MR210A is shown in Figure 5-1. The timing parameters are provided
in Table 5-3.
Figure 5-1.
Power-up Sequence
VBATT
t BIO
VDDIO
t IOCE
CHIP_EN
Table 5-3.
Parameter
Power-Up Sequence Timing
Min.
tBIO
0
tIOCE
0
Max. Units
Description
Notes
VBAT rise to VDDIO rise
VBAT and VDDIO can rise simultaneously or can be
tied together
VDDIO rise to CHIP_EN rise
CHIP_EN must not rise before VDDIO. CHIP_EN
must be driven high or low, not left floating
ms
5.5
RTC Pins
Module pins 25 and 27 (RTC_CLKP and RTC_CLKN, respectively) are used for a 32.768kHz crystal. To be
compliant with the BLE specifications for connection events, the frequency accuracy of this clock has to be within
±500ppm. Because of the high accuracy of the 32.768kHz crystal oscillator clock (±25ppm), the power
consumption can be minimized by leaving radio circuits in low power sleep mode for as long as possible until they
need to wake up for the next connection timed event.
The block diagram in Figure 5-2(a) shows how the internal low-frequency Crystal Oscillator (XO) is connected to
the external crystal.
Typically, the crystal should be chosen to have a load capacitance of 7pF to minimize the oscillator current. The
ATSAMB11-MR210CA device has switchable on chip capacitance that can be used to adjust the total load the
crystal sees to meet its load capacitance specification. Refer to the ATSAMB11-2100A datasheet for more
information.
Alternatively, if an external 32.768kHz clock is available, it can be used to drive the RTC_CLKP pin instead of
using a crystal. The XO has 5.625F internal capacitance on the RTC_CLKP pin. To bypass the crystal oscillator an
external signal capable of driving 5.625pF can be applied to the RTC_CLK_P terminal as shown in Figure 5-2(b).
This signal must be 1.2V maximum. RTC_CLK_N must be left unconnected when driving an external source into
RTC_CLK_P.
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Figure 5-2.
ATSAMB11-MR210CA XO Connections to Low-Frequency Crystal Oscillator
External Clock
RTC_CLK_N
RTC_CLK_N
RTC_CLK_P
(b)
(a)
(a) Crystal oscillator is used
Table 5-4.
(b) Crystal oscillator is bypassed
ATSAMB11-MR210CA 32.768kHz External Clock Specification
Parameter
Min.
Oscillation frequency
Typ.
Max.
32.768
Unit.
Comments
kHz Must be able to drive 6pF load @ desired frequency
VinH
0.7
1.2
V
High level input voltage
VinL
0
0.2
V
Low level input voltage
-500
+500
ppm
Stability – Temperature
6
Characteristics
6.1
Device States
Table 6-1.
ATSAMB11-MR210CA Device States
Device State
CHIP_EN
VDDIO
IVBAT (typical)
IVDDIO (typical)
GND
On
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