TC4421VPA

TC4421/TC4422 9A High-Speed MOSFET Drivers Features: General Description: • High Peak Output Current: 9A • Wide Input Supply Voltage Operating Range: - 4.5V to 18V • High Continuous Output Current: 2A Maximum • Fast Rise and Fall Times: - 30 ns with 4,700 pF Load - 180 ns with 47,000 pF Load • Short Propagation Delays: 30 ns (Typical) • Low Supply Current: - With Logic ‘1’ Input – 200 µA (Typical) - With Logic ‘0’ Input – 55 µA (Typical) • Low Output Impedance: 1.4 (Typical) • Latch-Up Protected: Will Withstand 1.5A Output Reverse Current • Input Will Withstand Negative Inputs up to 5V • Pin-Compatible with the TC4420/TC4429 6A MOSFET Driver • Space-saving 8-Pin 6x5 DFN-S Package TC4421/TC4422 are high-current buffers/drivers capable of driving large MOSFETs and IGBTs. These devices are essentially immune to any form of upset, except direct overvoltage or over-dissipation. They cannot be latched under any conditions within their power and voltage ratings. These parts are not subject to damage or improper operation when up to 5V of ground bounce is present on their ground terminals. They can accept, without damage or logic upset, more than 1A inductive current of either polarity being forced back into their outputs. In addition, all terminals are fully protected against up to 4 kV of electrostatic discharge. The TC4421/TC4422 inputs may be driven directly from either TTL or CMOS (3V to 18V). In addition, 300 mV of hysteresis is built into the input, providing noise immunity and allowing the device to be driven from slowly rising or falling waveforms. With both surface-mount and pin-through-hole packages and four operating temperature range offerings, the TC4421/TC4422 family of 9A MOSFET drivers fits into any application where high gate/line capacitance drive is required. Applications: • • • • • Line Drivers for Extra Heavily-Loaded Lines Pulse Generators Driving the Largest MOSFETs and IGBTs Local Power ON/OFF Switch Motor and Solenoid Driver Package Types(1) 8-Pin PDIP/ TC4421 TC4422 SOIJ VDD INPUT NC GND 1 2 3 4 8 7 6 5 VDD VDD OUTPUT OUTPUT OUTPUT OUTPUT GND GND 8-Pin 6x5 DFN-S(2) TC4421 TC4422 VDD 1 INPUT 2 NC 3 GND 4 EP 9 5-Pin TO-220 Tab is Common to VDD VDD 8 VDD 7 OUTPUT OUTPUT 6 OUTPUT OUTPUT 5 GND GND TC4421 TC4422 2: Includes electrically isolated Exposed Thermal Pad (EP), see Table 3-1.  2002-2013 Microchip Technology Inc. INPUT GND VDD GND OUTPUT Note 1: Duplicate pins must both be connected for proper operation. DS20001420F-page 1 TC4421/TC4422 Functional Block Diagram VDD TC4421 Inverting 200 µA 300 mV Output TC4422 Non-Inverting Input 4.7V GND Effective Input C = 25 pF DS20001420F-page 2  2002-2013 Microchip Technology Inc. TC4421/TC4422 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings† Supply Voltage ..................................................... +20V Input Voltage .................... (VDD + 0.3V) to (GND – 5V) Input Current (VIN > VDD)................................... 50 mA Package Power Dissipation (TA  70°C) 5-Pin TO-220 .................................................... 1.6W DFN-S .......................................................... Note 2 PDIP ............................................................ 730 mW SOIJ ............................................................ 750 mW Package Power Dissipation (TA  25°C) 5-Pin TO-220 (with heatsink).......................... 12.5W Thermal Impedances (to case) 5-Pin TO-220 RJ-C ...................................... 10°C/W DC CHARACTERISTICS Electrical Specifications: Unless otherwise noted, TA = +25°C with 4.5V  VDD  18V. Parameters Sym Min Typ Max Units Conditions Logic ‘1’, High-Input Voltage VIH 2.4 1.8 — V Logic ‘0’, Low-Input Voltage VIL — 1.3 0.8 V Input Current IIN –10 — +10 µA 0V  VIN  VDD VOH VDD – 0.025 — — V DC test Input Output High-Output Voltage Low-Output Voltage VOL — — 0.025 V DC test Output Resistance, High ROH — 1.4 —  IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL — 0.9 1.7  IOUT = 10 mA, VDD = 18V Peak Output Current IPK — 9.0 — A VDD = 18V Continuous Output Current IDC 2 — — A 10V  VDD  18V, TA = +25°C (TC4421/TC4422 CAT only) (Note 3) Latch-Up Protection Withstand Reverse Current IREV — > 1.5 — A Duty cycle  2%, t  300 µsec Switching Time (Note 1) Rise Time tR — 60 75 ns Figure 4-1, CL = 10,000 pF Fall Time tF — 60 75 ns Figure 4-1, CL = 10,000 pF Delay Time tD1 — 30 60 ns Figure 4-1 Delay Time tD2 — 33 60 ns Figure 4-1 IS — 0.2 1.5 mA VIN = 3V — 55 150 µA VIN = 0V VDD 4.5 — 18 V Power Supply Power Supply Current Operating Input Voltage Note 1: 2: 3: Switching times ensured by design. Package power dissipation is dependent on the copper pad area on the PCB. Tested during characterization, not production tested.  2002-2013 Microchip Technology Inc. DS20001420F-page 3 TC4421/TC4422 DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE) Electrical Specifications: Unless otherwise noted, over the operating temperature range with 4.5V  VDD  18V. Parameters Sym Min Typ Max Units Conditions Logic ‘1’, High-Input Voltage VIH 2.4 — — V Logic ‘0’, Low-Input Voltage VIL — — 0.8 V Input Current IIN –10 — +10 µA 0V  VIN  VDD High-Output Voltage VOH VDD – 0.025 — — V DC TEST Low-Output Voltage VOL — — 0.025 V DC TEST Output Resistance, High ROH — 2.4 3.6  IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL — 1.8 2.7  IOUT = 10 mA, VDD = 18V tR — 60 120 ns Figure 4-1, CL = 10,000 pF Fall Time tF — 60 120 ns Figure 4-1, CL = 10,000 pF Delay Time tD1 — 50 80 ns Figure 4-1 Delay Time tD2 — 65 80 ns Figure 4-1 mA Input Output Switching Time (Note 1) Rise Time Power Supply Power Supply Current Operating Input Voltage Note 1: IS VDD — — 3 — — 0.2 4.5 — 18 VIN = 3V VIN = 0V V Switching times ensured by design. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V  VDD  18V. Parameters Sym Min Typ Max Units Specified Temperature Range (C) TA 0 — +70 °C Specified Temperature Range (E) TA –40 — +85 °C Specified Temperature Range (V) TA –40 — +125 °C Maximum Junction Temperature TJ — — +150 °C Storage Temperature Range TA –65 — +150 °C Thermal Resistance, 5L-TO-220 JA — 39.5 — °C/W Thermal Resistance, 8L-6x5 DFN-S JA — 35.7 — °C/W Thermal Resistance, 8L-PDIP JA — 89.3 — °C/W Thermal Resistance, 8L-SOIJ JA — 117 — °C/W Conditions Temperature Ranges Package Thermal Resistances DS20001420F-page 4 Typical 4-layer board with vias to ground plane  2002-2013 Microchip Technology Inc. TC4421/TC4422 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25°C with 4.5V  VDD  18V. 220 180 200 160 180 22,000 pF 140 22,000 pF 140 120 10,000 pF 100 80 4700 pF 60 120 100 80 10,000 pF 60 4700 pF 40 40 1000 pF 20 0 tFALL (nsec) tRISE (nsec) 160 20 1000 pF 4 6 FIGURE 2-1: Voltage. 8 14 10 12 VDD (V) 16 0 18 Rise Time vs. Supply 4 6 8 FIGURE 2-4: Voltage. 10 12 VDD (V) 14 16 Fall Time vs. Supply 300 300 5V 5V 250 250 10V 150 15V 100 tFALL (nsec) tRISE (nsec) 10V 200 200 150 15V 100 50 50 0 100 1000 FIGURE 2-2: Load. 10,000 CLOAD (pF) 0 100 100,000 Rise Time vs. Capacitive 1000 FIGURE 2-5: Load. 10,000 CLOAD (pF) 100,000 Fall Time vs. Capacitive 50 90 CLOAD = 1000 pF CLOAD = 10,000 pF VDD = 15V 80 45 70 Time (nsec) Time (nsec) 18 60 tRISE 50 40 tD2 35 tD1 tFALL 40 30 30 -40 0 40 80 120 25 4 6 TA (°C) FIGURE 2-3: Temperature. Rise and Fall Times vs.  2002-2013 Microchip Technology Inc. 8 10 12 14 16 18 VDD (V) FIGURE 2-6: Supply Voltage. Propagation Delay vs. DS20001420F-page 5 TC4421/TC4422 Note: Unless otherwise indicated, TA = +25°C with 4.5V  VDD  18V. 220 180 VDD = 18V 200 160 140 140 120 63.2 kHz 1.125 MHz 100 80 ISUPPLY (mA) ISUPPLY (mA) 160 632 kHz 60 40 0 100 1000 10,000 CLOAD (pF) 100,000 140 140 120 120 2 MHz 63.2 kHz 80 1.125 MHz 40 632 kHz 20 200 kHz 100 Frequency (kHz) 1000 22,000 pF 10,000 pF 47,000 pF 100 80 60 4700 pF 0.1 µF 40 20 kHz 20 470 pF 0 0 100 1000 10,000 CLOAD (pF) 10 100,000 FIGURE 2-8: Supply Current vs. Capacitive Load (VDD = 12V). 100 Frequency (kHz) 1000 FIGURE 2-11: Supply Current vs. Frequency (VDD = 12V). 100 120 VDD = 6V 200 kHz VDD = 6V 47,000 pF 100 80 22,000 pF 60 50 63.2 kHz 40 2 MHz ISUPPLY (mA) 70 80 10,000 pF 4700 pF 60 40 632 kHz 0.1 µF 20 20 kHz 10 0 100 470 pF VDD = 12V 160 60 4700 pF 180 VDD = 12V 100 0.1 µF 60 FIGURE 2-10: Supply Current vs. Frequency (VDD = 18V). ISUPPLY (mA) ISUPPLY (mA) 80 0 10 180 ISUPPLY (mA) 100 20 FIGURE 2-7: Supply Current vs. Capacitive Load (VDD = 18V). 160 10,000 pF 120 40 20 kHz 200 kHz 20 30 22,000 pF 2 MHz 180 90 VDD = 18V 47,000 pF 20 470 pF 1000 10,000 CLOAD (pF) 100,000 FIGURE 2-9: Supply Current vs. Capacitive Load (VDD = 6V). DS20001420F-page 6 0 10 100 Frequency (kHz) 1000 FIGURE 2-12: Supply Current vs. Frequency (VDD = 6V).  2002-2013 Microchip Technology Inc. TC4421/TC4422 Note: Unless otherwise indicated, TA = +25°C with 4.5V  VDD  18V. 50 120 VDD = 10V CLOAD = 10,000 pF 110 100 VDD = 18V CLOAD = 10,000 pF VIN = 5V 45 90 Time (nsec) Time (nsec) 80 70 60 tD2 50 40 35 tD2 tD1 30 40 tD1 30 25 20 10 20 –60 –40 –20 0 1 2 3 4 5 6 7 8 Input Amplitude (V) FIGURE 2-13: Amplitude. 9 10 Propagation Delay vs. Input 0 FIGURE 2-16: Temperature. 10-6 20 40 TA (°C) 60 80 100 120 Propagation Delay vs. 103 IQUIESCENT (µA) A•sec VDD = 18V 10-7 Input = 1 102 Input = 0 10-8 4 6 8 10 12 VDD (V) 14 16 18 -60 -40 -20 NOTE: The values on this graph represent the loss seen by the driver during a complete cycle. For the loss in a single transition, divide the stated value by 2. FIGURE 2-14: Supply Voltage. 20 40 60 80 100 120 TJ (°C) Crossover Energy vs. FIGURE 2-17: vs. Temperature. 6 6 5.5 5.5 5 Quiescent Supply Current 5 4.5 4.5 TJ = 150°C 4 RDS(ON) (Ω) RDS(ON) (Ω) 0 3.5 3 2.5 2 1.5 1 1 0.5 0.5 4 6 8 TJ = 150°C 3 2.5 2 TJ = 25°C 1.5 4 3.5 10 12 VDD (V) 14 16 FIGURE 2-15: High-State Output Resistance vs. Supply Voltage.  2002-2013 Microchip Technology Inc. 18 TJ = 25°C 4 6 8 10 12 VDD (V) 14 16 18 FIGURE 2-18: Low-State Output Resistance vs. Supply Voltage. DS20001420F-page 7 TC4421/TC4422 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. PDIP, SOIJ Pin No. 6x5 DFN-S Pin No. TO-220 Symbol 1 1 — VDD 3.1 Description Supply input, 4.5V to 18V 2 2 1 INPUT 3 3 — NC Control input, TTL/CMOS compatible input 4 4 2 GND Ground 5 5 4 GND Ground 6 6 5 OUTPUT/OUTPUT CMOS push-pull output 7 7 — OUTPUT/OUTPUT CMOS push-pull output No connection 8 8 3 VDD Supply input, 4.5V to 18V — 9 — EP Exposed thermal pad — — TAB VDD Thermal tab is at the VDD potential Supply Input (VDD) 3.3 CMOS Push-Pull Output (OUTPUT, OUTPUT) The VDD input is the bias supply for the MOSFET driver and is rated for 4.5V to 18V with respect to the ground pin. The VDD input should be bypassed to ground with a local ceramic capacitor. The value of the capacitor should be chosen based on the capacitive load that is being driven. A minimum value of 1.0 µF is suggested. The MOSFET driver output is a low-impedance, CMOS, push-pull style output capable of driving a capacitive load with 9.0A peak currents. The MOSFET driver output is capable of withstanding 1.5A peak reverse currents of either polarity. 3.2 3.4 Control Input (INPUT) The MOSFET driver input is a high-impedance, TTL/CMOS compatible input. The input also has 300 mV of hysteresis between the high and low thresholds that prevents output glitching even when the rise and fall time of the input signal is very slow. Ground (GND) The ground pins are the return path for the bias current and for the high peak currents that discharge the load capacitor. The ground pins should be tied into a ground plane or have very short traces to the bias supply source return. 3.5 Exposed Thermal Pad (EP) The exposed thermal pad of the 6x5 DFN-S package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane or other copper plane on a printed circuit board to aid in heat removal from the package. DS20001420F-page 8  2002-2013 Microchip Technology Inc. TC4421/TC4422 4.0 APPLICATIONS INFORMATION +5V 90% Input VDD = 18V 0V 4.7 µF 1 tD2 tF +18V tR 90% 90% 6 10% 0V 0.1 µF 2 tD1 Output 8 0.1 µF Input 10% 10% Inverting Driver Output TC4421 7 CL = 10,000 pF +5V 90% Input 4 5 10% 0V +18V Input: 100 kHz, square wave, tRISE = tFALL  10 nsec tD1 90% tR Output 0V 90% tD2 10% tF 10% Non-Inverting Driver Note: Pinout shown is for the DFN-S, PDIP and SOIJ packages. FIGURE 4-1: TC4422 Switching Time Test Circuits.  2002-2013 Microchip Technology Inc. DS20001420F-page 9 TC4421/TC4422 5.0 5.1 PACKAGING INFORMATION Package Marking Information 5-Lead TO-220 Example OR XXXXXXXXX XXXXXXXXX YYWWNNN TC4421 3 CAT e^^ 1318256 TC4421CAT 1318256 Example 8-Lead DFN-S (6x5x0.9 mm) TC4421 EMF 1318 256 NNN PIN 1 TC4421 3 EMF e^^ 1318 256 OR PIN 1 Example 8-Lead SOIJ (5.28 mm) TC4421 ESM 1318256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Legend: XX...X Y YY WW NNN e3 * Note: DS20001420F-page 10 TC4421 3 ESM e^^ 1318256 OR Example TC4421 CPA256 OR TC4421 e3 256 CPA^^ 1318 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. 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