AD9284-250EBZ

AD9284-250EBZ User Guide UG-178 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD9284 Analog-to-Digital Converter FEATURES DOCUMENTS NEEDED Full featured evaluation board for the AD9284 SPI interface for setup and control Support LVDS output mode option External or on-board oscillator options Balun/transformer or amplifier input drive options Switching power supply VisualAnalog™ and SPIController software interfaces AD9284 data sheet HSC-ADC-EVALCZ data sheet AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version 1.0 User Manual AN-878 Application Note, High Speed ADC SPI Control Software AN-877 Application Note, Interfacing to High Speed ADCs via SPI AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation EQUIPMENT NEEDED Analog signal source and antialiasing filter Sample clock source (if not using the on-board oscillator) Two switching power supplies (6.0 V, 2.5 A), CUI EPS060250UH-PHP-SZ, provided PC running 32-bit Windows® XP, Window Vista, or Windows 7 USB 2.0 port, recommended (USB 1.1-compatible) AD9284 evaluation board HSC-ADC-EVALCZ FPGA-based data capture kit SOFTWARE NEEDED VisualAnalog SPIController GENERAL DESCRIPTION This user guide describes the AD9284 evaluation board, which provides all of the support circuitry required to operate the AD9284 in its various modes and configurations. The application software used to interface with the device is also described. The AD9284 data sheet provides additional information and should be consulted when using the evaluation board. All documents and software tools are available at the FIFO page. For additional information or questions, send an email to highspeed.converters@analog.com. TYPICAL MEASUREMENT SETUP 9284EE01 REV A AD9284 9284EE02A 09228-001 HSC-ADC-EVALCZ Figure 1. AD9284 Evaluation Board and HSC-ADC-EVALCZ Data Capture Board PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. A | Page 1 of 24 UG-178 AD9284-250EBZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Input Signals...................................................................................3 Equipment Needed ........................................................................... 1 Output Signals ...............................................................................3 Software Needed ............................................................................... 1 Default Operation and Jumper Selection Settings ....................4 Documents Needed .......................................................................... 1 Evaluation Board Software Quick Start Procedures .....................5 General Description ......................................................................... 1 Configuring the Board .................................................................5 Typical Measurement Setup ............................................................ 1 Using the Software for Testing.....................................................5 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ...................................9 Evaluation Board Hardware ............................................................ 3 Ordering Information .................................................................... 22 Power Supplies .............................................................................. 3 Bill of Materials ........................................................................... 22 REVISION HISTORY 6/14—Rev. 0 to Rev. A Changes to Figure 13 ........................................................................ 9 Changes to Figure 14 ...................................................................... 10 Changes to Figure 15 ...................................................................... 11 Changes to Figure 16 ...................................................................... 12 Changes to Figure 17 ...................................................................... 13 Changes to Figure 18 ...................................................................... 14 Changes to Figure 19 ...................................................................... 15 5/11—Revision 0: Initial Version Rev. A | Page 2 of 24 AD9284-250EBZ User Guide UG-178 EVALUATION BOARD HARDWARE The AD9284 evaluation board provides all of the support circuitry required to operate the AD9284 in its various modes and configurations. Figure 2 shows the typical bench characterization setup used to evaluate the ac performance of the AD9284. It is critical that the signal sources used for the analog input and clock have very low phase noise ( SPIController or by double-clicking the SPIController software desktop icon. If prompted for a configuration file, select the appropriate one. If not, check the title bar of the window to determine which configuration is loaded. If necessary, choose Cfg Open from the File menu and select the appropriate file based on your part type. Note that the CHIP ID(1) field should be filled to indicate whether the correct SPIController configuration file is loaded (see Figure 7). 09228-009 1. In the ADCBase 0 tab of the SPIController window, you can access all global register settings (see Figure 9). See the AD9284 data sheet; the AN-878 Application Note, High Speed ADC SPI Control Software; and the AN-877 Application Note, Interfacing to High Speed ADCs via SPI, for additional information. Figure 9. SPIController, ADC Base0 09228-007 4. Figure 7. SPIController, CHIP ID(1) Box Click the New DUT button in the SPIController window (see Figure 8). 09228-010 09228-008 2. Note that other settings can be changed on the ADCBase 0 page (see Figure 9) and the ADC A and ADC B pages (see Figure 10) to set up the part in the desired mode. The ADCBase 0 page settings affect the entire part, whereas the settings on the ADC A and ADC B pages affect the selected channel only. See the AD9284 data sheet; the AN-878 Application Note, High Speed ADC SPI Control Software; and the AN-877 Application Note, Interfacing to High Speed ADCs via SPI, for additional information on the available settings. Figure 8. SPIController, New DUT Button Figure 10. SPIController, ADC A Page Rev. A | Page 7 of 24 UG-178 5. AD9284-250EBZ User Guide Troubleshooting Tips Click the Run button in the VisualAnalog toolbar (see Figure 11). If the FFT plot appears abnormal, do the following: • 09228-011 • Figure 11. Run Button in VisualAnalog Toolbar, Collapsed Display Adjusting the Amplitude of the Input Signal If the FFT appears normal but the performance is poor, check the following: The next step is to adjust the amplitude of the input signal for each channel as follows: 1. If you see a normal noise floor when you disconnect the signal generator from the analog input, be sure you are not overdriving the ADC. Reduce the input level, if necessary. In VisualAnalog, click the Settings button in the Input Formatter block. Check that Number Format is set to the correct encoding (offset binary by default). Repeat for the other channel. Adjust the amplitude of the input signal so that the fundamental is at the desired level (examine the Fund Power reading in the left panel of the VisualAnalog Graph - AD9284 FFT window). See Figure 12. • • • • Make sure an appropriate filter is used on the analog input. Make sure the signal generators for the clock and the analog input are clean (low phase noise). Change the analog input frequency slightly if noncoherent sampling is being used. Make sure the SPI configuration file matches the product being evaluated. If the FFT window remains blank after Run is clicked, do the following: • • 09228-012 • Figure 12. Graph Window of VisualAnalog 2. 3. Repeat this procedure for Channel B. Click the disk icon within the Graph window to save the performance plot data as a .csv formatted file. Make sure the evaluation board is securely connected to the HSC-ADC-EVALCZ board. Make sure the FPGA has been programmed by verifying that the DONE LED is illuminated on the HSC-ADCEVALCZ board. If this LED is not illuminated, make sure the U4 switch on the HSC-ADC-EVALCZ board is in the correct position for USB configuration. Make sure the correct FPGA program was installed by selecting the Settings button in the ADC Data Capture block in VisualAnalog. Then select the FPGA tab and verify that the proper FPGA bin file is selected for the part. If VisualAnalog indicates that the FIFO Capture timed out, do the following: • • Rev. A | Page 8 of 24 Make sure all power and USB connections are secure. Probe the DCOA signal at RN601 on the evaluation board and confirm that a clock signal is present at the ADC sampling rate. VIN C104 1UF GND C117 1UF GND C103 10UF GND C116 10UF GND C102 10UF GND C115 10UF GND R103 100K R102 100K Rev. A | Page 9 of 24 EN GND 2 GND 5 SW 4 FB U101 2.2UH L101 3 EN U102 5 SW 4 FB GND 2 GND 1 VIN 2.2UH L103 ADP2108AUJZ-1.8-R7 3 1 VIN ADP2108AUJZ-3.3-R7 SUPPLY REGULATORS GND 1 2 C111 10UF GND C110 10UF GND 100NH GND C113 10UF C108 10UF GND C106 10UF GND A C CR101 C105 10UF S2A-TP GND L104 100NH L102 C101 10UF F101 1.6A Figure 13. Board Power Input and Supply Circuits GND C114 1UF GND C112 1UF GND C109 1UF GND C107 1UF BNX016-01 FL101 E102 2 E107 2 39OHM 1 2 39OHM 1 E105 39OHM 1 2 39OHM 1 E101 GND DRVDD_REG AVDD_REG 3.3V_CLK_REG VIN CR103 LTST-C190GKT GND R101 300 C A 3.3V_AMPVDD_REG CR102 S2A-TP GND Z5.530.3625.0 J102 3.3V GND DVDD (1.8V) GND AVDD (1.8V) 1 2 3 4 5 6 GND E111 2 E112 2 39OHM 1 39OHM 1 GND GND GND GND GND GND C130 0.1UF 2 E110 2 39OHM 1 DRVDD AVDD TP101 BLK AVDD_BENCH C128 0.1UF C127 10UF C129 10UF E109 39OHM 1 DRVDD_BENCH C126 0.1UF C125 10UF VARIABLE POWER SUPPLY INPUT 1 2 3 1 2 3 3.3V_CLK 1 2 3 GND R105 0 AVDD_REG R104 0 DRVDD_REG TP102 BLK ALIAS ALIAS REF_AVDD SPI_DVDD 3.3V_AMPVDD_REG 3.3V_CLK_REG 3.3V_AMPVDD 1 2 3 POWER SUPPLY INPUT J105 J106 J103 J104 J101 3 09228-013 RAPC722X AD9284-250EBZ User Guide UG-178 EVALUATION BOARD SCHEMATICS AND ARTWORK Figure 14. DUT and Related Circuits DURING LAYOUT CHECK IF WE CAN FIT 0402 ELSE 0201 AVDD PINS 48 AVDD C215 .1UF DNI AVDD PINS 45 AVDD AVDD PINS 16 AVDD C211 .1UF DNI AVDD PINS 13 AVDD C209 .1UF DNI AVDD PINS 12 AVDD C207 .1UF DNI AVDD PINS 8 & 9 AVDD C205 .1UF DNI AVDD PIN 6 AVDD C203 .1UF DNI GND C218 .1UF GND C216 .1UF GND C214 .1UF GND C212 .1UF GND C210 .1UF GND C208 .1UF GND C206 .1UF GND C204 .1UF C221 .1UF DNI DRVDD PIN 39 DRVDD GND C222 .1UF GND C223 0.1UF U202 ADR512ARTZ-REEL7 GND C224 0.1UF REF IN CKT 3 GND V_N 2 TRIM 1 V_P R201 2.7K C225 0.1UF GND R204 5K 0 R203 REF_AVDD 3 R205 10K 2 R202 0 SDIO_DUT SDIO_DUT_PWRDN DRVDD SHARE PADS C220 .1UF 1 BLK TP201 GND C226 0.1UF CMV_OUT R206 0 GND C227 0.1UF 1-2 SDIO MODE 2-3 PWRDN MODE NO CONNECT (DEFAULT) J202 SAMTECTSW10608GS3PIN 1 2 3 37 38 39 40 41 42 43 44 45 46 47 48 PAD SG-MLF-7006 U201 AIN_B+ AIN_BAVDD GND AVDD AVDD AVDD AIN_AAIN_A+ AVDD 1-2 SCLK MODE 2-3 LVDS MODE NO CONNECT CMOS MODE (DEFAULT) SAMTECTSW10608GS3PIN AVDD AIN B- AIN B+ AVDD AVDD REF IN AVDD CMV OUT AVDD AIN A+ AIN A- AVDD AVDD AVDD J201 AVDD AVDD 1 2 3 ENC A+ ENC B+ SCLK_DUT SCLK_DUT_CMOS_LVDS DRVDD 65/135/250 MSPS AD9284 SPI_CSB RBIAS C219 .1UF DNI DRVDD CLOCK B ENABLE DRVDD PIN 20 DRVDD ENC AENC B- 10K GND RBIAS AVDD AVDD ENC_B+ ENC_B- AVDD PIN 4 AVDD DRGND GND DRVDD GND DRVDD AVDD OUTPUT_ENABLE AVDD AVDD ENC_A+ ENC_ACSB_DUT SDIO_DUT_PWRDN SCLK_DUT_CMOS_LVDS SPI_SCLK/CMOS_LVDS 36 35 34 33 32 31 30 SPI_SDIO/PWRDN GND DRVDD DRVDD D1B/(D0A+/D0B+) C202 .1UF D2B/(D1A-/D1B-) C201 .1UF DNI 1 CW D7A(D7A+/D7B+) 1 2 D4A/(D6A-/D6B-) D4B/(D2A-/D2B-) D5B/(D2A+/D2B+) D6B/(D3A-/D3B-) D7B/(D3A+/D3B+) DCOB/(DCO-) DCOA/(DCO+) D0A/(D4A-/D4B-) D1A/(D4A+/D4B+) D2A/(D5A-/D5B-) D3A/(D5A+/D5B+) DCO_A DCO_B TSW-102-08-G-S DRVDD J204 CONNECT CLKB ENABLED 1 DEFAULT LOW (DISABLED) 2 19 18 17 16 15 14 13 24 23 22 21 20 D3B_D1P D2B_D1M D1B_D0P D0B_D0M D7B_D3P D6B_D3M D5B_D2P D4B_D2M D5A_D6P D4A_D6M D3A_D5P D2A_D5M D1A_D4P D0A_D4M D7A_D7P D6A_D7M J203 DEFAULT HIGH (EN) CONNECT OUTPUT DISABLED TSW-102-08-G-S GND D5A/(D6A+/D6B+) 29 28 27 26 25 DRGND D0B/(D0A-/D0B-) D6A(D7A-/D7B-) D3B/(D1A+/D1B+) 1 2 3 4 5 6 7 8 9 10 11 12 Rev. A | Page 10 of 24 09228-014 AVDD PIN 1 AVDD UG-178 AD9284-250EBZ User Guide DECOUPLING CAPACITORS, ONE ON THE TOP AND ONE ON THE BOTTOM CLOSE TO THE PINS USB_SDI R301 10K SDIO_DUT R304 Rev. A | Page 11 of 24 100K SDIO_DUT_1P8 R310 0 R303 1.1K Y1 6 Y2 4 1 A1 3 A2 GND 2 5 VCC U301 NC7WZ07P6X USB_SDO R305 1.1K 3.3V_CLK Figure 15. SPI Interface Circuit USB_SCLK USB_CSB R306 R302 1.1K 10K 10K R307 C301 0.1UF NC7WZ16P6X 3 A2 1 A1 SPI_DVDD GND 2 Y2 4 U302 5 VCC Y1 6 SCLK_DUT_1P8 CSB_DUT_1P8 C302 0.1UF R308 R309 SPI_DVDD 100K 100K SPI CIRCUITRY R311 0 R312 0 SCLK_DUT CSB_DUT AD9284-250EBZ User Guide UG-178 09228-015 AIN_B + AIN_B - AIN_A - AIN_A + 1 1 GND J402 GND R401 49.9 DNI R402 49.9 DNI J401 0 DNI R404 0 R403 C401 0.1UF DNI C402 0.1UF GND R405 0 1 GND 0 R421 0 DNI R420 0.1UF C410 0.1UF DNI C409 GND R422 0 LAYOUT: SMA'S SHOULD BE 540 MILS CENTER TO CENTER GND R419 49.9 DNI R418 49.9 DNI J404 GND J403 2 3 4 5 GND 2 3 4 5 DNI 1 1 4 ADT1-1WT+ 2 3 T401 6 2 6 4 1 ADT1-1WT+ 3 T404 3 4 ETC1-1-13 DNI SEC PRI 5 T405 1 3 ETC1-1-13 DNI SEC 1 4 T402 PRI 5 PASSIVE PATH B LAYOUT: SMA'S SHOULD BE 540 MILS CENTER TO CENTER GND 2 3 4 5 DNI GND 2 3 4 5 T403 3 GND T406 AIN_AMP GND C403 1 1 0.1UF C412 33 R437 27.4 DNI 0 AMP_OUT_B- 0 DNI SHARE PADS R426 0 R425 33 R430 0.1UF GND R429 33 33 R451 R427 0 200 R439 0.1UF R424 R428 33 C413 R423 0 SHARE PADS GND 0 R450 200 R438 C416 R413 R436 61.9 CMV_OUT DNI AMP_OUT_B+ GND DNI CMV_OUT 0.1UF C411 GND J406 GND J405 AMP_OUT_A+ 2 3 4 5 DNI GND R408 0 DNI SHARE PADS R409 0 2 3 4 5 0.1UF C404 0 0.1UF GND 33 R411 33 R412 0 R410 33 C405 R407 CMV_OUT R449 0.1UF AMP_OUT_A- R406 0 SHARE PADS 0 R432 0 R431 GND GND 0 R415 0 R414 200 R441 AIN_A+ AIN_A- 9 2 3 12 PAD 5 6 7 8 U401 +VS VOCM FB-OUT 1 +IN -OUT 11 -IN +OUT 10 PD_N FB+OUT 4 PAD -VS 3.3V_AMPVDD 0 R434 0 R433 AIN_B- AIN_B+ ACTIVE PATH A AND B ADA4937-1YCPZ-R7 10UF C417 200 R440 0 R417 0 R416 2.7PF DNI DNI 4.7PF 4.7PF SEC PRI SEC PRI 1 5 1 5 4 3 C406 C414 C407 C415 R448 R435 24 DNI R443 24 DNI R442 C418 C419 TBD0402 DNI 16 15 14 13 TBD0402 DNI 0.1UF DNI 0.1UF DNI PASSIVE PATH A GND 0 DNI R447 0 DNI R446 0 DNI 0 DNI R445 R444 AMP_OUT_B+ AMP_OUT_B- THESE 0 OHMS ARE THERE FOR ALIASES. WE DON'T REQUIRE THESE COMPONENTS AMP_OUT_A+ AMP_OUT_A- 09228-016 ETC1-1-13 DNI ETC1-1-13 DNI Rev. A | Page 12 of 24 4 Figure 16. Analog Input Circuits 2.7PF DNI UG-178 AD9284-250EBZ User Guide Figure 17. Default Clock Path Input Circuits Rev. A | Page 13 of 24 1 2 3 4 5 1 J502 2 3 4 5 CLK_B - CLK_B + 2 3 4 5 1 DNI J503 2 3 4 5 1 J504 LAYOUT: SMA'S SHOULD BE 540 MILS CENTER TO CENTER CLK_A + CLK_A - DNI J501 GND R514 49.9 DNI GND R515 49.9 GND R502 49.9 GND R501 49.9 DNI 0.1UF 0.1UF TP501 BLK C502 TP502 BLK DNI C509 0.1UF C510 C501 0.1UF DNI R503 GND C511 0.1UF DNI 0 R504 0 SHARE PADS? DNI R516 0 R517 GND 0 DNI SHARE PADS? C503 0.1UF DNI 3 1 C513 0.1UF -(NC)T504 3 2 4 5 1 SEC PRI 6 MABA-007159-000000 T503 6 2 4 DNI ADT1-1WT+ GND SEC MABA-007159-000000 -(NC)- C505 0.1UF GND GND OPTIONAL CLOCK B INPUT C512 1000PF GND 1000PF C504 PRI T502 4 2 6 T501 ADT1-1WT+ DNI 1 3 C506 R519 24.9 0.1UF C514 0.1UF R518 24.9 R506 24.9 R505 24.9 2 3 R510 0 R508 0 HMPS-2822-BLK GND R523 0 2ND CR IS TO MAKE LAYOUT AND PARASITIC LOADING SYMMETRICAL 0 HMPS-2822-BLK 2 3 CR503 1 4 0 R522 R521 0 R520 2ND CR IS TO MAKE LAYOUT AND PARASITIC LOADING SYMMETRICAL GND CR501 0 0 1 4 R509 R507 0.1UF C516 0.1UF C515 0.1UF C508 0.1UF C507 ENC_B- ENC_B+ C517 0.1UF GND R525 1K GND GND 3 500MEGHZ Q 4 Q_N 5 Y505 GND R528 75 R526 130 R529 75 R527 130 OPTIONAL CRYSTAL OSCIALLATOR CLOCK SOURCE 6 VDD 1 TRISTATE 2 NC 3.3V_CLK OPTIONAL TERMINATION NEAR DUT GND XSTAL_IN+ ENC_A+ R513 0 DNI OPTIONAL TERMINATION NEAR DUT XSTAL_IN- ENC_A- R511 0 DNI 100 DNI 100 DNI SHARE PADS R512 SHARE PADS R524 XFMR / BALUN CLK CIRCUITRY XSTAL_IN- XSTAL_IN+ AD9284-250EBZ User Guide UG-178 09228-017 UG-178 AD9284-250EBZ User Guide 0 OHM RESISTOR NETWORK FOR LVDS MODE 47 OHM RESISTOR NETWORK FOR CMOS MODE 0 AND 47 0 AND 47 D7A_D7P 1 RN601 16 D7B_D3P 1 RN602 16 O_D7B O_D7A 0 0 D6A_D7M 2 RN601 15 D6B_D3M 2 RN602 15 O_D6B O_D6A 0 0 D5A_D6P RN601 3 14 D5B_D2P 3 RN602 14 O_D5B O_D5A 0 D4A_D6M CHANNEL B O_D4A 0 D3A_D5P RN601 5 12 D4B_D2M 4 RN602 13 O_D4B 0 D3B_D1P 5 RN602 12 O_D3B O_D3A 0 0 D2A_D5M RN601 6 11 D2B_D1M 6 RN602 11 O_D2B O_D2A 0 0 D1A_D4P RN601 7 10 D1B_D0P 7 RN602 10 O_D1B O_D1A 0 0 RN602 D0B_D0M RN601 D0A_D4M 8 9 8 9 O_D0B O_D0A 0 0 DCO DCO_A R601 O_DCO_A 0 DCO_B R602 O_DCO_B 0 Figure 18. Output Buffer Circuits Rev. A | Page 14 of 24 09228-018 CHANNEL A 0 RN601 4 13 AD9284-250EBZ User Guide 6469169-1 O_D0B O_D4B O_D0A O_D4A P1 P2 PLUG HEADER BG1 BG2 BG3 BG4 BG5 BG6 BG7 BG8 BG9 BG10 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DG8 DG9 DG10 6469169-1 PLUG HEADER PLUG HEADER 6469169-1 GND GND Figure 19. FIFO Board Connector Rev. A | Page 15 of 24 6469169-1 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 6469169-1 P1 PLUG HEADER 6469169-1 USB_SDO USB_SDI USB_SCLK P1 PLUG HEADER CSB_DUT_1P8 PLUG HEADER C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 6469169-1 6469169-1 P1 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 P1 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DG8 DG9 DG10 6469169-1 GND 09228-019 GND PLUG HEADER P2 O_D2B O_D6B O_D2A O_D6A USB_CSB A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 P2 6469169-1 BG1 BG2 BG3 BG4 BG5 BG6 BG7 BG8 BG9 BG10 O_DCO_B 6469169-1 PLUG HEADER O_D1B O_D5B O_D1A O_D5A PLUG HEADER P2 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 PLUG HEADER 6469169-1 SDIO_DUT_1P8 SCLK_DUT_1P8 P1 P2 PLUG HEADER O_D3B O_D7B O_D3A O_D7A PLUG HEADER P2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 O_DCO_A UG-178 UG-178 AD9284-250EBZ User Guide 09228-020 Figure 20. Top Side Rev. A | Page 16 of 24 AD9284-250EBZ User Guide UG-178 09228-021 Figure 21. Ground Plane (Layer 2) Rev. A | Page 17 of 24 UG-178 AD9284-250EBZ User Guide 09228-022 Figure 22. Power Plane (Layer 3) Rev. A | Page 18 of 24 AD9284-250EBZ User Guide UG-178 09228-023 Figure 23. Power Plane (Layer 4) Rev. A | Page 19 of 24 UG-178 AD9284-250EBZ User Guide 09228-024 Figure 24. Ground Plane (Layer 5) Rev. A | Page 20 of 24 AD9284-250EBZ User Guide UG-178 09228-025 6 Figure 25. Bottom Side Rev. A | Page 21 of 24 UG-178 AD9284-250EBZ User Guide ORDERING INFORMATION BILL OF MATERIALS Table 1. Qty 1 15 Description PCBZ Ceramic, 0805, X7R capacitor 3 Reference Designator Not applicable C101, C102, C103, C105, C106, C108, C110, C111, C113, C115, C116, C125, C127, C129, C417 C104, C117, C416 Ceramic, mono, 0402 capacitor 1 µF Murata/GRM155R60J105KE19D 4 C107, C109, C112, C114 Ceramic, 0805, X7R capacitor 1 µF Murata/GRM21BR71H105KA12L 18 Ceramic, +80/−20%, 16 V, Y5V, 0402 capacitor 0.1 µF Murata/GRM155F51C104ZA01D Ceramic, ±10%, 6.3 V, X5R, 0201 capacitor 0.1 µF Murata/GRM033R60J104KE19D 2 C126, C128, C130, C225, C226, C301, C302, C401, C403, C404, C410, C411, C412, C502, C506, C507, C508, C510 C202, C204, C206, C208, C210, C212, C214, C216, C218, C220, C222 C406, C414 4.7 pF Murata/GRM1555C1H4R7CZ01D 1 C504 1000 pF Murata/GRM155R71H102KA01D 2 CR101, CR102 Ceramic, ±0.25 pF, 50 V, COG, 0402, capacitor Ceramic, 50 V, 10%, X7R, 0402 capacitor Recovery rectifier diode, DO214AA3 S2A-TP 1 CR103 Green surface-mount 0603 LED LNJ308G8TRA (green) Micro Commercial Comp Corp/ S2A-TP Panasonic/LNJ308G8TRA 1 CR501 RF Schottky diode, MINIPAK1412 HMPS-2822-BLK Avago/HSMS-2812BLK 7 Inductor 0805 ferrite bead 100 MHz Panasonic/EXC-ML20A390U 1 E101, E102, E105, E107, E109, E111, E112 F101 Fuse F1812 polyswitch PTC device 1.6 A Tyco Electronics/MINISMDC160F-2 1 FL101 BNX016-01 Murata/BNX016-01 1 J101 PJ-102A CUI/PJ-102A 1 J102 Filter noise suppression LC combined type, FLBNX01 PCB powerjack mini 0.08 in R/A T/H connector PCB header 6 position connector Z5.530.3625.0 Wieland/Z5.530.3625.0 5 J103, J105, J106, J201, J202 TSW10608GS3PIN Samtec/TSW-103-08-G-S 3 J401, J404, J502 PCB berg header ST male 3 position connector PCB SMA ST edge-mount connector SMA-J-P-X-ST-EM1 Samtec/SMA-J-P-X-ST-EM1 2 L101, L103 2.2 µH Coilcraft/LPS4012-222MLC 2 L102, L104 Shielded power inductors LSMSQ154H47 SMD L9075 inductor 110 nH Bourns/CW201212-R10J 2 P1, P2 6469169-1 Tyco Electronics/6469169-1 1 R101 300 Ω Panasonic/ERJ-2RKF3000X 2 R102, R103 PCB 60-pin RA connector CNTYCO1469169-1 1%, 1/16, SMD, 0402, thick film resistor Precision thick film chip 0603 resistor 100 kΩ Panasonic/ERJ-3EKF1003V 2 R104, R105 Jumper SMD 0805 (SHRT) resistor 0Ω Panasonic/ERJ-6GEYJ0.0 25 R405, R407, R408, R414, R415, R416, R417, R422, R424, R425, R431, R432, R433, R434, R449, R451, R504, R507, R508, R509, R510, R516, R517, R601, R602 Film SMD 0402 resistor 0Ω Panasonic/ERJ-2GE0R00X 11 Value 10 µF Rev. A | Page 22 of 24 Manufacturer/Part No. 9284CE01A Murata/GRM21BR70J106KE76L AD9284-250EBZ User Guide Qty 4 Reference Designator R301, R306, R307, RBIAS 3 R302, R303, R305 3 R304, R308, R309 2 R403, R421 8 4 R410, R411, R412, R413, R427, R428, R429, R430 R438, R439, R440, R441 2 R505, R506 2 RN601, RN602 2 UG-178 Description Precision thick film chip R0402 resistor Film SMD 0402 resistor Value 10 kΩ Manufacturer/Part No. Panasonic/ERJ-2RKF1002X 1.1 kΩ Panasonic/ERJ-2GEJ112X Precision thick film chip R0402 resistor Film SMD 0603 resistor 100 kΩ Panasonic/ERJ-2RKF1003X 0Ω Panasonic/ERJ-3GEY0R00V Film SMD 0402 resistor 33 Ω Panasonic/ERJ-2GEJ330X 200 Ω Panasonic/ERJ-2RKF2000X 24.9 Ω Panasonic/ERJ-2RKF24R9X 0Ω Panasonic/EXB-2HVR000V T401, T404 Precision thick film chip R0402 resistor Precision thick film chip R0402 resistor Network 16-pin/8res RESNET16 surface-mount resistor XFMR RF MINICD542 ADT1-1WT+ Minicircuits/ADT1-1WT+ 1 T502 XFMR RF 1:1 (6-pin special) ETC1-6P MABA-007159-000000 Macom/MABA-007159-000000 1 U101 Compact, 600 mA, 3 MHz, TSOT-5, step-down dc-to-dc converter ADP2108AUJZ-3.3-R7 Analog Devices/ ADP2108AUJZ-3.3-R7 1 U102 Compact, 600 mA, 3 MHz, TSOT-5, step-down dc-to-dc converter ADP2108AUJZ-1.8-R7 Analog Devices/ ADP2108AUJZ-1.8-R7 1 U201 LFCSP analog-to-digital converter AD9284BCPZ-250 1 U301 IC SC70 tiny logic UHS dual buffer NC7WZ07P6X Analog Devices/ AD9284BCPZ-250 Fairchild/NC7WZ07P6X 1 U302 IC SC70 tiny logic UHS dual buffer NC7WZ16P6X Fairchild/NC7WZ16P6X Rev. A | Page 23 of 24 UG-178 AD9284-250EBZ User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2011–2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG09228-0-6/14(A) Rev. A | Page 24 of 24