Dual Bootstrapped, 12 V MOSFET
Driver with Output Disable
ADP3120A
FEATURES
GENERAL DESCRIPTION
All-in-one synchronous buck driver
Bootstrapped high-side drive
One PWM signal generates both drives
Anticross conduction protection circuitry
OD for disabling the driver outputs
Meets CPU VR requirement when used with
Analog Devices Flex -Mode™ 1 controller
The ADP3120A is a dual, high voltage MOSFET driver
optimized for driving two N-channel MOSFETs, the two switches
in a nonisolated synchronous buck power converter. Each
driver is capable of driving a 3000 pF load with a 45 ns propagation delay and a 25 ns transition time. One of the drivers can be
bootstrapped and is designed to handle the high voltage slew
rate associated with floating high-side gate drivers. The
ADP3120A includes overlapping drive protection to prevent
shoot-through current in the external MOSFETs.
APPLICATIONS
Multiphase desktop CPU supplies
Single-supply synchronous buck converters
The OD pin shuts off both the high-side and the low-side
MOSFETs to prevent rapid output capacitor discharge during
system shutdown.
The ADP3120A is specified over the commercial temperature
range of 0°C to 85°C and is available in 8-lead SOIC_N and
8-lead LFCSP_VD packages.
1
Flex-Mode is protected by U.S. Patent 6683441; other patents pending.
FUNCTIONAL BLOCK DIAGRAM
12V
D1
VCC
4
BST
ADP3120A
1
LATCH
R1
R2
Q
S
IN 2
CBST2
CBST1
DRVH
RG
8
Q1
DELAY
RBST
TO
INDUCTOR
SW
7
CMP
VCC
6
CMP
CONTROL
LOGIC
DRVL
Q2
5
PGND
DELAY
6
OD 3
05812-001
1V
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
ADP3120A
TABLE OF CONTENTS
Features .............................................................................................. 1
Low-Side Driver ............................................................................9
Applications....................................................................................... 1
High-Side Driver ...........................................................................9
General Description ......................................................................... 1
Overlap Protection Circuit...........................................................9
Functional Block Diagram .............................................................. 1
Application Information................................................................ 10
Revision History ............................................................................... 2
Supply Capacitor Selection ....................................................... 10
Specifications..................................................................................... 3
Bootstrap Circuit........................................................................ 10
Absolute Maximum Ratings............................................................ 4
MOSFET Selection..................................................................... 10
ESD Caution.................................................................................. 4
High-Side (Control) MOSFETs................................................ 10
Pin Configurations and Function Descriptions ........................... 5
Low-Side (Synchronous) MOSFETs ........................................ 11
Timing Characteristics..................................................................... 6
PC Board Layout Considerations............................................. 11
Typical Performance Characteristics ............................................. 7
Outline Dimensions ....................................................................... 13
Theory of Operation ........................................................................ 9
Ordering Guide .......................................................................... 13
REVISION HISTORY
3/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADP3120A
SPECIFICATIONS
VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to 85°C, unless otherwise noted. 1
Table 1.
Parameter
DIGITAL INPUTS (PWM, OD)
Input Voltage High
Input Voltage Low
Input Current
Hysteresis
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current
Symbol
Propagation Delay Times
−1
90
trDRVH
tfDRVH
tpdhDRVH
tpdlDRVH
t pdl
OD
tpdh
OD
SW Pull-Down Resistance
LOW-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Output Resistance, Unbiased
Transition Times
Propagation Delay Times
trDRVL
tfDRVL
tpdhDRVL
tpdlDRVL
t pdl
OD
tpdh
Timeout Delay
SUPPLY
Supply Voltage Range
Supply Current
UVLO Voltage
Hysteresis
1
Min
Typ
Max
Unit
0.8
+1
V
V
μA
mV
2.0
Output Resistance, Sinking Current
Output Resistance, Unbiased
Transition Times
Conditions
VCC
ISYS
OD
BST − SW = 12 V ; TA = 25°C
BST − SW = 12 V ; TA = 0°C to 85°C
BST – SW = 12 V; TA = 25°C
BST − SW = 12 V; TA = 0°C to 85°C
BST – SW = 0 V
BST – SW = 12 V, CLOAD = 3 nF, see Figure 5
BST – SW = 12 V, CLOAD = 3 nF, see Figure 5
BST – SW = 12 V, CLOAD = 3 nF,
25°C ≤ TA ≤ 85°C, see Figure 5
BST – SW = 12 V, CLOAD = 3 nF, see Figure 5
See Figure 4
250
1.4
10
25
20
45
40
30
70
Ω
Ω
Ω
Ω
kΩ
ns
ns
ns
25
20
35
35
ns
ns
See Figure 4
40
55
ns
SW to PGND
10
2.5
32
TA = 25°C
TA = 0°C to 85°C
TA = 25°C
TA = 0°C to 85°C
VCC = PGND
CLOAD = 3 nF, see Figure 5
CLOAD = 3 nF, see Figure 5
CLOAD = 3 nF, see Figure 5
CLOAD = 3 nF, see Figure 5
See Figure 4
2.4
1.4
10
20
16
12
30
20
3.3
3.9
1.8
2.6
kΩ
3.3
3.9
1.8
2.6
35
30
35
45
35
Ω
Ω
Ω
Ω
kΩ
ns
ns
ns
ns
ns
See Figure 4
110
190
ns
SW = 5 V
SW = PGND
110
95
190
150
ns
ns
4.15
BST = 12 V, IN = 0 V
VCC rising
2
1.5
350
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
Rev. 0 | Page 3 of 16
13.2
5
3.0
V
mA
V
mV
ADP3120A
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VCC
BST
DC
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