Ultralow Noise, Low Power
Current Amplifier
ADPD2210
Data Sheet
VCC
FUNCTIONAL BLOCK DIAGRAM
Ultralow noise, low power current amplifier
80 fA/√Hz (typical) noise floor
140 μA (typical) of supply current when active (EE = 0 μW/cm2)
100 nA (typical) of supply current in standby
Flexible output configuration
Optimized for pulsed systems
Nominal linear output: 240 μA
Space-saving 2 mm × 2 mm LFCSP package
REF
FEATURES
BIAS
VCC – (2 × VBE)
POWER-DOWN
LOGIC
PWDN
10nA
OUT
IN
24 × CURRENT MIRROR
12286-101
Photoplethysmography
Photodiode measurements
Small current pulsed amperometry
Any application requiring the ultralow noise amplification of
small currents
GND
APPLICATIONS
Figure 1.
GENERAL DESCRIPTION
The ADPD2210 is a low noise current amplifier designed to
allow the use of smaller photodiodes by amplifying sensor signal
currents by a factor of 24 while adding minimal noise. This
amplification provides the system sensitivity of a large photodiode
with the benefits of a smaller photodiode. A minimum linearity
of 60 dB allows accurate extraction of very small time variant
signals on top of large dc or low frequency offsets.
The ADPD2210 is optimized for pulse mode applications such
as wrist worn heart rate monitoring (HRM) or finger worn
pulse oximeter oxygen saturation (SpO2), where low power
consumption and rejection of ambient light is critical. In photodiode applications, the ADPD2210 holds the sensor input to
within ±5 mV (typical) of the reference terminal, providing
near zero-bias voltage and allowing minimal dark current and
shot noise limited performance.
Rev. A
The ADPD2210 is designed for applications where power
conservation is critical. The ADPD2210 uses very little power,
typically 140 μA with no input to 954 μA at full scale. A powerdown pin places the ADPD2210 in standby when sensing is
inactive. This mode adds critical time for battery-powered
monitoring and can reduce battery costs in disposable applications
Using the ADPD2210 to provide sensor site amplification
reduces the effect of electromagnetic interference (EMI) in low
level wired interfaces, providing improved signal-to-noise ratio
(SNR) and rejection of interferer signals from nearby equipment.
The combination of low power, high SNR, and EMI immunity
enables low power system solutions not possible with traditional
small current sensors, such as photodiodes plus transimpedance
amplifiers (TIAs).
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ADPD2210
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Pulse Mode Operation ............................................................... 11
Applications ....................................................................................... 1
Applications Information .............................................................. 12
Functional Block Diagram .............................................................. 1
Powering the ADPD2210 .......................................................... 12
General Description ......................................................................... 1
Exposed Pad Connection .......................................................... 12
Revision History ............................................................................... 2
Power-Down ............................................................................... 12
Specifications..................................................................................... 3
Reference Ouput ......................................................................... 12
Absolute Maximum Ratings............................................................ 4
Layout Considerations ............................................................... 12
Thermal Resistance ...................................................................... 4
Output Configuration ................................................................ 12
ESD Caution .................................................................................. 4
Accuracy in Clinical Applications............................................ 12
Pin Configuration and Function Descriptions ............................. 5
3-Wire Voltage Configuration .................................................. 13
Typical Performance Characteristics ............................................. 6
3-Wire Current Mode Configuration ...................................... 13
Terminology .................................................................................... 10
Evaluation Board ............................................................................ 14
Theory of Operation ...................................................................... 11
Outline Dimensions ....................................................................... 15
Overview...................................................................................... 11
Ordering Guide .......................................................................... 15
Recommended Configuration .................................................. 11
Sensitivity and SNR .................................................................... 11
REVISION HISTORY
12/15—Rev. 0 to Rev. A
Changes to Ordering Guide .......................................................... 15
10/15—Revision 0: Initial Version
Rev. A | Page 2 of 15
Data Sheet
ADPD2210
SPECIFICATIONS
VCC = 3.3 V TA = 25°C, unless otherwise noted. NSHOT is shot noise. EE is irradiance.
Table 1.
Parameter
GAIN
Current Gain
DYNAMIC PERFORMANCE
Power-Down Recovery Time
Rise
Fall
Bandwidth
INPUT
Input Capacitance
Nominal Input Current
Input Offset Voltage
Reference Voltage
STATIC BIAS
Input Referred
Output Referred
NOISE PERFORMANCE
Current Noise Floor, Input Referred
Current Noise, Input Referred
Symbol
Test Conditions/Comments
Min
Typ
Max
βTLA
VBIAS = 0 V
23.7
24.2
24.8
tRECOVER
1% full-scale (FS) output
100 nA to 1 μA
1 μA to 10 μA
10% to 90% FS (240 μA)
90% to 10% FS (240 μA)
IIN = 100 nA (dc), 100 nA (ac)
IIN = 1 μA (dc), 100 nA (ac)
tRISE
tFALL
CIN_MAX
IIN_MAX
VIN_REF
REF
IIN
POWER AND SUPPLY
Supply Voltage
Standby Current
Power Supply Rejection Ratio
Supply Current Floor
Supply Current
VCC
ISTANDBY
PSRR
IFLOOR
ISUPPLY
OUTPUT CHARACTERISTICS
Maximum Output Voltage
Nominal Linear Output
VOUT_MAX
IOUT_FS
Linearity
Resistor
Peak Output Current
Output Capacitance
Output Resistance
POWER-DOWN LOGIC
Input Voltage
High
Low
Leakage Current
High
Low
IOUT_PEAK
COUT
ROUT
IIN < 10 nA
IIN = 100 nA,1.5 × NSHOT
IIN = 1μA, 1.15 × NSHOT
1.8
PWDN > VIH
VCC = 1.8 V to 5.0 V, EE = 10 μA
IIN = 0 pA
IOUT = 10 μA
IOUT = 240 μA, ISUPPLY = IFLOOR + (3.3 × IOUT)
VCC = 3.3 V, IOUT = 240 μA
VCC = 3.3 V
VCC = 1.8 V
TIA, VBIAS = 0 V, RFEEDBACK = 25 kΩ
IIN = 200 nA to 4 μA
IIN = 200 nA to 10 μA
IIN = 200 nA to 4 μA, RLOAD = 5kΩ
VCC = 3.3 V
VCC = 1.8 V
From OUT to GND
From OUT to GND
VIH
VIL
IIH
IIL
50
20
5
5
125
85
μs
μs
μs
μs
kHz
kHz
8
±5
VCC − 1.2
pF
μA
mV
V
10
240
nA
nA
10
ISB
OSB
80
260
740
150
fA/√Hz
fA/√Hz
fA/√Hz
3.3
100
25
140
167
954
5
V
nA
nA/V
μA
μA
μA
VCC − 0.75
240
65
V
μA
μA
0.1
0.3
0.1
300
65
5
>5
VCC − 0.2
0.2
PWDN = 3.3 V
PWDN = 0 V
Rev. A | Page 3 of 15
Unit
0.2
−8.5
%
%
%
μA
μA
pF
GΩ
V
V
nA
μA
ADPD2210
Data Sheet
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Parameter
Supply Voltage, VCC
Storage Temperature Range
Operating Ambient Temperature Range
Maximum Junction Temperature
Solder Reflow Temperature (1 GΩ) of the photodiode.
In applications where the REF output is used to provide an
external reference or a guarding voltage, the REF output must
be buffered. Failure to buffer the REF pin may adversely affect
linearity above 4 μA.
LAYOUT CONSIDERATIONS
Working with very low currents requires special attention in
layout to prevent error currents due to leakage, especially in
instrumentation applications where the ADPD2210 may be
located at a distance from the current source. In applications
that rely on dynamic signals, parasitic capacitance must be
controlled as seemingly insignificant capacitance becomes
problematic with nanoampere scale signals.
OUTPUT CONFIGURATION
The output of the ADPD2210 allows different configurations
depending on the application. The current gain of the ADPD2210
reduces the effect of surrounding interferers but, for best performance, careful design and layout is still necessary to achieve
best performance. The effect of capacitance on the output must
be considered carefully regardless of configuration as bandwidth
and response time of the system can be limited simply by the
time required to charge and discharge parasitics.
Because the ADPD2210 is effectively a current source, the
ADPD2210 output voltage drifts up to its compliance voltage,
approximately 1.2 V below VCC, when connected to an interface that presents a high impedance. The rate of this drift is
dependent on the ADPD2210 output current, parasitic capacitance, and the impedance of the load. This drift can require
additional settling time in circuits following the ADPD2210 if
they are actively multiplexing the output of the ADPD2210 or
presenting a high impedance due to power cycling. For multiplexed systems, a current steering architecture may offer a
performance advantage over a break-before-make switch matrix.
ACCURACY IN CLINICAL APPLICATIONS
Even with perfectly calibrated electronics, it is important to
note there is no absolute in photoplethysmography measurements because they are affected by other variables, including
high levels of carboxyhemoglobin or methemoglobin, density of
other chromophores such as melanin, and conditions that may
affect perfusion such as peripheral artery disease, shock, or
hypothermia. It is important that photoplethysmography, though
well suited for real-time monitoring, be supported in a clinical
environment with more accurate laboratory procedures such as
blood gas analysis.
Rev. A | Page 12 of 15
Data Sheet
ADPD2210
3-WIRE VOLTAGE CONFIGURATION
3-WIRE CURRENT MODE CONFIGURATION
The ADPD2210 can be used in a minimal 3-wire voltage
configuration, offering a compact solution with very few
components (see Figure 25). A shunt resistor (RS) sets the
transimpedance gain in front of the analog-to-digital converter
(ADC). This configuration allows flexibility in matching the
ADC converter full-scale input to the full-scale output of the
ADPD2210. The dynamic range of the interface is limited to
the compliance voltage of the ADPD2210.
When used in the 3-wire current mode configuration with a
photodiode (see Figure 25), the ADPD2210 is insensitive to load
resistance and can be used when the signal processing is further
from the sensor. EMI noise and shielding requirements are
minimized; however, cable capacitance has a direct effect on
bandwidth, making the 3-wire current mode configuration a
better choice for unshielded interfaces. The CF value must be
chosen carefully to eliminate stability and bandwidth degradation of the ADPD2210. Large capacitance around the feedback
loop of the TIA has a direct effect on the bandwidth of the system.
No additional amplification is needed prior to the ADC. Response
time at the lower end of the range is limited by the ability of the
output current to charge the parasitic capacitance presented to
the output of the ADPD2210.
ADPD2210
3.3V
VCC
3.3V
REF
CURRENT
IN AMPLIFIER
OUT
ADC AND
MICROPROCESSOR
RS
12286-021
GND
Figure 25. ADPD2210 Used in 3-Wire Short Cable Voltage Mode Configuration with a Shunt Resistor
ADPD2210
CF
VCC
3.3V
3.3V
RF
REF
OUT
TIA
ADC AND
MICROPROCESSOR
0V TO VCC –0.75
GND
12286-022
CURRENT
IN AMPLIFIER
Figure 26. ADPD2210 Used in 3-Wire Current Mode Configuration with a TIA
Rev. A | Page 13 of 15
ADPD2210
Data Sheet
EVALUATION BOARD
Figure 27 shows the evaluation board schematic. Figure 28 and Figure 29 show the evaluation board layout for the top and bottom layers,
respectively.
G
O
V
P
R1D
DNI
R2D
100kΩ
C1D
0.01µF
ADPD2210
1
2
PWDN
VCC
OUT
IN
C2D
1µF
6
5
D1D
1THE
GND
EPAD
REF
4
PWDN PIN MUST BE BIASED TO VIL FOR NORMAL OPERATION AND VIH FOR STANDBY.
2R1D
IS NOT NORMALLY INSTALLED BUT CAN BE POPULATED WITH A LOAD RESISTOR TO
GENERATE THE VOLTAGE OUTPUT.
12286-024
3
12286-025
12286-026
Figure 27. Evaluation Board Schematic
Figure 28. Evaluation Board Layout, Top Layer
Figure 29. Evaluation Board Layout, Bottom Layer
Rev. A | Page 14 of 15
Data Sheet
ADPD2210
OUTLINE DIMENSIONS
1.70
1.60
1.50
2.10
2.00 SQ
1.90
0.65 BSC
6
PIN 1 INDEX
AREA
0.15 REF
1.10
1.00
0.90
EXPOSED
PAD
0.425
0.350
0.275
3
TOP VIEW
0.60
0.55
0.50
SEATING
PLANE
0.05 MAX
0.02 NOM
0.35
0.30
0.25
0.20 MIN
1
BOTTOM VIEW
PIN 1
INDICATOR
(R 0.15)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.20 REF
02-06-2013-D
4
Figure 30. 6-Lead Lead Frame Chip Scale Package [LFCSP_UD]
2 mm × 2 mm Body, Ultra Thin, Dual Lead
(CP-6-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADPD2210ACPZ-R7
ADPD2210ACPZ-RL
EVALZ-ADPD2210
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Descriptions
6-Lead Lead Frame Chip Scale Package [LFCSP_UD]
6-Lead Lead Frame Chip Scale Package [LFCSP_UD]
Evaluation Board
Z = RoHS Compliant Part.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D12286-0-12/15(A)
Rev. A | Page 15 of 15
Package Option
CP-6-3
CP-6-3