EV1HMC349ALP4C

High Isolation, Nonreflective, GaAs, SPDT Switch, 100 MHz to 4 GHz HMC349ALP4CE Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM RF2 HMC349ALP4CE 50Ω VDD DRIVER RFC 50Ω EN CTRL GND RF1 17266-001 Nonreflective, 50 Ω design High isolation: 62 dB to 2 GHz Low insertion loss: 1.0 dB to 2 GHz High input linearity 1 dB power compression (P1dB): 34 dBm (typical) Third-order intercept (IP3): 53 dBm (typical) High power handling 33.5 dBm through path, VDD = 5 V 26.5 dBm terminated path Single, positive supply: 3 V to 5 V CMOS-/TTL-compatible control All off state control 16-lead, 4 mm × 4 mm LFCSP Pin-compatible with the HMC8038 Figure 1. APPLICATIONS Wireless infrastructure Mobile radios Test equipment GENERAL DESCRIPTION The HMC349ALP4CE is a gallium arsenide (GaAs), single-pole, double throw (SPDT) switch, specified from 100 MHz to 4 GHz. The HMC349ALP4CE is well suited for wireless infrastructure applications by yielding high isolation of 62 dB, low insertion loss of 1.0 dB, high input IP3 of 53 dBm, and high input P1dB of 34 dBm. Rev. B The HMC349ALP4CE operates with a single, positive supply voltage from 3 V to 5 V and provides a CMOS-/TTL-compatible control interface. The HMC349ALP4CE comes in a 16-lead, 4 mm × 4 mm, RoHS compliant, lead frame chip scale package (LFCSP). Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2019 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC349ALP4CE Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Interface Schematics .....................................................................5 Applications ....................................................................................... 1 Typical Performance Characterics ..................................................6 Functional Block Diagram .............................................................. 1 Insertion Loss, Isolation, and Return Loss ................................6 General Description ......................................................................... 1 Revision History ............................................................................... 2 Input Power Compression and Input Third-Order Intercept (IP3) ................................................................................................8 Specifications..................................................................................... 3 Theory of Operation ...................................................................... 10 Absolute Maximum Ratings............................................................ 4 Applications Information .............................................................. 11 Thermal Resistance ...................................................................... 4 Evaluation Board ........................................................................ 11 Power Derating Curve ................................................................. 4 Outline Dimensions ....................................................................... 12 ESD Caution .................................................................................. 4 Ordering Guide .......................................................................... 12 Pin Configuration and Function Descriptions ............................. 5 REVISION HISTORY This Hittite Microwave Products data sheet has been reformatted to meet the styles and standards of Analog Devices, Inc. 1/2019—v02.0315 to Rev. B Updated Format .................................................................. Universal Changes to Product Title, Features Section, Applications Section, General Description Section, and Figure 1 .................... 1 Changes to Table 1 ............................................................................ 3 Deleted Bias Voltage Table and Control Voltage Table................ 3 Changes to Table 2 ............................................................................ 4 Added Thermal Resistance Section, Power Derating Section, and Figure 2 ....................................................................................... 4 Added Figure 3 .................................................................................. 5 Changes to Table 4 ............................................................................ 5 Added Interface Schematics Section .............................................. 5 Added Insertion Loss, Isolation, and Return Loss Section ......... 6 Changes to Figure 6, Figure 7, and Figure 8.................................. 6 Added Figure 9, Figure 10, and Figure 11 ..................................... 6 Added Figure 12 ................................................................................7 Changes to Figure 13.........................................................................7 Added Input Power Compression and Third-Order Intercept Section.................................................................................................8 Changes to Figure 14, Figure 15, and Figure 16 ............................8 Added Figure 17, Figure 18, and Figure 19 ....................................8 Added Figure 20, Figure 21, Figure 22, and Figure 23 .................9 Added Theory of Operation Section ........................................... 10 Changes to Table 5.......................................................................... 10 Added Applications Information Section ................................... 11 Changes to Evaluation Board Section, Figure 24, and Table 6 .............................................................................................. 11 Added Figure 25 ............................................................................. 11 Updated Outline Dimensions ....................................................... 12 Changes to Ordering Guide .......................................................... 12 Rev. B | Page 2 of 12 Data Sheet HMC349ALP4CE SPECIFICATIONS Supply voltage (VDD) = 3 V to 5 V, control voltage (VCTRL) = 0 V or VDD, enable voltage (VEN) = 0 V, case temperature (TCASE) = 25°C, 50 Ω system, unless otherwise noted. Table 1. Parameter FREQUENCY RANGE INSERTION LOSS Between RFC and RF1/RF2 Symbol 0.1 GHz to 1 GHz 0.1 GHz to 2 GHz 0.1 GHz to 3 GHz 0.1 GHz to 4 GHz 0.1 GHz to 1 GHz 0.1 GHz to 2 GHz 0.1 GHz to 3 GHz 0.1 GHz to 4 GHz Between RF1 and RF2 RETURN LOSS RFC RF1/RF2 On Off 1 tRISE, tFALL tON, tOFF P0.1dB Input 1 dB Power Compression P1dB Input Third-Order Intercept IP3 SUPPLY INPUT Voltage Current DIGITAL INPUTS Low Voltage High Voltage Low Current High Current Min 0.1 0.1 GHz to 1 GHz 0.1 GHz to 2 GHz 0.1 GHz to 3 GHz 0.1 GHz to 4 GHz ISOLATION Between RFC and RF1/RF2 SWITCHING Rise and Fall Time On and Off Time INPUT LINEARITY 1 Input 0.1 dB Power Compression Test Conditions/Comments Max 4 Unit GHz 0.9 1.0 1.1 1.2 1.2 1.3 1.5 1.7 dB dB dB dB 65 62 57 57 57 53 49 46 dB dB dB dB dB dB dB dB 0.1 GHz to 1 GHz 0.1 GHz to 2 GHz 0.1 GHz to 3 GHz 0.1 GHz to 4 GHz 21 21 17 15 dB dB dB dB 0.1 GHz to 1 GHz 0.1 GHz to 2 GHz 0.1 GHz to 3 GHz 0.1 GHz to 4 GHz 0.5 GHz to 1 GHz 0.5 GHz to 2 GHz 0.5 GHz to 3 GHz 0.5 GHz to 4 GHz 21 21 19 19 20 20 17 15 dB dB dB dB dB dB dB dB 10% to 90% of radio frequency (RF) output 50% VCTRL to 90% of RF output 300 MHz to 4 GHz VDD = 3 V VDD = 5 V VDD = 3 V VDD = 5 V Input power = 10 dBm/tone, Δf = 1 MHz VDD = 3 V VDD = 5 V VDD pin 60 150 ns ns 25 31 28 34 dBm dBm dBm dBm 52 53 dBm dBm VDD IDD 60 55 50 50 Typ 30 3 1 5 3.5 V mA 0.8 VDD V V µA µA CTRL, EN pins VINL VINH IINL IINH 0 2