EVAL-ADUC7060QSPZ

Evaluation Board User Guide UG-029 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com ADuC7060 Evaluation Board User Guide MicroConverter® ADuC7060 Development System FEATURES GENERAL DESCRIPTION 2-layer PCB (4 in. × 5 in. form factor) 9 V power supply regulated to 3.3 V and 2.5 V on board 4-pin UART header to connect to RS-232 interface cable 20-pin standard JTAG connector Demonstration circuit 32.768 kHz watch crystal to drive the PLL clock ADR280 1.2 V external reference chip Reset/download/IRQ0 push buttons Power indicator/general-purpose LEDs Access to all ADC inputs and DAC output from external header; all device ports are brought out to external header pins Surface-mount and through-hole general-purpose prototype area This user guide refers to the ADuC7060 evaluation board. This evaluation board allows evaluation of the ADuC7060 and ADuC7061 parts. The ADuC7060 is the superset of the ADuC706x series, and all features of the ADuC7061 can be evaluated using the ADuC7060. The ADuC7060 contains an ARM7TDMI core, 32 kB of flash, 4 kB of SRAM, dual 24-bit sigma-delta (Σ-Δ) ADCs, and a 12-bit DAC as well as many other features. EVALUATION KIT CONTENTS mIDAS-Link JTAG programming POD CD containing evaluation software including user manuals, data sheets, example code, ARMWSD, and evaluation compilers 9 V power supply RS-232 to UART cable USB cable See the last page for an important warning and disclaimers. This evaluation board allows a user to program the ADuC7060 via the JTAG or the UART interfaces. The user may also debug their source code through the JTAG interface. In this user guide, all references to the physical orientation of components on the board are made with respect to a component-side view of the board with the prototype area appearing in the bottom of the board. The board is laid out to minimize coupling between the analog and digital sections of the board. To this end, the ground plane is split with the analog section on the left side and a digital plane on the right side of the board. The regulated 2.5 V power supply is routed directly to the digital section and is filtered before being routed into the analog section of the board. Rev. 0 | Page 1 of 12 UG-029 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 General-Purpose Prototype Area................................................4 Evaluation Kit Contents ................................................................... 1 DIP Switch Link Options .................................................................5 General Description ......................................................................... 1 External Connectors .........................................................................6 Revision History ............................................................................... 2 Analog I/O Connector J2 .............................................................6 Evaluation Board Hardware ............................................................ 3 Power Supply Connector J1 .........................................................6 Power Supply ................................................................................. 3 Emulation Connector J5...............................................................6 RS-232 Interface ........................................................................... 3 Serial Interface Connector J4.......................................................6 Emulation Interface ...................................................................... 3 Digital I/O Connector J3 ..............................................................6 Crystal Circuit............................................................................... 3 RTD Demonstration Circuit ............................................................7 External Reference (ADR280) .................................................... 3 Evaluation Board Schematic and Artwork.....................................8 Reset/Download/IRQ0 Push Buttons ........................................ 3 Bill of Materials ............................................................................... 11 Power Indicator/General Purpose LEDs ................................... 4 ESD Caution................................................................................ 11 Analog I/O Connections ............................................................. 4 REVISION HISTORY 8/09—Revision 0: Initial Version Rev. 0 | Page 2 of 12 Evaluation Board User Guide UG-029 EVALUATION BOARD HARDWARE POWER SUPPLY CRYSTAL CIRCUIT Connect the 9 V power supply via the 2 mm input power socket (J1). The input connector is configured as a center negative, that is, with GND on the center pin and 9 V on the outer shield. The board is fitted with a 32.768 kHz crystal, from which the on-chip PLL circuit can generate a 10.24 MHz clock. The 9 V supply is regulated via the linear voltage regulator, U3. The 2.5 V regulator output is used to drive the digital side of the board directly. The 2.5 V supply is also filtered and then used to supply the analog side of the board. This regulator supplies the ADuC7060 microcontroller. The external 1.2 V reference chip, ADR1, has two functions. The 9 V supply is also regulated via the linear voltage regulator, U2. The 3.3 V output of this regulator is used to supply the JTAG programming interface. This device does not supply the ADuC7060 device. RESET/DOWNLOAD/INT0 PUSH BUTTONS When on, the LED (D4) indicates that a valid 2.5 V supply is driven from the regulator circuit. All active components are decoupled with 0.1 μF capacitors at device supply pins to ground. • • It is provided on the evaluation board to demonstrate the external reference option of the ADuC7060. It can also be used as an input source to AIN1, if required. The INT0 push button is referred to as the IRQ0 push button in the ADuC7060/ADuC7061 data sheet. Note that this is the same push button and only differs in name. A reset push button is provided to allow the user to reset the part manually. When pressed, the reset pin of the ADuC7060 is pulled to DGND. Because the RESET pin on the ADuC7060 is Schmidt-triggered internally, there is no need to use an external Schmidt trigger on this pin. RS-232 INTERFACE The ADuC7060 (U1) P1.1 and P1.0 lines are connected to the RS-232 interface cable via Connector J4. The interface cable generates the required level shifting to allow direct connection to a PC serial port. Ensure that the cable supplied is connected to the board correctly, that is, DVDD is connected to DVDD and DGND is connected to DGND. EMULATION INTERFACE EXTERNAL REFERENCE (ADR280) When pressed, the INT0 push button switch drives P0.4/IRQ0 high. This can be used to initiate an External Interrupt 0. To enter serial download mode, pull the NTRST/BM pin low while reset is toggled. On the evaluation board, serial download mode can be easily initiated by holding down the serial download push button (S3) while pressing and releasing the reset button (S1). Nonintrusive emulation and download are possible on the ADuC7060 via JTAG by connecting a JTAG emulator to the J5 connector. Rev. 0 | Page 3 of 12 UG-029 Evaluation Board User Guide POWER INDICATOR/GENERAL PURPOSE LEDS GENERAL-PURPOSE PROTOTYPE AREA A power LED (D4) is used to indicate that a sufficient supply is available on the board. A general-purpose LED (D6) is directly connected to P1.6 of the ADuC7060. When P1.6 is cleared, the LED is turned on. When P1.6 is set, the LED is turned off. General-purpose prototype areas are provided at the bottom of the evaluation board for adding external components as required in the user’s application. As can be seen from the layout in Figure 4, AVDD, AGND, VDD, and DGND tracks are provided in this prototype area. ANALOG I/O CONNECTIONS Note that the ADC0/ADC1 pins and the AIN0/AIN1 pins are the same pins in this user guide. Both sets use the function and differ only in name. All analog I/O connections are brought out on Header J2. The primary ADC inputs, AIN0 and AIN1, are connected to an RTD demonstration circuit (see Figure 1). The component, RTD1 is a surface-mount RTD in a 1206 package. It is stimulated by the excitation current source, IEC0 from the ADuC7060, and is measured differentially by the primary ADC. R1 is the 5.6 kΩ reference resistor in the circuit. The DAC output is buffered externally using the OP293 op amp device, U4. Rev. 0 | Page 4 of 12 Evaluation Board User Guide UG-029 DIP SWITCH LINK OPTIONS Table 1. Option S4-1 Name RTD AIN0 Function Connects the positive side of the RTD to the AIN0 pin (Pin 20). S4-2 RTD AIN1 Connects the negative side of the RTD to the AIN1 pin (Pin 19). S4-3 RTD REFIN+ Connects the positive side of the reference resistor (R1) in the RTD demo circuit to the VREF+ pin (Pin 21). S4-4 RTD REFIN− Connects the negative side of the reference resistor (R1) in the RTD demo circuit to the VREF− pin (Pin 22). S4-5 1.2V REFIN+ Connects the ADR280 1.2 V precision reference voltage to the VREF+ pin (Pin 21). S4-6 AIN1 BIAS Connects the ADR280 1.2 V precision reference voltage to the AIN1 pin (Pin 19). S4-7 EXT_REF S4-8 GND AINCOM Brings the output of the ADR280 reference device to test Pin 13 of J2. Note: Never turn S1-7 and S1-8 on at the same time as this shorts the external reference output to GND. Connects AGND to Pin 13 of J2. Note: Never turn S1-7 and S1-8 on at the same time as this shorts the external reference output to GND. Rev. 0 | Page 5 of 12 Use Slide S1-1 to the on position to connect the positive side of the RTD to the ADuC7060. Slide S1-1 to the off position to disconnect the RTD from AIN0. Slide S1-2 to the on position to connect the negative side of the RTD to the ADuC7060. Slide S1-2 to the off position to disconnect the RTD from AIN1. Slide S1-3 to the on position to connect the positive side of the reference resistor (R1) to the VREF+ pin. Slide S1-3 to the off position to disconnect the reference resistor from the VREF+ pin. Slide S1-4 to the on position to connect the negative side of the reference resistor (R1) to the VREF− pin. Slide S1-4 to the off position to disconnect the reference resistor from the VREF− pin. In this position, the VREF− pin is connected to AGND. Slide S1-5 to the on position to connect the ADR280 1.2 V precision reference voltage to the VREF+ pin. Slide S1-5 to the off position to disconnect the ADR280 1.2 V reference device from VREF+. Slide S1-6 to the on position to connect the ADR280 1.2 V precision reference voltage to the AIN1 pin. Slide S1-6 to the off position to disconnect the ADR280 1.2 V reference device from AIN1. Slide S1-7 to the on position to connect the ADR280 reference device to Pin 13 of J2. Slide S1-7 to the off position to disconnect the ADR280 reference device from Pin 13 of J2. Slide S1-8 to the on position to connect Pin 13 of J2 to GND. Slide S1-8 to the off position to disconnect Pin 13 of J2 from GND. UG-029 Evaluation Board User Guide EXTERNAL CONNECTORS ANALOG I/O CONNECTOR J2 EMULATION CONNECTOR J5 Connector J2 provides external connections for all ADC inputs, reference inputs, and DAC outputs. The pinout of the connector is shown in Table 2. Connector J5 provides a connection of the evaluation board to the PC via a JTAG emulator. Table 2. Pin Functions for Analog I/O Connector J2 Connector J4 provides a simple connection of the evaluation board to the PC via a serial port cable provided with the ADuC7060 development system. Pin Number J2-1 J2-2 J2-3 J2-4 J2-5 J2-6 J2-7 J2-8 J2-9 J2-10 J2-11 J2-12 J2-13 J2-14 J2-15 J2-16 J2-17 J2-18 J2-19 J2-20 J2-21 J2-22 Pin Function AGND AVDD AIN0 AIN1 AIN2 AIN3 VREF− VREF+ AIN4 AIN5 AIN6 AIN7 EXT_REF DAC (unbuffered) DAC (buffered) AIN8 AIN9 V0, op amp output V−, op amp inverting input V+, op amp noninverting input GND_SW IEXC1, Current Excitation Source 1 POWER SUPPLY CONNECTOR J1 Connector J1 allows for connection between the evaluation board and the 9 V power supply provided in the ADuC7060 development system. SERIAL INTERFACE CONNECTOR J4 DIGITAL I/O CONNECTOR J3 The digital I/O connector, J3, provides external connections for all GPIOs. The pinout of the connector is shown in Table 3, with details of the pin functions. Table 3. Pin Functions for Digital I/O Connector J3 Pin No. J3-1 J3-2 J3-3 J3-4 J3-5 J3-6 J3-7 J3-8 J3-9 J3-10 J3-11 J3-12 J3-13 J3-14 J3-15 J3-16 J3-17 J3-18 J3-19 J3-20 Rev. 0 | Page 6 of 12 Pin Function P1.6 P1.5 P1.4 P1.3 P1.2 P0.6 P0.5 P2.1 P2.0 P1.1/SOUT P1.0/SIN P0.4/INT0 P0.3 P0.2 P0.1 P0.0 RESET DGND DGND DVDD Evaluation Board User Guide UG-029 RTD DEMONSTRATION CIRCUIT The on-board RTD is measured by the primary ADC by using the sample code in the RTD.c file. The RTD.c file is located in the code example folder of the software CD included with the evaluation board kit. The IEXC0 pin provides an excitation current through the RTD. The voltage drop across the RTD is measured differentially by ADC0 through input channels ADC0 and ADC1. The reference resistor, R1, is connected to the VREF+ of the ADuC7060. 0.2mA~1mA IEXC0 AIN0 (T+) RTD AIN1 (T–) For this test, set Switch 1 to Switch 4 of S4 to the on position. VREF+ RREF VREF– GND_SW 08322-001 Note that the ADC0/ADC1 pins and the AIN0/AIN1 pins are the same pins in this user guide. Both sets use the function and differ only in name. Figure 1. Diagram of the RTD Circuit Rev. 0 | Page 7 of 12 UG-029 Evaluation Board User Guide EVALUATION BOARD SCHEMATIC AND ARTWORK 08322-002 Figure 2. EVAL-ADuC7060 Board Schematic and Layout Rev. 0 | Page 8 of 12 Evaluation Board User Guide UG-029 08322-003 Figure 3. Evaluation Board Schematic Rev. 0 | Page 9 of 12 Evaluation Board User Guide 08322-004 UG-029 Figure 4. Evaluation Board Silkscreen Rev. 0 | Page 10 of 12 Evaluation Board User Guide UG-029 BILL OF MATERIALS Table 4. Qty 1 4 1 1 1 1 1 1 1 3 1 1 1 6 Component EVAL-ADuC7060QS QuickStart PCB PCB Stand-offs U1 ADR1 U3 U4 U2 Y1 S4 S1, S2, S3 D4 D6 D1 C3, C14, C16, C17, C29, C30 Order No. Supplier 1165061 ADuC7060 ADR280ARTZ-REEL7 ADP3333ARM-2.5Z OP293ESZ ADP3333ARM3.3Z FEC 3160312 FEC 9479112 FEC 177807 FEC 515620 FEC 515607 BAV103TPMSCT-ND FEC 1135105 Farnell Analog Devices, Inc. Analog Devices, Inc. Analog Devices, Inc. Analog Devices, Inc. Analog Devices, Inc. Farnell Farnell Farnell Fairchild Semiconductor Fairchild Semiconductor Digi-Key Farnell FEC 9406204 Farnell FEC 1432459 Farnell FEC 722236 Farnell FEC 721979 Farnell RTD Description Two-sided surface-mount PCB-1 Stand-off, stick on mounting feet MicroConverter Band gap reference Fixed 2.5 V linear voltage regulator Dual op amp, (8-lead SOIC) Fixed 3.3 V linear voltage regulator 32.768 kHz watch crystal SW/8-way DIP switch PCB-mounted push-button switch 1.8 mm miniature LED (green) 1.8 mm miniature LED (red) PRLL4002 diode 10 μF surface-mount tantalum capacitor, TAJ-B case 0.1 μF surface-mount ceramic capacitor, 0603 case 4.7 μF surface-mount tantalum capacitor, TAJ-B case 10 nF surface-mount ceramic capacitor, 0603 case 12 pF surface-mount ceramic capacitor, 0603 case 100 Ω Class B 0805 RTD 14 C1, C2, C4, C5, C8 to C13, C24 1 C15 9 C6, C7, C20 to C27 2 C18, C19 1 PCS 1.1503.1 1 R1 5.6 kΩ surface-mount resistor, 0605 case FEC 9331352 Enercorp (Embassy Components) Farnell 3 14 3 R12, R12, R21 R2 to R5, R11 to R20 R8 to R10 FEC 9331344 FEC 9331662 FEC 9330380 Farnell Farnell Farnell 1 4 1 R7 R22, R26 to R28 L1 FEC 9331832 FEC 9233628 FEC 9526862 Farnell Farnell Farnell 1 1 1 1 1 J4 J3 J2 J5 J1 560 Ω surface-mount resistor, 0603 case 0 Ω surface-mount resistor, 0603 case 1 kΩ or 4.7 Ω surface mount resistor, 0603 case 1.5 Ω surface-mount resistor, 0603 case 100 kΩ surface-mount resistor, 0603 case Ferrite bead surface-mount inductor, 1206 case 4-pin, 90° single row header 34-pin straight single row header 22-pin straight single row header 20-pin connector PCB mounted power socket (2 mm pin diameter) TSM-104-02-T-SH TSM-120-01-T-SV TSM-122-01-T-SV TSM-104-02-T-SH KLDX-SMT2-0202-A Samtec Samtec Samtec Samtec KYCON, Inc. ESD CAUTION Rev. 0 | Page 11 of 12 UG-029 Evaluation Board User Guide NOTES Evaluation boards are only intended for device evaluation and not for production purposes. Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under any patents or other intellectual property by application or use of evaluation boards. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Analog Devices reserves the right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Evaluation boards are not authorized to be used in life support devices or systems. ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG08322-0-8/09(0) Rev. 0 | Page 12 of 12