BLM7G1822S-80AB;
BLM7G1822S-80ABG
LDMOS 2-stage power MMIC
Rev. 3 — 1 September 2015
Product data sheet
1. Product profile
1.1 General description
The BLM7G1822S-80AB(G) is a dual section, asymmetric, 2-stage power MMIC using
Ampleon’s state of the art GEN7 LDMOS technology. This multiband device is perfectly
suited as small cell final stage in Doherty configuration, or as general purpose driver in the
1805 MHz to 2170 MHz frequency range. Available in gull wing or straight lead outline.
Table 1.
Performance
Typical RF performance at Tcase = 25 C. Test signal: 3GPP test model 1; 64 DPCH; PAR = 9.9 dB
at 0.01% probability on CCDF; specified in a class-AB production circuit.
f
IDq1 [1]
IDq2 [1]
VDS
PL(AV)
Gp
D
ACPR5M
(MHz)
(mA)
(mA)
(V)
(W)
(dB)
(%)
(dBc)
carrier section
2167.5
40
120
28
4
30
24
39.5
peaking section
2167.5
80
240
28
8
28.3
24
36
Test signal
single carrier W-CDMA
[1]
IDq1 represents driver stage; IDq2 represents final stage.
1.2 Features and benefits
Designed for broadband operation (frequency 1805 MHz to 2170 MHz)
High section-to-section isolation enabling multiple combinations
High Doherty efficiency thanks to 2 : 1 asymmetry
Integrated temperature compensated bias
Biasing of individual stages is externally accessible
Integrated ESD protection
Excellent thermal stability
High power gain
On-chip matching for ease of use
Compliant to Directive 2002/95/EC, regarding restriction of hazardous substances
(RoHS)
1.3 Applications
RF power MMIC for W-CDMA base stations in the 1805 MHz to 2170 MHz frequency
range. Possible circuit topologies are the following as also depicted in Section 8.1:
Asymmetric final stage in Doherty configuration
Asymmetric driver for high power Doherty amplifier
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
2. Pinning information
2.1 Pinning
pin 1 index
VDS(A1)
VGS(A2)
VGS(A1)
RF_IN_A
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
RF_IN_B
VGS(B1)
VGS(B2)
VDS(B1)
1
2
3
4
5
6
7
16
RF_OUT_A / VDS(A2)
8
9
10
11
12
13
14
15
RF_OUT_B / VDS(B2)
aaa-009322
Transparent top view
The exposed backside of the package is the ground terminal of the device.
Fig 1.
Pin configuration
2.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
VDS(A1)
1
drain-source voltage of carrier section, driver stage (A1)
VGS(A2)
2
gate-source voltage of carrier section, final stage (A2)
VGS(A1)
3
gate-source voltage of carrier section, driver stage (A1)
RF_IN_A
4
RF input carrier section (A)
n.c.
5
not connected
n.c.
6
not connected
n.c.
7
not connected
n.c.
8
not connected
n.c.
9
not connected
n.c.
10
not connected
RF_IN_B
11
RF input peaking section (B)
VGS(B1)
12
gate-source voltage of peaking section, driver stage (B1)
VGS(B2)
13
gate-source voltage of peaking section, final stage (B2)
VDS(B1)
14
drain-source voltage of peaking section, driver stage (B1)
BLM7G1822S-80AB_S-80ABG#3
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
2 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
Table 2.
Pin description …continued
Symbol
Pin
Description
RF_OUT_B/VDS(B2)
15
RF output peaking section (B) / drain-source voltage of peaking section, final stage (B2)
RF_OUT_A/VDS(A2)
16
RF output carrier section (A) / drain-source voltage of carrier section, final stage (A2)
GND
flange RF ground
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BLM7G1822S-80AB
HSOP16F
plastic, heatsink small outline package; 16 leads (flat)
SOT1211-2
BLM7G1822S-80ABG
HSOP16
plastic, heatsink small outline package; 16 leads
SOT1212-2
4. Block diagram
VDS(A1)
carrier
RF_IN_A
RF_OUT_A / VDS(A2)
VGS(A1)
VGS(A2)
TEMPERATURE
COMPENSATED BIAS
VGS(B1)
VGS(B2)
TEMPERATURE
COMPENSATED BIAS
RF_OUT_B / VDS(B2)
RF_IN_B
VDS(B1)
peaking
aaa-016004
Fig 2.
Block diagram
5. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
-
65
V
VGS
gate-source voltage
0.5
+13
V
Tstg
storage temperature
65
+150
C
-
225
C
-
150
C
Tj
junction temperature
Tcase
case temperature
[1]
[1]
Continuous use at maximum temperature will affect the reliability. For details refer to the online MTF calculator.
BLM7G1822S-80AB_S-80ABG#3
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
3 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
6. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Value
Unit
Carrier section
Rth(j-c)
thermal resistance from junction to case
final stage; Tcase = 90 C; PL = 1.26 W
[1]
2.4
K/W
driver stage; Tcase = 90 C; PL = 1.26 W
[1]
7.6
K/W
final stage; Tcase = 90 C; PL = 2.52 W
[1]
1.5
K/W
driver stage; Tcase = 90 C; PL = 2.52 W
[1]
5.5
K/W
Peaking section
Rth(j-c)
[1]
thermal resistance from junction to case
When operated with a CW signal.
7. Characteristics
Table 6.
DC characteristics
Tcase = 25 C; per section unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VGS = 0 V; ID = 0.302 mA
65
-
-
V
VDS = 28 V; ID = 120 mA
1.6
2
2.45
V
Carrier section
Final stage
V(BR)DSS drain-source breakdown voltage
VGSq
gate-source quiescent voltage
VDS = 28 V; ID = 120 mA
[1]
1.9
2.6
3.3
V
[1]
-
1.5
-
%
IDq/T
quiescent drain current variation with temperature
Tcase = 40 C to +85 C
IDSS
drain leakage current
VGS = 0 V; VDS = 28 V
-
-
1.4
A
IDSX
drain cut-off current
VGS = 5.55 V; VDS = 10 V
-
5.4
-
A
IGSS
gate leakage current
VGS = 1.0 V; VDS = 0 V
-
-
140
nA
Driver stage
V(BR)DSS drain-source breakdown voltage
VGSq
gate-source quiescent voltage
VGS = 0 V; ID = 0.058 mA
65
-
-
V
VDS = 28 V; ID = 40 mA
1.7
2.1
2.55
V
VDS = 28 V; ID = 40 mA
[2]
1.9
2.6
3.2
V
[2]
-
1.5
-
%
IDq/T
quiescent drain current variation with temperature
Tcase = 40 C to +85 C
IDSS
drain leakage current
VGS = 0 V; VDS = 28 V
-
-
1.4
A
IDSX
drain cut-off current
VGS = 5.55 V; VDS = 10 V
-
1.05
-
A
IGSS
gate leakage current
VGS = 1.0 V; VDS = 0 V
-
-
140
nA
VGS = 0 V; ID = 0.604 mA
65
-
-
V
1.6
2.15
2.6
V
2
3
3.8
V
Peaking section
Final stage
V(BR)DSS drain-source breakdown voltage
VGSq
gate-source quiescent voltage
VDS = 28 V; ID = 240 mA
VDS = 28 V; ID = 240 mA
[3]
[3]
IDq/T
quiescent drain current variation with temperature
Tcase = 40 C to +85 C
-
2
-
%
IDSS
drain leakage current
VGS = 0 V; VDS = 28 V
-
-
1.4
A
IDSX
drain cut-off current
VGS = 5.55 V; VDS = 10 V
-
11
-
A
IGSS
gate leakage current
VGS = 1.0 V; VDS = 0 V
-
-
140
nA
BLM7G1822S-80AB_S-80ABG#3
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
4 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
Table 6.
DC characteristics …continued
Tcase = 25 C; per section unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Driver stage
V(BR)DSS drain-source breakdown voltage
VGSq
gate-source quiescent voltage
VGS = 0 V; ID = 0.116 mA
65
-
-
V
VDS = 28 V; ID = 80 mA
1.7
2.15
2.55
V
VDS = 28 V; ID = 80 mA
[4]
2
2.7
3.3
V
[4]
-
2
-
%
IDq/T
quiescent drain current variation with temperature
Tcase = 40 C to +85 C
IDSS
drain leakage current
VGS = 0 V; VDS = 28 V
-
-
1.4
A
IDSX
drain cut-off current
VGS = 5.55 V; VDS = 10 V
-
1.9
-
A
IGSS
gate leakage current
VGS = 1.0 V; VDS = 0 V
-
-
140
nA
[1]
In production circuit with 825 gate feed resistor.
[2]
In production circuit with 850 gate feed resistor.
[3]
In production circuit with 1205 gate feed resistor.
[4]
In production circuit with 460 gate feed resistor.
Table 7.
RF Characteristics
Typical RF performance at f = 2167.5 MHz; Tcase = 25 C; VDS = 28 V; IDq1 = 40 mA (carrier section, driver stage);
IDq2 = 120 mA (carrier section, final stage); PL(AV) = 4 W (carrier section); IDq1 = 80 mA (peaking section, driver stage);
IDq2 = 240 mA (peaking section, final stage); PL(AV) = 8 W (peaking section) unless otherwise specified, measured in an
Ampleon straight lead production circuit.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Carrier section
Test signal: single carrier W-CDMA [1]
Gp
power gain
29.5
31
32.5
dB
D
drain efficiency
21
24
-
%
RLin
input return loss
-
13.5
10
dB
ACPR5M
adjacent channel power ratio (5 MHz)
-
39.5
36.5
dBc
PARO
output peak-to-average ratio
7
7.8
-
dB
Peaking section
Test signal: single carrier W-CDMA [1]
Gp
power gain
26.8
28.3
29.8
dB
D
drain efficiency
20
24
-
%
RLin
input return loss
-
20
10
dB
ACPR5M
adjacent channel power ratio (5 MHz)
-
36
31
dBc
PARO
output peak-to-average ratio
5.2
7
-
dB
Test signal: CW
[2]
s21
phase response difference
normalized; between sections
15
-
+15
deg
s212
insertion power gain difference
normalized; between sections
0.6
-
+0.6
dB
[1]
3GPP test model 1; 64 DPCH; PAR = 9.9 dB at 0.01% probability on CCDF.
[2]
f = 2170 MHz.
BLM7G1822S-80AB_S-80ABG#3
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
5 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
8. Application information
Table 8.
Doherty typical performance
Test signal: 1-tone CW; RF performance at Tcase = 25 C; VDS = 28 V; IDq1 = 40 mA (carrier section, driver stage);
IDq2 = 90 mA (carrier section, final stage); IDq1 = 20 mA (peaking section, driver stage);
VGS = 0.9 V (peaking section, final stage); unless otherwise specified, measured in an Ampleon, f = 1805 MHz to 1880 MHz,
Doherty application circuit (see Figure 3 and Figure 4).
Symbol Parameter
Conditions
Min Typ
Max Unit
PL(3dB)
output power at 3 dB gain compression f = 1842.5 MHz; 1-tone pulsed CW
(10 % duty cycle)
-
89
-
W
D
drain efficiency
at PL(3dB); f = 1842.5 MHz;
1-tone pulsed CW (10 % duty cycle)
-
52.5 -
%
Gp
power gain
PL(AV) = 14.12 W; f = 1842.5 MHz
-
26.3 -
dB
Bvideo
video bandwidth
PL(AV) = 6.3 W; f = 1842.5 MHz; 2-tone CW
-
70
-
MHz
Gflat
gain flatness
PL(AV) = 14.12 W
-
0.5
-
dB
K
Rollett stability factor
Tcase = 40 C; f = 0.1 GHz to 3 GHz
-
>1
-
[1]
[1]
For carrier and peaking sections (S-parameters measured with load-pull jig).
0Ω
0Ω
0Ω
0Ω
100 Ω
24 pF
820 Ω
BLM7G1822S-80AB
820 Ω
24 pF
24 pF
820 Ω
100 Ω
100 Ω
100 pF
100 Ω
820 Ω
10 μF
100 pF
100 Ω
0Ω
0Ω
470 μF
100 pF
10 μF
10 μF 100 pF
10 μF
10 μF
10 μF
100 Ω
0.4 pF
24 pF
24 pF
0.4 pF
24 pF
10 μF
10 μF
0Ω
0Ω
470 μF
aaa-016005
Printed-Circuit Board (PCB): Rogers 4350; thickness = 0.508 mm.
Fig 3.
Component layout
BLM7G1822S-80AB_S-80ABG#3
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
6 of 18
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BLM7G1822S-80AB_S-80ABG#3
Product data sheet
VGS (carrier)
2.65 V
VDS (carrier / driver)
28 V
10 μF
50 V
100 Ω
10 μF
50 V
10 pF
ATC 600F
VGS (carrier / final)
820 Ω
VGS(A2) 2
VGS(A1) 3
10 pF
ATC 600F
820 Ω
RF_IN_A 4
n.c.
n.c.
24 pF
ATC 600F
n.c.
Driver
clamped
RF FET
10 μF
50 V
Final
clamped
RF FET
24 pF
ATC 600F
5
6
7
0.4 pF
ATC 600F
16 RF_OUT_A/VDS(A2)
Driver
RF power FET
24 pF
ATC
600F
Final
RF power FET
24 pF
ATC
600F
X3C19P1-05
n.c.
100 Ω
RF in
100 Ω
24 pF
ATC 600F
n.c.
n.c.
Driver
RF power FET
8
15 RF_OUT_B/VDS(B2)
10 μF
50 V
V GS (peaking / driver)
100 Ω
10 pF
ATC 600F
Driver
clamped
RF FET
Final
clamped
RF FET
10 μF
50 V
24 pF
ATC 600F
VGS(B1) 12
820 Ω
VGS(B2) 13
470 μF
35 V
7 of 18
© Ampleon The Netherlands B.V. 2015. All rights reserved.
10 pF
ATC 600F
V DS(B1) 14
Peaking section
Electrical schematic
VDS (peaking / driver)
28 V
BLM7G1822S-80AB
VDS (peaking / final)
28 V
aaa-016007
LDMOS 2-stage power MMIC
820 Ω
10 μF
50 V
VGS (peaking)
2.5 V
RF out
10
V GS (peaking / final)
10 μF
50 V
Fig 4.
0.4 pF
ATC 600F
9
RF_IN_B 11
100 Ω
Final
RF power FET
BLM7G1822S-80AB(G)
Rev. 3 — 1 September 2015
All information provided in this document is subject to legal disclaimers.
10 μF
50 V
470 μF
35 V
Carrier section
BLM7G1822S-80AB
V DS(A1) 1
V GS (carrier / driver)
100 Ω
VDS (carrier / final)
28 V
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
8.1 Possible circuit topologies
-3 dB / Φ-0°
In A
Out A
-3 dB / Φ-0°
In B
Out B
aaa-016006
Fig 5.
Dual section
Splitter
Combiner
In
-3 dB / Φ-0°
λ/4
λ/4
-3 dB / Φ-90°
Out
aaa-009325
Fig 6.
Doherty
8.2 Ruggedness in class-AB operation
The BLM7G1822S-80AB and BLM7G1822S-80ABG are capable of withstanding a load
mismatch corresponding to VSWR = 10 : 1 through all phases under the following
conditions: f = 2140 MHz; VDS = 32 V; IDq1 = 40 mA (carrier section, driver stage);
IDq2 = 120 mA (carrier section, final stage); IDq1 = 80 mA (peaking section, driver stage);
IDq2 = 180 mA (peaking section, final stage); Pi = 16 dBm (carrier section);
Pi = 22 dBm (peaking section). Pi is measured at CW and corresponding to PL(3dB) under
ZS = 50 load.
BLM7G1822S-80AB_S-80ABG#3
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
8 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
8.3 Impedance information
Table 9.
Typical impedance
Measured load-pull data at 3 dB gain compression point; test signal: pulsed CW; Tcase = 25 C; VDS = 28 V; tp = 100 s;
= 10 %; ZS = 50 ; IDq1 = 40 mA (carrier section, driver stage); IDq2 = 110 mA (carrier section, final stage);
IDq1 = 80 mA (peaking section, driver stage); IDq2 = 200 mA (peaking section, final stage). Typical values unless otherwise
specified.
tuned for maximum output power
tuned for maximum power added efficiency
f
ZL
Gp(max) PL
add
AM-PM
ZL
conversion
Gp(max) PL
add
AM-PM
conversion
(MHz)
()
(dB)
(%)
(deg)
(dB)
(W)
(%)
(deg)
(W)
()
Carrier section
BLM7G1822S-80AB
1805
7.7 j10.6
32.2
45.8
51
0.3
16.7 j4.2
33.5
43.9
58.8
4.9
1842.5
7.8 j10.6
32.3
45.8
51.8
0.9
16.2 j5.6
33.4
44
58.5
3
1880
7.7 j10.6
32.3
45.8
52.1
1.4
12.2 j4.6
33.4
44.5
58.4
2.8
1930
6.7 j10.8
32
45.7
48.8
0.3
11.6 j3.4
33.5
44.1
57.7
4.3
1960
7.8 j10.6
32.6
45.7
51.4
1.6
9.9 j4.4
33.6
44.6
57.6
2.3
1990
6.3 j9.5
32.5
45.7
49.1
0.5
8.6 j4.3
33.6
44.6
57
3.1
2110
6.3 j9.5
33
45.8
51.4
4
7.3 j4.8
33.8
44.6
56.4
4.4
2140
6.3 j9.5
33
45.7
51.8
5.9
7.3 j4.8
33.8
44.5
56.2
5.4
2170
6.8 j10.8
32.8
45.6
50.1
7.5
7.0 j6.3
33.6
44.9
56.5
7
BLM7G1822S-80ABG
1805
8.0 j13.4
31.8
45.8
50.3
1.7
14.8 j8.7
33
44.6
58.1
5.5
1842.5
8.0 j13.4
31.9
45.8
49.2
1
16.3 j4.3
33.3
44.7
57.5
7.4
1880
8.0 j13.4
32.1
45.8
50
0.3
12.7 j7.1
33.2
44.5
57.3
4.3
1930
8.0 j13.4
32.1
45.8
50.3
0.6
12.8 j7.3
33.2
44.4
56.3
3.4
1960
8.0 j13.4
32.4
45.7
49.9
0.4
11.1 j6.8
33.5
44.5
56.1
3.6
1990
7.7 j15.2
32.2
45.7
47
0.7
9.0 j7.7
33.4
44.8
55.9
3.4
2110
8.1 j13.4
33
45.8
52.1
6.1
7.6 j8.0
33.6
44.7
56.1
6.7
2140
6.5 j12.8
32.7
45.7
50.8
8.9
7.6 j8.0
33.5
44.5
55.7
7.7
2170
7.0 j14.1
32.4
45.6
49.1
10
8.6 j9.0
33.3
44.8
55.8
7.8
Peaking section
BLM7G1822S-80AB
1810
2.6 j5.9
29.2
48.6
49.6
2.7
5.4 j5.1
30.3
47.4
56.4
5.6
1840
2.7 j5.8
29.9
48.5
49.3
3.8
4.9 j4.8
30.9
47.5
56.3
6.2
1880
2.6 j5.8
29.6
48.5
48.5
2.4
4.8 j4.3
30.6
47.4
55.3
5
1930
2.6 j5.8
29.9
48.4
47.9
1.1
4.3 j4.2
30.8
47.4
54.3
2.9
1960
2.6 j5.8
29.9
48.4
48
1
4.2 j4.2
30.8
47.5
54.3
2.2
1990
2.6 j5.7
29.6
48.3
47.5
2.1
3.6 j4.0
30.4
47.4
53.8
3.9
2110
2.6 j5.8
29.8
48.3
48.3
3.6
3.1 j4.1
30.2
47.4
52.6
4.7
2140
2.6 j5.8
29.8
48.3
48.6
4.1
3.1 j4.7
30.3
47.6
51.9
3.9
2170
2.6 j5.8
29.5
48.2
46
5.4
2.6 j4.7
30.1
47.5
51.2
6.4
BLM7G1822S-80AB_S-80ABG#3
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Product data sheet
Rev. 3 — 1 September 2015
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9 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
Table 9.
Typical impedance …continued
Measured load-pull data at 3 dB gain compression point; test signal: pulsed CW; Tcase = 25 C; VDS = 28 V; tp = 100 s;
= 10 %; ZS = 50 ; IDq1 = 40 mA (carrier section, driver stage); IDq2 = 110 mA (carrier section, final stage);
IDq1 = 80 mA (peaking section, driver stage); IDq2 = 200 mA (peaking section, final stage). Typical values unless otherwise
specified.
tuned for maximum output power
tuned for maximum power added efficiency
f
ZL
Gp(max) PL
add
AM-PM
ZL
conversion
Gp(max) PL
add
AM-PM
conversion
(MHz)
()
(dB)
(W)
(%)
(deg)
()
(dB)
(W)
(%)
(deg)
BLM7G1822S-80ABG
1810
3.0 j8.9
29.3
48.4
50.6
1.7
5.3 j7.6
30.3
47.5
57.5
5.3
1840
2.7 j8.7
29.1
48.3
48.4
4.4
5.0 j7.5
30.2
47.5
56.9
7.5
1880
3.0 j8.8
29.4
48.4
50.5
2.3
4.7 j7.1
30.3
47.4
56.4
5.1
1930
2.7 j9.0
29.6
48.4
48.7
2.7
4.4 j7.0
30.6
47.4
56.1
5.5
1960
2.7 j9.0
29.6
48.4
48.7
2.7
4.0 j6.8
30.6
47.4
55.9
5.3
1990
2.7 j8.9
29.7
48.4
48
2
3.8 j7.1
30.6
47.5
55
3.7
2110
2.7 j9.5
29.9
48.5
49.5
3.4
2.8 j7.6
30.6
47.6
54.9
4.2
2140
2.6 j9.5
29.9
48.3
49.1
4
2.6 j7.9
30.5
47.6
53.7
3.2
2170
2.4 j9.7
29.7
48.3
47.4
5.5
2.6 j8.2
30.5
47.7
53
4.6
8.4 Graphs
aaa-015648
29
Gp
(dB)
-3
aaa-015649
28
RLin
(dB)
Gp
(dB)
0
RLin
(dB)
(1)
27
(1)
25
-11
26
-19
24
-10
-20
(2)
(2)
23
21
1700
1750
1800
-27
1850
1900
1950
f (MHz)
22
-35
2000
-30
20
-40
1800 1810 1820 1830 1840 1850 1860 1870 1880
f (MHz)
Tcase = 25 C; VDS = 28 V; PL = 7.6 W;
IDq1 = 40 mA (carrier section, driver stage);
IDq2 = 90 mA (carrier section, final stage);
IDq1 = 20 mA (peaking section, driver stage);
VGS = 0.9 V (peaking section, final stage).
Tcase = 25 C; VDS = 28 V; PL = 7.6 W;
IDq1 = 40 mA (carrier section, driver stage);
IDq2 = 90 mA (carrier section, final stage);
IDq1 = 20 mA (peaking section, driver stage);
VGS = 0.9 V (peaking section, final stage).
Test signal: CW.
Test signal: CW.
(1) magnitude of Gp
(1) magnitude of Gp
(2) magnitude of RLin
(2) magnitude of RLin
Fig 7.
Wideband power gain and input return loss as
function of frequency; typical values
Fig 8.
In-band power gain and input return loss as
function of frequency; typical values
BLM7G1822S-80AB_S-80ABG#3
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Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
10 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
aaa-015672
29
80
Gp
(dB)
ηD .
(%)
27
Gp
(1)
(2)
(3)
25
23
(.
aaa-015671
2
φs21/φs21(norm)
(deg)
60
0
40
-2
20
-4
0
-6
(1)
(2)
(3)
ηD
21
25
30
35
40
45
PL (dBm)
50
20
Tcase = 25 C; VDS = 28 V;
IDq1 = 40 mA (carrier section, driver stage);
IDq2 = 90 mA (carrier section, final stage);
IDq1 = 20 mA (peaking section, driver stage);
VGS = 0.9 V (peaking section, final stage).
25
30
40
45
PL (dBm)
50
Tcase = 25 C; VDS = 28 V;
IDq1 = 40 mA (carrier section, driver stage);
IDq2 = 90 mA (carrier section, final stage);
IDq1 = 20 mA (peaking section, driver stage);
VGS = 0.9 V (peaking section, final stage).
Test signal: pulsed CW (tp = 200 s; = 10 %).
Test signal: pulsed CW (tp = 200 s; = 10 %).
(1) f = 1805 MHz
(1) f = 1805 MHz
(2) f = 1842.5 MHz
(2) f = 1842.5 MHz
(3) f = 1880 MHz
(3) f = 1880 MHz
Fig 9.
35
Power gain and drain efficiency as function of
output power; typical values
Fig 10. Normalized phase response as a function of
output power; typical values
aaa-015673
-10
IMD
(dBc)
(1)
(2)
IMD3
-30
IMD5
(1)
(2)
IMD7
(1)
(2)
-50
-70
-90
1
10
102
tone spacing (MHz)
103
Tcase = 25 C; VDS = 28 V; IDq1 = 40 mA (carrier section, driver stage); IDq2 = 90 mA (carrier section, final stage);
IDq1 = 20 mA (peaking section, driver stage); VGS = 0.9 V (peaking section, final stage).
Test signal: 2-tone CW (fc = 1842.5 MHz).
(1) IMD low
(2) IMD high
Fig 11. Intermodulation distortion as a function of tone spacing; typical values
BLM7G1822S-80AB_S-80ABG#3
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Product data sheet
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11 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
aaa-015674
-25
ACPR
(dBc)
45
ηD
(%)
-35
35
-45
25
ACPR5M
-55
15
ηD
-65
5
ACPR10M
-75
-5
28
30
32
34
36
38
40
PL (dBm)
42
Tcase = 25 C; VDS = 28 V; IDq1 = 40 mA (carrier section, driver stage); IDq2 = 90 mA (carrier section, final stage);
IDq1 = 20 mA (peaking section, driver stage); VGS = 0.9 V (peaking section, final stage).
Test signal: 3GPP test model 1; 64 DPCH; PAR = 9.9 dB at 0.01 % probability on CCDF; f = 1842.5 MHz.
Fig 12. Adjacent channel power ratio and drain efficiency as function of output power; typical values
BLM7G1822S-80AB_S-80ABG#3
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Product data sheet
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12 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
9. Package outline
HSOP16F: plastic, heatsink small outline package; 16 leads(flat)
SOT1211-2
D
E
X
c
D3
E3
B
y
A
HE
v
A
D1
D2
e1
b1(2x)
w
16
B
15
(8x) METAL
PROTRUSIONS (SOURCE)
e6
(2x)
F(16x)
e5
(2x)
E2
A
E1
A2
Q1
pin 1
index
A1
detail X
1
14
b(14x)
e2
w
B
e (12x)
e3 (2x)
HE
e4 (2x)
0
Q1
v
w
y
16.16 1.62
0.1
15.96 1.57 0.25 0.25
15.76 1.52
10 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
max
nom
min
A
3.9
A1
A2
b
b1
c
D(1)
D1
D2
D3
E(1)
E1
E2
E3
e
e1
e2
0.2 3.65 0.40 5.55 0.27 20.62 19.00 16.05 20.44 10.01 8.18 5.89 9.83
0.1 3.60 0.35 5.50 0.22 20.57 18.95 16.00 20.39 9.96 8.13 5.84 9.78 1.0 7.45 1.5
0 3.55 0.30 5.45 0.17 20.52 18.90 15.95 20.34 9.91 8.08 5.79 9.73
e3
e4
References
IEC
JEDEC
JEITA
e6
F
8.45 9.55 2.97 4.07 0.2
Note
1. Package body dimensions “D and “E do not include mold and metal protrusions. Allowable protrusion is 0.25 mm per side.
2. Lead width dimensions “b and “ b1 do not include dambar protrusions. Allowable dambar protrusion is 0.25 mm in total per lead.
Outline
version
e5
European
projection
sot1211-2_po
Issue date
15-01-12
15-06-09
SOT1211-2
Fig 13. Package outline SOT1211-2 (HSOP16F)
BLM7G1822S-80AB_S-80ABG#3
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Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
13 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
HSOP16: plastic, heatsink small outline package; 16 leads
SOT1212-2
E
X
E3
A
D
c
B
D3
y
v
HE
A
D1
D2
e1
b1(2x)
w
16
B
(8x) METAL
PROTRUSIONS (SOURCE)
15
e6
e5
(2x)
(2x)
Q
E2
E1
A
A2
(A3)
A1 A4
pin 1 index
θ
1
H
14
Lp
detail X
e2
e
(12x)
b
(14x)
w
B
e3 (2x)
e4 (2x)
HE
0
Unit
mm
max
nom
min
A
3.9
A1
A2
A3
A4
b
b1
c
D(1)
10 mm
D1
D2
D3
E(1)
Q
v
w
E1
E2
E3
e
e1
e2
e3
e4
e5
θ
7°
3°
0°
e6
0.2 3.65
0.06 0.40 5.55 0.27 20.62 19.00 16.05 20.44 10.01 8.18 5.89 9.83
0.1 3.60 0.35 0 0.35 5.50 0.22 20.57 18.95 16.00 20.39 9.96 8.13 5.84 9.78 1.0 7.45 1.5 8.45 9.55 2.97 4.07
0 3.55
-0.02 0.30 5.45 0.17 20.52 18.90 15.95 20.34 9.91 8.08 5.79 9.73
Note
1. Package body dimensions “D'' and `'E'' do not include mold and metal protrusions. Allowable protrusion is 0.25 mm per side.
2. Lead width dimensions `'b'' and `'b1'' do not include dambar protrusions. Allowable dambar protrusion is 0.25 mm in total per lead.
3. Dimension A4 is measured with respect to bottom of the heatsink DATUM H. Positive value means that the bottom of the heatsink is
higher than the bottom of the lead.
Outline
version
y
13.5 1.10 2.07
0.1
13.2 0.95 2.02 0.25 0.25
12.9 0.80 1.97
scale
Dimensions (mm are the original dimensions)
Lp
References
IEC
JEDEC
JEITA
European
projection
sot1212-2_po
Issue date
15-01-14
15-06-09
SOT1212-2
Fig 14. Package outline SOT1212-2 (HSOP16)
BLM7G1822S-80AB_S-80ABG#3
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Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
14 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
10. Handling information
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
11. Abbreviations
Table 10.
Abbreviations
Acronym
Description
AM
Amplitude Modulation
3GPP
3rd Generation Partnership Project
CCDF
Complementary Cumulative Distribution Function
CW
Continuous Wave
DPCH
Dedicated Physical CHannel
ESD
ElectroStatic Discharge
GEN7
Seventh Generation
LDMOS
Laterally Diffused Metal Oxide Semiconductor
MMIC
Monolithic Microwave Integrated Circuit
MTF
Median Time to Failure
PAR
Peak-to-Average Ratio
PM
Phase Modulation
VSWR
Voltage Standing-Wave Ratio
W-CDMA
Wideband Code Division Multiple Access
12. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
BLM7G1822S-80AB_S-80ABG#3
20150901
Product data sheet
Modifications:
Change notice
Supersedes
BLM7G1822S-80AB_S
-80ABG v.2
•
The format of this document has been redesigned to comply with the new
identity guidelines of Ampleon.
•
Legal texts have been adapted to the new company name where appropriate.
BLM7G1822S-80AB_S-80ABG v.2
20150701
Product data sheet
-
BLM7G1822S-80AB_
S-80ABG v.1
BLM7G1822S-80AB_S-80ABG v.1
20141128
Product data sheet
-
-
BLM7G1822S-80AB_S-80ABG#3
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Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
15 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
13. Legal information
13.1 Data sheet status
Document status[1][2]
Product status[3]
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
Definition
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.ampleon.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Ampleon does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Ampleon sales office. In
case of any inconsistency or conflict with the short data sheet, the full data
sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Ampleon and its customer, unless Ampleon and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be valid
in which the Ampleon product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
13.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Ampleon does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Ampleon takes no responsibility for
the content in this document if provided by an information source outside of
Ampleon.
In no event shall Ampleon be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost profits,
lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Ampleon’ aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Ampleon.
Right to make changes — Ampleon reserves the right to make changes to
information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Ampleon products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction of an
Ampleon product can reasonably be expected to result in personal injury,
death or severe property or environmental damage. Ampleon and its
suppliers accept no liability for inclusion and/or use of Ampleon products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Ampleon makes no representation
or warranty that such applications will be suitable for the specified use without
further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Ampleon products, and Ampleon accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Ampleon product is suitable and
fit for the customer’s applications and products planned, as well as for the
planned application and use of customer’s third party customer(s). Customers
should provide appropriate design and operating safeguards to minimize the
risks associated with their applications and products.
Ampleon does not accept any liability related to any default, damage, costs or
problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Ampleon products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Ampleon does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Ampleon products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.ampleon.com/terms, unless otherwise agreed in a valid written
individual agreement. In case an individual agreement is concluded only the
terms and conditions of the respective agreement shall apply. Ampleon
hereby expressly objects to applying the customer’s general terms and
conditions with regard to the purchase of Ampleon products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
BLM7G1822S-80AB_S-80ABG#3
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Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
16 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Ampleon product is automotive qualified, the product
is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Ampleon
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without Ampleon’ warranty of the product for such
automotive applications, use and specifications, and (b) whenever customer
uses the product for automotive applications beyond Ampleon’ specifications
such use shall be solely at customer’s own risk, and (c) customer fully
indemnifies Ampleon for any liability, damages or failed product claims
resulting from customer design and use of the product for automotive
applications beyond Ampleon’ standard warranty and Ampleon’ product
specifications.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Any reference or use of any ‘NXP’ trademark in this document or in or on the
surface of Ampleon products does not result in any claim, liability or
entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of
the NXP group of companies and any reference to or use of the ‘NXP’
trademarks will be replaced by reference to or use of Ampleon’s own Any
reference or use of any ‘NXP’ trademark in this document or in or on the
surface of Ampleon products does not result in any claim, liability or
entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of
the NXP group of companies and any reference to or use of the ‘NXP’
trademarks will be replaced by reference to or use of Ampleon’s own
trademarks.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
14. Contact information
For more information, please visit:
http://www.ampleon.com
For sales office addresses, please visit:
http://www.ampleon.com/sales
BLM7G1822S-80AB_S-80ABG#3
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 3 — 1 September 2015
© Ampleon The Netherlands B.V. 2015. All rights reserved.
17 of 18
BLM7G1822S-80AB(G)
LDMOS 2-stage power MMIC
15. Contents
1
1.1
1.2
1.3
2
2.1
2.2
3
4
5
6
7
8
8.1
8.2
8.3
8.4
9
10
11
12
13
13.1
13.2
13.3
13.4
14
15
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Application information. . . . . . . . . . . . . . . . . . . 6
Possible circuit topologies . . . . . . . . . . . . . . . . 8
Ruggedness in class-AB operation . . . . . . . . . 8
Impedance information . . . . . . . . . . . . . . . . . . . 9
Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
Handling information. . . . . . . . . . . . . . . . . . . . 15
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Contact information. . . . . . . . . . . . . . . . . . . . . 17
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© Ampleon The Netherlands B.V. 2015.
All rights reserved.
For more information, please visit: http://www.ampleon.com
For sales office addresses, please visit: http://www.ampleon.com/sales
Date of release: 1 September 2015
Document identifier: BLM7G1822S-80AB_S-80ABG#3
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