HSMP-3892

Surface Mount RF PIN Switch Diodes Technical Data HSMP-389x Series HSMP-489x Series Features • Switching – Low Capacitance – Low Resistance at Low Current • Low Failure in Time (FIT) Rate[1] • Matched Diodes for Consistent Performance • Better Thermal Conductivity for Higher Power Dissipation Note: 1. For more information see the Surface Mount PIN Reliability Data Sheet. 1 2 3 GUx • Unique Configurations in Surface Mount Packages – Add Flexibility – Save Board Space – Reduce Cost Pin Connections and Package Marking 6 5 4 Notes: 1. Package marking provides orientation, identification, and date code. 2. See “Electrical Specifications” for appropriate package marking. Description/Applications The HSMP-389x series is optimized for switching applications where low resistance at low current and low capacitance are required. The HSMP-489x series products feature ultra low parasitic inductance. These products are specifically designed for use at frequencies which are much higher than the upper limit for conventional PIN diodes. 2 Package Lead Code Identification, SOT-23/143 (Top View) SERIES SINGLE Package Lead Code Identification, SOT-323 (Top View) SERIES SINGLE #0 #2 B C COMMON ANODE COMMON CATHODE COMMON ANODE COMMON CATHODE #3 #4 UNCONNECTED PAIR DUAL ANODE E Package Lead Code Identification, SOT-363 (Top View) UNCONNECTED TRIO 6 5 1 2 DUAL SWITCH MODEL 4 6 5 3 1 2 4 3 L R LOW INDUCTANCE SINGLE SERIES– SHUNT PAIR 6 5 1 2 4 6 5 3 1 2 4 F DUAL ANODE T 3 U HIGH FREQUENCY SERIES 489B 6 5 1 2 4 4890 #5 3 V Absolute Maximum Ratings[1] TC = +25°C Symbol Parameter Unit SOT-23/143 SOT-323/363 If Forward Current (1 µs Pulse) Amp 1 1 PIV Peak Inverse Voltage V 100 100 Tj Junction Temperature °C 150 150 Tstg Storage Temperature °C -65 to 150 -65 to 150 θjc Thermal Resistance[2] °C/W 500 150 Notes: 1. Operation in excess of any one of these conditions may result in permanent damage to the device. 2. TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made to the circuit board. ESD WARNING: Handling Precautions Should Be Taken To Avoid Static Discharge. 3 Electrical Specifications, TC = 25°C, each diode Package Marking Code Part Number HSMP- [1] 3890 3892 3893 3894 3895 389B 389C 389E 389F 389L 389R 389T 389U 389V G0 G2 [1] G3 [1] G4 [1] G5 [1] G0 [2] G2 [2] G3 [2] G4 [2] GL [2] S [2] Z [2] GU [2] GV [2] Lead Code 0 2 3 4 5 B C E F L R T U V Minimum Maximum Maximum Breakdown Series Resistance Total Capacitance Voltage VBR (V) RS (Ω) CT (pF) Configuration Single Series Common Anode Common Cathode Unconnected Pair Single Series Common Anode Common Cathode Unconnected Trio Dual Switch Mode Low Inductance Single Series-Shunt Pair High Frequency Series Pair Test Conditions 100 2.5 0.30 VR = VBR Measure IR ≤ 10 µA IF = 5 mA f = 100 MHz VR = 5 V f = 1 MHz Notes: 1. Package marking code is white. 2. Package is laser marked. High Frequency (Low Inductance, 500 MHz – 3 GHz) PIN Diodes Part Package Number Marking HSMP- Code[1] Configuration 489x GA Test Conditions Minimum Breakdown Voltage VBR (V) Maximum Series Resistance R S (Ω) Typical Total Capacitance C T (pF) Maximum Total Capacitance C T (pF) Typical Total Inductance L T (nH) 100 2.5 0.33 0.375 1.0 VR = VBR Measure IR ≤ 10 µA IF = 5 mA f = 1 MHz VR = 5 V VR = 5 V f = 1 MHz f = 500 MHz – 3 GHz Dual Anode Note: 1. SOT-23 package marking code is white; SOT-323 is laser marked. Typical Parameters at TC = 25°C Part Number HSMP- Series Resistance R S (Ω) Carrier Lifetime τ (ns) Total Capacitance C T (pF) 389x 3.8 200 0.20 @ 5 V Test Conditions IF = 1 mA f = 100 MHz IF = 10 mA IR = 6 mA 4 HSMP-389x Series Typical Performance, TC = 25°C, each diode 120 10 1 INPUT INTERCEPT POINT (dBm) 0.55 TOTAL CAPACITANCE (pF) RF RESISTANCE (OHMS) 100 0.50 0.45 0.40 0.35 0.30 1 MHz 0.25 1 GHz 0.1 0.01 0.1 1 10 0.20 100 0 4 Figure 1. Total RF Resistance at 25°C vs. Forward Bias Current. 16 200 Diode Mounted as a Series Attenuator in a 50 Ohm Microstrip and Tested at 123 MHz 105 100 95 90 85 20 1 10 30 IF – FORWARD BIAS CURRENT (mA) Figure 3. 2nd Harmonic Input Intercept Point vs. Forward Bias Current. Figure 2. Capacitance vs. Reverse Voltage. 100 IF – FORWARD CURRENT (mA) Trr – REVERSE RECOVERY TIME (nS) 12 110 VR – REVERSE VOLTAGE (V) IF – FORWARD BIAS CURRENT (mA) 160 VR = –2V 120 80 VR = –5V 40 VR = –10V 0 10 8 115 15 20 25 10 1 0.1 0.01 30 125°C 25°C –50°C 0 0.2 FORWARD CURRENT (mA) 0.4 0.6 0.8 1.0 1.2 VF – FORWARD VOLTAGE (V) Figure 4. Typical Reverse Recovery Time vs. Reverse Voltage. Figure 5. Forward Current vs. Forward Voltage. Typical Applications for Multiple Diode Products 1 2 2 “ON” “OFF” 3 3 2 1 1 0 4 5 3 2 1 4 5 6 1 0 0 2 +V –V 1 6 b1 b2 b3 RF in Figure 6. HSMP-389L used in a SP3T Switch. RF out Figure 7. HSMP-389L Unconnected Trio used in a Dual Voltage, High Isolation Switch. 5 Typical Applications for Multiple Diode Products (continued) “ON” “OFF” 1 1 +V 0 2 0 +V RF out 1 6 5 4 1 2 3 6 5 4 1 2 3 RF out RF in RF in 2 Figure 8. HSMP-389L Unconnected Trio used in a Positive Voltage, High Isolation Switch. Figure 9. HSMP-389T used in a Low Inductance Shunt Mounted Switch. Bias Xmtr Bias Ant λ 4 Xmtr λ 4 Ant C C Rcvr Bias Rcvr bias Antenna Xmtr PA λ 4 LNA HSMP-389V λ 4 HSMP-389U Rcvr Figure 10. HSMP-389U Series/Shunt Pair used in a 900 MHz Transmit/Receive Switch. Figure 11. HSMP-389V Series/Shunt Pair used in a 1.8 GHz Transmit/Receive Switch. 6 Typical Applications for Multiple Diode Products (continued) RF COMMON RF COMMON RF 2 RF 1 RF 1 RF 2 BIAS 1 BIAS 2 BIAS BIAS Figure 13. High Isolation SPDT Switch, Dual Bias. Figure 12. Simple SPDT Switch, Using Only Positive Current. RF COMMON RF COMMON BIAS RF 1 RF 2 RF 2 RF 1 BIAS Figure 14. Switch Using Both Positive and Negative Bias Current. Figure 15. Very High Isolation SPDT Switch, Dual Bias. 7 Typical Applications for HSMP-489x Low Inductance Series Microstrip Series Connection for HSMP-489x Series In order to take full advantage of the low inductance of the HSMP-489x series when using them in series applications, both lead 1 and lead 2 should be connected together, as shown in Figure 17. 50 OHM MICROSTRIP LINES PAD CONNECTED TO GROUND BY TWO VIA HOLES Figure 18. Circuit Layout. Co-Planar Waveguide Shunt Connection for HSMP-489x Series Co-Planar waveguide, with ground on the top side of the printed circuit board, is shown in Figure 20. Since it eliminates the need for via holes to ground, it offers lower shunt parasitic inductance and higher maximum attenuation when compared to a microstrip circuit. Co-Planar Waveguide Groundplane 3 1.5 nH 1.5 nH Center Conductor Groundplane 1 0.3 pF 2 HSMP-489x Figure 16. Internal Connections. 0.3 nH Figure 20. Circuit Layout. 0.3 nH 0.3 pF Figure 19. Equivalent Circuit. Figure 17. Circuit Layout. Microstrip Shunt Connections for HSMP-489x Series In Figure 18, the center conductor of the microstrip line is interrupted and leads 1 and 2 of the HSMP-489x diode are placed across the resulting gap. This forces the 1.5 nH lead inductance of leads 1 and 2 to appear as part of a low pass filter, reducing the shunt parasitic inductance and increasing the maximum available attenuation. The 0.3 nH of shunt inductance external to the diode is created by the via holes, and is a good estimate for 0.032" thick material. 0.75 nH Figure 21. Equivalent Circuit. Equivalent Circuit Model HSMP-389x Chip* Rs Rj 0.5 Ω Cj 0.12 pF* * Measured at -20 V RT = 0.5 + R j CT = CP + Cj 20 R j = 0.9 Ω I I = Forward Bias Current in mA * See AN1124 for package models A SPICE model is not available for PIN diodes as SPICE does not provide for a key PIN diode characteristic, carrier lifetime. 8 Assembly Information 0.026 0.075 0.035 0.016 Figure 22. PCB Pad Layout, SOT-363. (dimensions in inches). 0.026 0.07 0.035 0.016 Figure 23. PCB Pad Layout, SOT-323. (dimensions in inches). 0.037 0.95 0.037 0.95 SMT Assembly Reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. Components with a low mass, such as the SOT package, will reach solder reflow temperatures faster than those with a greater mass. Agilent’s diodes have been qualified to the time-temperature profile shown in Figure 26. This profile is representative of an IR reflow type of surface mount assembly process. After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) 0.079 2.0 passes through one or more preheat zones. The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporating solvents from the solder paste. The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder. The rates of change of temperature for the ramp-up and cooldown zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal shock. The maximum temperature in the reflow zone (TMAX) should not exceed 235°C. These parameters are typical for a surface mount assembly process for Agilent diodes. As a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform reflow of solder. 250 TMAX 0.035 0.9 DIMENSIONS IN inches mm Figure 24. PCB Pad Layout, SOT-23. 0.112 2.85 TEMPERATURE (°C) 200 0.031 0.8 150 Reflow Zone 100 Preheat Zone 50 0.079 2 0.033 0.85 0 0 0.075 1.9 0.071 1.8 0.041 1.05 0.108 2.75 0.033 0.85 0.047 1.2 0.031 0.033 0.8 0.85 DIMENSIONS IN Cool Down Zone inches mm Figure 25. PCB Pad Layout, SOT-143. 60 120 180 TIME (seconds) Figure 26. Surface Mount Assembly Profile. 240 300 9 Package Dimensions Outline 143 (SOT-143) Outline 23 (SOT-23) 1.02 (0.040) 0.89 (0.035) 0.92 (0.036) 0.78 (0.031) 0.54 (0.021) 0.37 (0.015) PACKAGE MARKING CODE (XX) DATE CODE (X) DATE CODE (X) E 3 1.40 (0.055) 1.20 (0.047) XXX 2.65 (0.104) 2.10 (0.083) C 1.40 (0.055) 1.20 (0.047) XXX B 2 1 0.50 (0.024) 0.45 (0.018) PACKAGE MARKING CODE (XX) E 0.60 (0.024) 0.45 (0.018) 2.04 (0.080) 1.78 (0.070) 0.54 (0.021) 0.37 (0.015) 2.04 (0.080) 1.78 (0.070) TOP VIEW 0.152 (0.006) 0.066 (0.003) 3.06 (0.120) 2.80 (0.110) 3.06 (0.120) 2.80 (0.110) 0.15 (0.006) 0.09 (0.003) 1.02 (0.041) 0.85 (0.033) 1.04 (0.041) 0.85 (0.033) SIDE VIEW 0.69 (0.027) 0.45 (0.018) 0.10 (0.004) 0.013 (0.0005) 0.69 (0.027) 0.45 (0.018) 0.10 (0.004) 0.013 (0.0005) 2.65 (0.104) 2.10 (0.083) END VIEW DIMENSIONS ARE IN MILLIMETERS (INCHES) DIMENSIONS ARE IN MILLIMETERS (INCHES) Outline SOT-323 (SC-70) Outline 363 (SC-70, 6 Lead) PACKAGE MARKING CODE (XX) 1.30 (0.051) REF. PACKAGE MARKING CODE (XX) 1.30 (0.051) REF. 2.20 (0.087) 2.00 (0.079) XXX 2.20 (0.087) 2.00 (0.079) XXX DATE CODE (X) 1.35 (0.053) 1.15 (0.045) 0.650 BSC (0.025) 1.00 (0.039) 0.80 (0.031) 10° 0.30 (0.012) 0.10 (0.004) DIMENSIONS ARE IN MILLIMETERS (INCHES) 0.425 (0.017) TYP. 2.20 (0.087) 1.80 (0.071) 0.10 (0.004) 0.00 (0.00) 0.30 REF. 0.25 (0.010) 0.15 (0.006) 1.35 (0.053) 1.15 (0.045) 0.650 BSC (0.025) 0.425 (0.017) TYP. 2.20 (0.087) 1.80 (0.071) 0.10 (0.004) 0.00 (0.00) DATE CODE (X) 0.30 REF. 0.20 (0.008) 0.10 (0.004) 1.00 (0.039) 0.80 (0.031) 0.25 (0.010) 0.15 (0.006) 10° 0.30 (0.012) 0.10 (0.004) DIMENSIONS ARE IN MILLIMETERS (INCHES) Package Characteristics Lead Material .................... Copper (SOT-323/363); Alloy 42 (SOT-23/143) Lead Finish............................................................................ Tin-Lead 85-15% Maximum Soldering Temperature .............................. 260°C for 5 seconds Minimum Lead Strength .......................................................... 2 pounds pull Typical Package Inductance .................................................................. 2 nH Typical Package Capacitance .............................. 0.08 pF (opposite leads) 0.20 (0.008) 0.10 (0.004) 10 Ordering Information Specify part number followed by option. For example: HSMP - 389x - XXX Bulk or Tape and Reel Option Part Number; x = Lead Code Surface Mount PIN Option Descriptions -BLK = Bulk, 100 pcs. per antistatic bag -TR1 = Tape and Reel, 3000 devices per 7" reel -TR2 = Tape and Reel, 10,000 devices per 13" reel Tape and Reeling conforms to Electronic Industries RS-481, “Taping of Surface Mounted Components for Automated Placement.” 11 Device Orientation REEL TOP VIEW END VIEW 4 mm 8 mm CARRIER TAPE USER FEED DIRECTION ### ### ### ### Note: “###” represents Package Marking Code, Date Code. COVER TAPE Tape Dimensions For Outline SOT-323 (SC-70 3 Lead) P P2 D P0 E F W C D1 t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS) K0 8° MAX. A0 DESCRIPTION 5° MAX. B0 SYMBOL SIZE (mm) SIZE (INCHES) CAVITY LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER A0 B0 K0 P D1 2.24 ± 0.10 2.34 ± 0.10 1.22 ± 0.10 4.00 ± 0.10 1.00 + 0.25 0.088 ± 0.004 0.092 ± 0.004 0.048 ± 0.004 0.157 ± 0.004 0.039 + 0.010 PERFORATION DIAMETER PITCH POSITION D P0 E 1.55 ± 0.05 4.00 ± 0.10 1.75 ± 0.10 0.061 ± 0.002 0.157 ± 0.004 0.069 ± 0.004 CARRIER TAPE WIDTH THICKNESS W t1 8.00 ± 0.30 0.255 ± 0.013 0.315 ± 0.012 0.010 ± 0.0005 COVER TAPE WIDTH TAPE THICKNESS C Tt 5.4 ± 0.10 0.062 ± 0.001 0.205 ± 0.004 0.0025 ± 0.00004 DISTANCE CAVITY TO PERFORATION (WIDTH DIRECTION) F 3.50 ± 0.05 0.138 ± 0.002 CAVITY TO PERFORATION (LENGTH DIRECTION) P2 2.00 ± 0.05 0.079 ± 0.002 www.semiconductor.agilent.com Data subject to change. Copyright © 2000 Agilent Technologies 5968-7701E (1/00)