PI74ALVTC16374
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16-Bit D-Type Flip-Flop
with 3-State Outputs
Product Features
Product Description
• The PI74ALVTC Family is designed for low voltage
operation, VDD = 1.8V to 3.6V
• Supports Live Insertion
• 3.6V I/O Tolerant Inputs and Outputs
• Bus Hold
• High Drive, –32/64mA @ 3.3V
• Uses patented Noise Reduction Circuitry
• Power-Off high impedance inputs and outputs
• Industrial operation at –40°C to +85°C
• Packaging (Pb-free & Green available):
– 48-pin 240 mil wide plastic TSSOP (A)
The PI74ALVTC16374 is particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers. This device can be used as two 8-bit flip-flops or one 16bit flip-flop. On the positive transition of the clock (CLK) input, the
Q outputs of the flip-flop take on the logic levels set up at the data
(D) inputs.
A buffered Output Enable (OE) input can be used to place the eight
outputs in either a normal logic state (high or low logic levels) or
a high-impedance state in which the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the
increased drive provide the capability to drive bus lines without
need for interface or pullup components. OE does not affect
internal operations of the flip-flop. Old data can be retained or new
data can be entered while the outputs are in the high-impedance
state.
To ensure the high-impedance state during power up or power
down, OE should be tied to VDD through a pullup resistor; whose
minimum value is determined by the current-sinking capability of
the driver.
Logic Block Diagram
1OE
1CLK
1
The family offers both I/O Tolerant, which allows it to operate in
mixed 1.8/3.6V systems, and “Bus Hold,” which retains the data
input’s last state whenever the data input goes to high-impedance, preventing “floating” inputs and eliminating the need for
pullup/down resistors.
48
>C1
2
1D1
47
1Q1
1D
To Seven Other Channels
2OE
2CLK
24
25
>C1
13
2D1
36
2Q1
1D
To Seven Other Channels
1
PS8356C
11/06/08
PI74ALVTC16374
16-Bit D-Type Flip-Flop
with 3-State Outputs
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Truth Table(1)
Product Pin Description
Pin Name
De s cription
OE
Output Enable Input (Active LOW)
CLK
Inputs
Outputs
OE
CLK
D
Q
Clock Input
L
↑
H
H
Dx
Data Inputs
L
↑
L
L
Qx
3- State Outputs
L
H or L
X
Q0
GND
Ground
H
X
X
Z
VDD
Power
Notes:
1. H = High Signal Level
L = Low Signal Level
X = Don’t Care or Irrelevant
Z = High Impedance
Product Pin Configuration
1CLK
1D1
1OE
1Q1
1
48
2
47
1Q2
GND
3
46
4
45
1Q3
1Q4
VDD
1Q5
1Q6
5
44
6
43
7
42
8
41
9
40
GND
1Q7
10
39
11
38
1Q8
2Q1
2Q2
12
37
13
36
14
35
1D8
2D1
2D2
GND
15
34
GND
2Q3
2Q4
VDD
16
33
17
32
18
31
2D3
2D4
VDD
2Q5
2Q6
GND
19
30
20
29
21
28
2Q7
2Q8
2OE
22
27
23
26
2D5
2D6
GND
2D7
2D8
24
25
2CLK
1D2
GND
1D3
1D4
VDD
1D5
1D6
GND
1D7
2
PS8356C
11/06/08
PI74ALVTC16374
16-Bit D-Type Flip-Flop
with 3-State Outputs
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Supply Voltage Range, VDD .............................................................. –0.5V to 4.6V
Input Voltage Range, VI ....................................................................... -0.5V to 4.6V
Output Voltage Range, VO (3-Stated) ................................. -0.5V to 4.6V
Output Voltage Range, VO(1) (Active) ....................... –0.5V to VDD +0.5V
DC Input Diode Current (IIK) VI
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