SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996
D Inputs Are TTL-Voltage Compatible
D Designed Specifically for High-Speed
D
D
D
D
D
D
D, N, OR PW PACKAGE
(TOP VIEW)
Memory Decoders and Data Transmission
Systems
Incorporates Two Enable Inputs to Simplify
Cascading and/or Data Reception
Fully Synchronous Operation for Counting
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 300-mil DIPs (N)
1Y1
1Y2
1Y3
GND
2Y0
2Y1
2Y2
2Y3
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
1Y0
1A
1B
1G
VCC
2G
2A
2B
description
The 74ACT11139 is designed for use in high-performance memory-decoding or data-routing applications that
require very short propagation delay times. In high-performance memory systems, this decoder is used to
minimize the effects of system decoding.
The 74ACT11139 is composed of two individual 2-line to 4-line decoders in a single package. The active-low
enables (1G or 2G) can be used as data lines in demultiplexing applications. This decoder/demultiplexer
features fully buffered inputs, each of which represents only one normalized load to its driving circuit.
The 74ACT11139 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS
G
B
A
Y0
Y1
Y2
Y3
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
L
H
H
L
H
H
L
H
L
H
H
L
H
L
H
H
H
H
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
!"# $"%&! '#(
'"! ! $#!! $# )# # #* "#
'' +,( '"! $!#- '# #!#&, !&"'#
#- && $##(
•
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
1
SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996
logic symbol†
1A
1B
15
14
DMUX
1
2
0
G 3
2B
1
2
13
1G
2A
0
3
16
1Y0
1
1Y1
2
1Y2
3
1Y3
5
10
2Y0
6
2Y1
9
7
11
2Y2
8
2G
2Y3
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
16
1G
13
1
1Y0
1Y1
2
1A
1B
1Y2
15
3
14
5
2G
11
6
1Y3
2Y0
2Y1
7
2A
2B
2
2Y2
10
8
9
•
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•
2Y3
SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . . . . 1.3 W
N package . . . . . . . . . . . . . . . . . . . . 1.1 W
PW package . . . . . . . . . . . . . . . . . . . 0.5 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
recommended operating conditions (see Note 3)
MIN
NOM
MAX
4.5
5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
Input voltage
0
VO
IOH
Output voltage
0
IOL
∆t/∆v
High-level input voltage
2
UNIT
V
V
0.8
V
VCC
VCC
V
High-level output current
−24
mA
Low-level output current
24
mA
0
10
ns/V
−40
85
°C
Input transition rise or fall rate
TA
Operating free-air temperature
NOTE 3: Unused or floating inputs must be held high or low.
•
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•
V
3
SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
4.5 V
4.4
4.4
5.5 V
5.4
5.4
4.5 V
3.94
3.8
IOH = −24 mA
5.5 V
4.94
4.8
IOH = −75 mA†
5.5 V
IOH = −50 mA
A
VOH
IOL = 24 mA
IOL = 75 mA†
VI = VCC or GND
II
ICC
∆ICC‡
Ci
MIN
0.1
V
5.5 V
0.1
0.1
4.5 V
0.36
0.44
5.5 V
0.36
0.44
V
1.65
±0.1
±1
5.5 V
8
80
mA
5.5 V
0.9
1
mA
5.5 V
IO = 0
Other inputs at VCC or GND
UNIT
0.1
5.5 V
VI = VCC or GND,
One input at 3.4 V,
MAX
3.85
4.5 V
IOL = 50 mA
A
VOL
TA = 25°C
TYP
MAX
VCC
VI = VCC or GND
5V
3.5
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
mA
pF
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
Y
tPLH
tPHL
G
Y
TA = 25°C
MIN
TYP
MAX
MIN
MAX
1.7
5.7
7.8
1.7
8.5
2.1
5.5
7.4
2.1
8.5
2.7
5.3
7.2
2.7
7.9
1.8
4.3
6.7
1.8
7.5
UNIT
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance
CL = 50 pF,
•
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•
f = 1 MHz
TYP
UNIT
47
pF
SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
3V
Input
(see Note B)
From Output
Under Test
CL = 50 pF
(see Note A)
1.5 V
1.5 V
0V
tPHL
500 Ω
tPLH
50% VCC
Output
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
LOAD CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
•
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•
5
PACKAGE OPTION ADDENDUM
www.ti.com
31-Jul-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
74ACT11139D
ACTIVE
SOIC
D
16
40
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
(4/5)
74ACT11139DR
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
74ACT11139DRE4
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
74ACT11139DRG4
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
74ACT11139N
OBSOLETE
PDIP
N
16
TBD
Call TI
Call TI
-40 to 85
74ACT11139PWLE
OBSOLETE
TSSOP
PW
16
TBD
Call TI
Call TI
-40 to 85
74ACT11139PWR
ACTIVE
TSSOP
PW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2000
Device Marking
ACT11139
AT139
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
31-Jul-2014
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
74ACT11139PWR
Package Package Pins
Type Drawing
TSSOP
PW
16
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
12.4
Pack Materials-Page 1
6.9
B0
(mm)
K0
(mm)
P1
(mm)
5.6
1.6
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74ACT11139PWR
TSSOP
PW
16
2000
367.0
367.0
35.0
Pack Materials-Page 2
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