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AMC1311
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
AMC1311x 高阻抗 2V 输入增强型隔离放大器
1 特性
•
1
•
•
•
•
•
•
•
2 应用
2V 高阻抗输入电压范围,针对隔离式电压测量进
行优化
低失调误差和温漂:
– AMC1311B:±1.5mV(最大值),±15µV/°C
(最大值)
– AMC1311:±9.9mV(最大值),±20µV/°C
(典型值)
固定增益:1
极低增益误差和温漂:
– AMC1311B:±0.3%(最大值),±45ppm/°C
(最大值)
– AMC1311:±1%(最大值),±30ppm/°C(典
型值)
低非线性和温漂:0.01%,1ppm/°C(典型值)
高侧 3.3V 运行电压 (AMC1311B)
高侧电源缺失指示
安全相关认证:
– 符合 DIN V VDE V 0884-11 (VDE V 0884-11):
2017-01 标准的 7000 VPK 增强型隔离
– 符合 UL1577 标准且长达 1 分钟的 5000VRMS
隔离
– CAN/CSA No. 5A 组件接受服务通知、IEC
60950-1 和 IEC 60065 终端设备标准
•
可用于以下应用的隔离式电压检测:
– 电机驱动器
– 变频器
– 不间断电源
3 说明
AMC1311 是一款隔离式精密放大器,此放大器的输出
与输入电路由抗电磁干扰性能极强的隔离栅隔开。根据
VDE V 0884-11 和 UL1577 标准,该隔离栅经认证可
提供高达 7kVPEAK 的增强型电隔离。与隔离式电源结
合使用时,该隔离放大器可将以不同共模电压电平运行
的系统的各器件隔开,并防止较低电压器件损坏。
AMC1311 的高阻抗输入针对连接高压电阻分压器或具
有高输出电阻的其他电压信号源的情况进行了优化。器
件性能出色,支持在闭环系统中进行精确的低温漂电压
或温度检测和控制。集成的高侧电源电压缺失检测功能
可简化系统级设计和诊断。
AMC1311 提供两种性能级别选项:AMC1311B 的额
定扩展工业温度范围为 –55°C 至 +125°C,AMC1311
为 –40°C 至 +125°C。
器件信息(1)
器件编号
封装
AMC1311x
SOIC (8)
封装尺寸(标称值)
5.85mm × 7.50mm
(1) 如需了解所有可用封装,请参阅产品说明书末尾的可订购产品
附录。
简化原理图
HV+
Gate
Driver
R1
AMC1311B
RF
Power Supply
VIN
CF
Gate
Driver
R3
3.0 V to 5.5 V
SHTDN
VDD1
GND1
HV-
Reinforced Isolation
VDD1
Detection
R2
VOUTP
ADS7263
14-Bit ADC
VOUTN
VDD2
3.0 V to 5.5 V
GND2
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SBAS786
AMC1311
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
www.ti.com.cn
目录
1
2
3
4
5
6
7
特性 ..........................................................................
应用 ..........................................................................
说明 ..........................................................................
修订历史记录 ...........................................................
器件比较表 ...............................................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
8
1
1
1
2
3
3
4
Absolute Maximum Ratings ...................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 5
Power Ratings........................................................... 5
Insulation Specifications............................................ 6
Safety-Related Certifications..................................... 7
Safety Limiting Values .............................................. 7
Electrical Characteristics........................................... 8
Switching Characteristics ...................................... 10
Insulation Characteristics Curves ........................ 11
Typical Characteristics .......................................... 12
Detailed Description ............................................ 19
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
19
19
19
21
Application and Implementation ........................ 22
9.1 Application Information............................................ 22
9.2 Typical Application .................................................. 22
9.3 Do's and Don'ts ...................................................... 24
10 Power Supply Recommendations ..................... 25
11 Layout................................................................... 26
11.1 Layout Guidelines ................................................. 26
11.2 Layout Example .................................................... 26
12 器件和文档支持 ..................................................... 27
12.1
12.2
12.3
12.4
12.5
12.6
文档支持 ...............................................................
接收文档更新通知 .................................................
社区资源................................................................
商标 .......................................................................
静电放电警告.........................................................
术语表 ...................................................................
27
27
27
27
27
27
13 机械、封装和可订购信息 ....................................... 27
4 修订历史记录
注:之前版本的页码可能与当前版本有所不同。
Changes from Original (December 2017) to Revision A
Page
•
已更改 Reinforced Isolation Capacitor Lifetime Projection figure ........................................................................................ 11
2
版权 © 2017–2018, Texas Instruments Incorporated
AMC1311
www.ti.com.cn
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
5 器件比较表
参数
AMC1311B
AMC1311
3.0V 至 5.5V
4.5V 至 5.5V
–55°C 至 +125°C
-40°C 至 125°C
4.5V ≤ VDD1 ≤ 5.5V
±1.5mV
±9.9mV
3.0V ≤ VDD1 ≤ 5.5V
±2.5mV
不适用
±3µV/°C(典型值),±15µV/°C(最
大值)
±20µV/°C(典型值)
高侧电源电压,VDD1
额定环境温度,TA
输入失调电压,VOS
输入失调电压温漂,TCVOS
增益误差,EG
增益误差漂移,TCEG
±0.3%
±1%
±5ppm/°C(典型值),±45ppm/°C
(最大值)
±30ppm/°C(典型值)
75kV/µs(最小值)
15kV/µs(最小值)
共模瞬态抗扰度,CMTI
6 Pin Configuration and Functions
DWV Package
8-Pin SOIC
Top View
VDD1
1
8
VDD2
VIN
2
7
VOUTP
SHTDN
3
6
VOUTN
GND1
4
5
GND2
Not to scale
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
NAME
1
VDD1
—
2
VIN
I
Analog input
3
SHTDN
I
Shutdown input, active high, with internal pullup resistor (typical value: 100 kΩ)
4
GND1
—
High-side analog ground
5
GND2
—
Low-side analog ground
6
VOUTN
O
Inverting analog output
7
VOUTP
O
Noninverting analog output
8
VDD2
—
Low-side power supply, 3.0 V to 5.5 V, relative to GND2.
See the Power Supply Recommendations section for power-supply decoupling recommendations.
High-side power supply, 3.0 V to 5.5 V for the AMC1311B (4.5 V to 5.5 V for the AMC1311), relative
to GND1. See the Power Supply Recommendations section for power-supply decoupling
recommendations.
版权 © 2017–2018, Texas Instruments Incorporated
3
AMC1311
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings (1)
MIN
MAX
VDD1 to GND1
–0.3
6.5
VDD2 to GND2
–0.3
6.5
GND1 – 6
VDD1 + 0.5
SHTDN
GND1 – 0.5
VDD1 + 0.5
Output voltage
VOUTP, VOUTN
GND2 – 0.5
VDD2 + 0.5
V
Input current
Continuous, any pin except power-supply pins
–10
10
mA
Power-supply voltage
Input voltage
Temperature
(1)
VIN
Junction, TJ
Storage, Tstg
UNIT
V
V
150
–65
°C
150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VDD1 to GND1, AMC1311
4.5
5
5.5
VDD1 to GND1, AMC1311B
3.0
5
5.5
VDD2 to GND2
3.0
3.3
5.5
V
POWER SUPPLY
High-side power supply
Low-side power supply
V
ANALOG INPUT
Absolute input voltage
VIN to GND1
–2
VDD1
V
VFSR
Specified linear input full-scale voltage
VIN to GND1
–0.1
2
V
VClipping
Input voltage before clipping output
VIN to GND1
2.516
V
DIGITAL INPUT
Input voltage
SHTDN
GND1
VDD1
AMC1311
–40
125
AMC1311B
–55
125
V
TEMPERATURE RANGE
TA
4
Specified ambient temperature
°C
Copyright © 2017–2018, Texas Instruments Incorporated
AMC1311
www.ti.com.cn
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
7.4 Thermal Information
AMC1311x
THERMAL METRIC (1)
DWV (SOIC)
UNIT
8 PINS
RθJA
84.6
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
28.3
°C/W
RθJB
Junction-to-board thermal resistance
41.1
°C/W
ψJT
Junction-to-top characterization parameter
4.9
°C/W
ψJB
Junction-to-board characterization parameter
39.1
°C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
Junction-to-ambient thermal resistance
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Power Ratings
PARAMETER
PD
Maximum power dissipation (both sides)
PD1
Maximum power dissipation (high-side supply)
PD2
Maximum power dissipation (low-side supply)
Copyright © 2017–2018, Texas Instruments Incorporated
TEST CONDITIONS
VALUE
VDD1 = VDD2 = 5.5 V
97.9
VDD1 = VDD2 = 3.6 V, AMC1311B only
56.16
VDD1 = 5.5 V
53.35
VDD1 = 3.6 V, AMC1311B only
30.24
VDD2 = 5.5 V
44.55
VDD2 = 3.6 V
25.92
UNIT
mW
mW
mW
5
AMC1311
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
www.ti.com.cn
7.6 Insulation Specifications
over operating ambient temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VALUE
UNIT
GENERAL
CLR
External clearance (1)
Shortest pin-to-pin distance through air
≥9
mm
CPG
External creepage (1)
Shortest pin-to-pin distance across the package surface
≥9
mm
DTI
Distance through insulation
Minimum internal gap (internal clearance) of the double insulation
(2 × 0.0105 mm)
≥ 0.021
mm
CTI
Comparative tracking index
DIN EN 60112 (VDE 0303-11); IEC 60112
≥ 600
V
Material group
According to IEC 60664-1
Overvoltage category
per IEC 60664-1
I-IV
Rated mains voltage ≤ 600 VRMS
I-IV
Rated mains voltage ≤ 1000 VRMS
I-III
DIN V VDE V 0884-11 (VDE V 0884-11): 2017-01
VIORM
Maximum repetitive peak
isolation voltage
VIOWM
I
Rated mains voltage ≤ 300 VRMS
(2)
At ac voltage (bipolar)
2121
VPK
Maximum-rated isolation
working voltage
At ac voltage (sine wave)
1500
VRMS
At dc voltage
2121
VDC
VIOTM
Maximum transient isolation
voltage
VTEST = VIOTM, t = 60 s (qualification test)
7000
VTEST = 1.2 × VIOTM, t = 1 s (100% production test)
8400
VIOSM
Maximum surge isolation
voltage (3)
Test method per IEC 60065, 1.2/50-µs waveform,
VTEST = 1.6 × VIOSM = 12800 VPK (qualification)
8000
Apparent charge (4)
qpd
Barrier capacitance,
input to output (5)
CIO
Insulation resistance,
input to output (5)
RIO
Method a, after input/output safety test subgroup 2 / 3,
Vini = VIOTM, tini = 60 s,
Vpd(m) = 1.2 × VIORM = 2545 VPK, tm = 10 s
≤5
Method a, after environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s,
Vpd(m) = 1.6 × VIORM = 3394 VPK, tm = 10 s
≤5
Method b1, at routine test (100% production) and preconditioning (type test),
Vini = VIOTM, tini = 1 s,
Vpd(m) = 1.875 × VIORM = 3977 VPK, tm = 1 s
≤5
VIO = 0.5 VPP at 1 MHz
~1
VPK
VPK
pC
pF
12
VIO = 500 V at TA = 25°C
> 10
VIO = 500 V at 100°C ≤ TA ≤ 125°C
> 1011
VIO = 500 V at TS = 150°C
> 109
Pollution degree
2
Climatic category
55/125/21
Ω
UL1577
VISO
(1)
(2)
(3)
(4)
(5)
6
Withstand isolation voltage
VTEST = VISO = 5000 VRMS or 7000 VDC, t = 60 s (qualification),
VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100% production test)
5000
VRMS
Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Care must be
taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed
circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques such as
inserting grooves and ribs on the PCB are used to help increase these specifications.
This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by
means of suitable protective circuits.
Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
Apparent charge is electrical discharge caused by a partial discharge (pd).
All pins on each side of the barrier are tied together, creating a two-pin device.
Copyright © 2017–2018, Texas Instruments Incorporated
AMC1311
www.ti.com.cn
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
7.7 Safety-Related Certifications
VDE
UL
Certified according to DIN V VDE V 0884-11 (VDE V 0884-11):
2017-01, DIN EN 60950-1 (VDE 0805 Teil 1): 2014-08, and
DIN EN 60065 (VDE 0860): 2005-11
Recognized under 1577 component recognition and
CSA component acceptance NO 5 programs
Reinforced insulation
Single protection
Certificate number: 40040142
File number: E181974
7.8 Safety Limiting Values
Safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output (I/O) circuitry.
A failure of the I/O may allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to
overheat the die and damage the isolation barrier, potentially leading to secondary system failures.
PARAMETER
IS
Safety input, output, or supply
current
PS
Safety input, output, or total
power (1)
TS
Maximum safety temperature
(1)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RθJA = 84.6°C/W, TJ = 150°C, TA = 25°C,
VDD1 = VDD2 = 5.5 V, see 图 2
268
RθJA = 84.6°C/W, TJ = 150°C, TA = 25°C,
VDD1 = VDD2 = 3.6 V, AMC1311B only, see 图 2
410
RθJA = 84.6°C/W, TJ = 150°C, TA = 25°C, see 图 3
1477
mW
150
°C
mA
Input, output, or the sum of input and output power must not exceed this value.
The maximum safety temperature is the maximum junction temperature specified for the device. The power
dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines
the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that
of a device installed on a high-K test board for leaded surface-mount packages. The power is the recommended
maximum input voltage times the current. The junction temperature is then the ambient temperature plus the
power times the junction-to-air thermal resistance.
Copyright © 2017–2018, Texas Instruments Incorporated
7
AMC1311
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
www.ti.com.cn
7.9 Electrical Characteristics
minimum and maximum specifications of the AMC1311 apply from TA = –40°C to +125°C, VDD1 = 4.5 V to 5.5 V,
VDD2 = 3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and SHTDN = GND1 = 0 V; minimum and maximum specifications of the
AMC1311B apply from TA = –55°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and
SHTDN = GND1 = 0 V; typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
AMC1311, initial, at TA = 25°C, VIN = GND1
–9.9
±0.4
9.9
AMC1311B, initial, at TA = 25°C,
VIN = GND1, 4.5 V ≤ VDD1 ≤ 5.5 V
–1.5
±0.4
1.5
AMC1311B, initial, at TA = 25°C,
VIN = GND1, 3.0 V ≤ VDD1 ≤ 5.5 V (2)
–2.5
–1.1
2.5
UNIT
ANALOG INPUT
Input offset voltage (1)
VOS
TCVOS
Input offset drift (1)
CIN
Input capacitance (3)
RIN
Input resistance (3)
IIB
Input bias current
TCIIB
Input bias current drift
AMC1311
AMC1311B
±20
–15
fIN = 275 kHz
VIN = GND1
–15
±3
15
mV
µV/°C
7
pF
1
GΩ
3.5
15
±10
nA
pA/°C
ANALOG OUTPUT
Nominal gain
Gain error (1)
EG
TCEG
Gain error drift (1)
1
AMC1311, initial, at TA = 25°C
AMC1311B, initial, at TA = 25°C
–1%
0.4%
1%
–0.3% ±0.05%
0.3%
AMC1311
AMC1311B
Nonlinearity (1)
±30
–45
±5
45
–0.04% ±0.01%
0.04%
Nonlinearity drift
THD
SNR
PSRR
1
Total harmonic distortion
VIN = 2 V, fIN = 10 kHz, BW = 100 kHz
Output noise
VIN = GND1, BW = 100 kHz
Signal-to-noise ratio
Power-supply rejection ratio (4)
VCMout
Common-mode output voltage
VFAILSAFE
Failsafe differential output
voltage
BW
Output bandwidth
ROUT
Output resistance
VIN = 2 V, fIN = 1 kHz, BW = 10 kHz
79
CMTI
(1)
(2)
(3)
(4)
8
220
μVRMS
82.6
PSRR vs VDD1, at dc
–65
PSRR vs VDD1, 100-mV and 10-kHz ripple
–65
PSRR vs VDD2, at dc
–85
PSRR vs VDD2, 100-mV and 10-kHz ripple
–70
dB
1.49
V
–2.6
–2.5
V
100
220
AMC1311B
220
275
On VOUTP or VOUTN
dB
1.44
AMC1311
< 0.2
Output short-circuit current
Common-mode transient
immunity
dB
70.9
1.39
ppm/°C
–87
VIN = 2 V, fIN = 10 kHz, BW = 100 kHz
VOUTP – VOUTN, SHTDN = high,
or VDD1 ≤ VDD1UV, or VDD1 missing
ppm/°C
±13
|GND1 – GND2| = 1 kV, AMC1311
15
30
|GND1 – GND2| = 1 kV, AMC1311B
75
140
kHz
Ω
mA
kV/µs
The typical value includes one sigma statistical variation.
The typical value is at VDD1 = 3.3 V.
See the Analog Input section for more details.
This parameter is output referred.
Copyright © 2017–2018, Texas Instruments Incorporated
AMC1311
www.ti.com.cn
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
Electrical Characteristics (continued)
minimum and maximum specifications of the AMC1311 apply from TA = –40°C to +125°C, VDD1 = 4.5 V to 5.5 V,
VDD2 = 3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and SHTDN = GND1 = 0 V; minimum and maximum specifications of the
AMC1311B apply from TA = –55°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and
SHTDN = GND1 = 0 V; typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT (SHTDN Pin: CMOS Logic Family, CMOS With Schmitt-Trigger)
GND1 ≤ VSHTDN ≤ VDD1
IIN
Input current
CIN
Input capacitance
–70
1
VIH
High-level input voltage
0.7 × VDD1
VDD1 + 0.3
V
VIL
Low-level input voltage
–0.3
0.3 × VDD1
V
2.53
2.7
V
6
8.4
4.5 V ≤ VDD1 ≤ 5.5 V, SHTDN = low
7.1
9.7
SHTDN = high
1.3
3.0 V ≤ VDD2 ≤ 3.6 V
5.3
7.2
4.5 V ≤ VDD2 ≤ 5.5 V
5.9
8.1
5
µA
pF
POWER SUPPLY
VDD1UV
VDD1 undervoltage detection
threshold voltage
VDD1 falling
AMC1311B only, 3.0 V ≤ VDD1 ≤ 3.6 V,
SHTDN = low
IDD1
IDD2
High-side supply current
Low-side supply current
Copyright © 2017–2018, Texas Instruments Incorporated
1.75
mA
µA
mA
9
AMC1311
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
www.ti.com.cn
7.10 Switching Characteristics
over operating ambient temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
tr
Rise time of VOUTP, VOUTN
See 图 1
1.3
tf
Fall time of VOUTP, VOUTN
See 图 1
1.3
VIN to VOUTN, VOUTP signal
delay
(50% – 10%)
AMC1311, unfiltered output, see 图 1
1.5
2.5
AMC1311B, unfiltered output, see 图 1
1.0
1.5
VIN to VOUTN, VOUTP signal
delay
(50% – 50%)
AMC1311, unfiltered output, see 图 1
2.1
3.1
AMC1311B, unfiltered output, see 图 1
1.6
2.1
VIN to VOUTN, VOUTP signal
delay
(50% – 90%)
AMC1311, unfiltered output, see 图 1
3.0
4.0
AMC1311B, unfiltered output, see 图 1
2.5
3.0
UNIT
µs
µs
µs
µs
µs
tAS
Analog settling time
VDD1 step to 3.0 V with VDD2 ≥ 3.0 V,
to VOUTP, VOUTN valid, 0.1% settling
50
100
µs
tEN
Device enable time
SHTDN high to low
50
100
µs
tSHTDN
Shutdown time
SHTDN low to high
3
10
µs
2V
VIN
50%
0V
50% - 50%
50% - 90%
50% - 10%
VOUTP
50%
10%
VCMout
VOUTN
tr
tf
图 1. Rise, Fall, and Delay Time Waveforms
10
版权 © 2017–2018, Texas Instruments Incorporated
AMC1311
www.ti.com.cn
7.11
ZHCSH46A – DECEMBER 2017 – REVISED JUNE 2018
Insulation Characteristics Curves
1600
500
AVDD = DVDD = 3.6 V, AMC1311B
AVDD = DVDD = 5.5 V
1400
400
300
PS (mW)
IS (mA)
1200
200
1000
800
600
400
100
200
0
0
0
50
100
TA (°C)
150
200
0
50
D001
图 2. Thermal Derating Curve for Safety-Limiting Current per
VDE
1.E+11
1.E+10
87.5%
100
TA (qC)
150
200
D002
图 3. Thermal Derating Curve for Safety-Limiting
Power per VDE
Safety Margin Zone: 1800 VRMS, 254 Years
Operating Zone: 1500 VRMS, 135 Years
TDDB Line (