CSD17575Q3

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents CSD17575Q3 SLPS489A – JUNE 2014 – REVISED AUGUST 2014 CSD17575Q3 30-V N-Channel NexFET™ Power MOSFET 1 Features • • • • • • • • 1 Product Summary Low Qg and Qgd Low RDS(on) Low Thermal Resistance Avalanche Rated Pb Free Terminal Plating RoHS Compliant Halogen Free SON 3.3 mm × 3.3 mm Plastic Package TA = 25°C • 30 V Qg Gate Charge Total (4.5V) 23 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source OnResistance Vth Threshold Voltage Media Qty Package Ship 2500 CSD17575Q3T 13-Inch Reel 250 SON 3.3 × 3.3 mm Plastic Package Tape and Reel TA = 25°C VALUE UNIT VDS Drain-to-Source Voltage 30 V VGS Gate-to-Source Voltage ±20 V Continuous Drain Current (Package Limit) 60 Continuous Drain Current (Silicon Limit), TC = 25°C 182 (1) D 7 2 D PD 27 Pulsed Drain Current(2) 240 Power Dissipation(1) 2.8 Power Dissipation, TC = 25°C 108 –55 to 150 °C 115 mJ D TJ, Tstg Operating Junction and Storage Temperature Range 5 D EAS Avalanche Energy, single pulse ID = 48, L = 0.1 mH, RG = 25 Ω A W (1) Typical RθJA = 45°C/W on 1-inch2 Cu (2 oz.) on 0.060-inch thick FR4 PCB. (2) Max RθJC = 1.5°C/W, pulse duration ≤100 μs, duty cycle ≤1% P0095-01 RDS(on) vs VGS Gate Charge 8 10 TC = 25°C, I D = 25A TC = 125°C, I D = 25A 7 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (mΩ) A Continuous Drain Current 6 D 6 5 4 3 2 1 0 V 13-Inch Reel IDM 4 1.4 mΩ Device ID 8 1 G 1.9 Absolute Maximum Ratings Top View 3 VGS = 10 V (1) For all available packages, see the orderable addendum at the end of the data sheet. This 1.9 mΩ, 30 V, SON 3×3 NexFET™ power MOSFET is designed to minimize losses in power conversion applications. S nC 2.6 CSD17575Q3 3 Description S 5.4 VGS = 4.5 V . Ordering Information(1) Point of Load Synchronous Buck Converter for Applications in Networking, Telecom, and Computing Systems Optimized for Synchronous FET Applications S UNIT Drain-to-Source Voltage 2 Applications • TYPICAL VALUE VDS 0 2 4 6 8 10 12 14 16 VGS - Gate-to- Source Voltage (V) 18 20 G001 9 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 Qg - Gate Charge (nC) 45 50 55 G001 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD17575Q3 SLPS489A – JUNE 2014 – REVISED AUGUST 2014 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 Trademarks ............................................................... 7 6.2 Electrostatic Discharge Caution ................................ 7 6.3 Glossary .................................................................... 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 7.2 7.3 7.4 Q3 Package Dimensions .......................................... 8 Recommended PCB Pattern..................................... 9 Recommended Stencil Opening ............................... 9 Q3 Tape and Reel Information................................ 10 4 Revision History Changes from Original (June 2014) to Revision A • 2 Page Added b1, d, d1, and K dimensions to the mechanical information table .............................................................................. 8 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 CSD17575Q3 www.ti.com SLPS489A – JUNE 2014 – REVISED AUGUST 2014 5 Specifications 5.1 Electrical Characteristics (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 24 V IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = ±20 V VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA RDS(on) Drain-to-Source On-Resistance gƒs Transconductance 30 1.1 V 1 μA 100 nA 1.4 1.8 V VGS = 4.5 V, ID = 25 A 2.6 3.2 mΩ VGS = 10 V, ID = 25 A 1.9 2.3 VDS = 3 V, ID = 25 A 118 S DYNAMIC CHARACTERISTICS CISS Input Capacitance COSS Output Capacitance 3400 4420 pF 393 511 pF CRSS Rg Reverse Transfer Capacitance 157 204 pF Series Gate Resistance 0.9 1.8 Ω Qg Gate Charge Total (4.5 V) 23 30 nC Qgd Gate Charge Gate-to-Drain Qgs Gate Charge Gate-to-Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tƒ Fall Time VGS = 0 V, VDS = 15 V, ƒ = 1 MHz VDS = 15 V, ID = 25 A VDS = 15 V, VGS = 0 V VDS = 15 V, VGS = 4.5 V ID = 25 A RG = 2 Ω 5.4 nC 8.5 nC 4.6 nC 11.6 nC 4 ns 10 ns 20 ns 3 ns DIODE CHARACTERISTICS VSD Diode Forward Voltage IS = 25 A, VGS = 0 V Qrr Reverse Recovery Charge trr Reverse Recovery Time 0.8 VDD = 15 V, IF = 25 A, di/dt = 300 A/μs 1 V 15 nC 13 ns 5.2 Thermal Information (TA = 25°C unless otherwise stated) THERMAL METRIC MIN TYP MAX RθJC Junction-to-Case Thermal Resistance (1) 1.5 RθJA Junction-to-Ambient Thermal Resistance (1) (2) 55 (1) (2) UNIT °C/W RθJC is determined with the device mounted on a 1-inch2 (6.45-cm2), Cu pad on a 1.5-inches × 1.5-inches thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1-inch2 2-oz.Cu. Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 3 CSD17575Q3 SLPS489A – JUNE 2014 – REVISED AUGUST 2014 GATE www.ti.com GATE Source Source Max RθJA = 160°C/W when mounted on minimum pad area of 2 oz. Cu. Max RθJA = 55°C/W when mounted on 1 inch2 of 2 oz. Cu. DRAIN DRAIN M0161-02 M0161-01 5.3 Typical MOSFET Characteristics (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 CSD17575Q3 www.ti.com SLPS489A – JUNE 2014 – REVISED AUGUST 2014 Typical MOSFET Characteristics (continued) 200 200 180 180 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) (TA = 25°C unless otherwise stated) 160 140 120 100 80 60 VGS =10V VGS =6V VGS =4.5V 40 20 0 0 0.1 0.2 0.3 0.4 0.5 0.6 VDS - Drain-to-Source Voltage (V) 0.7 160 140 120 100 80 60 20 0 0.8 TC = 125°C TC = 25°C TC = −55°C 40 0 0.5 1 1.5 2 2.5 3 VGS - Gate-to-Source Voltage (V) G001 3.5 4 G001 VDS = 5 V Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics 10000 9 8 C − Capacitance (pF) VGS - Gate-to-Source Voltage (V) 10 7 6 5 4 3 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 1000 2 1 0 0 5 10 ID = 25 A 15 20 25 30 35 40 Qg - Gate Charge (nC) 45 50 100 55 0 3 6 G001 27 30 G001 VDS = 15 V Figure 4. Gate Charge Figure 5. Capacitance 8 RDS(on) - On-State Resistance (mΩ) 2 VGS(th) - Threshold Voltage (V) 9 12 15 18 21 24 VDS - Drain-to-Source Voltage (V) 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 −75 −50 −25 0 25 50 75 100 125 150 175 TC - Case Temperature (ºC) G001 TC = 25°C, I D = 25A TC = 125°C, I D = 25A 7 6 5 4 3 2 1 0 0 2 4 6 8 10 12 14 16 VGS - Gate-to- Source Voltage (V) 18 20 G001 ID = 250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 5 CSD17575Q3 SLPS489A – JUNE 2014 – REVISED AUGUST 2014 www.ti.com Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 1.8 100 VGS = 4.5V VGS = 10V ISD − Source-to-Drain Current (A) Normalized On-State Resistance 2 1.6 1.4 1.2 1 0.8 0.6 0.4 −75 −50 −25 0 25 50 75 100 125 150 175 TC - Case Temperature (ºC) G001 TC = 25°C TC = 125°C 10 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 VSD − Source-to-Drain Voltage (V) 1 G001 ID = 25 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage 100 100 10 1 10us 100us 0.1 0.1 1ms 10ms DC 1 10 VDS - Drain-to-Source Voltage (V) Single Pulse TC = 25ºC TC = 125ºC IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 1000 100 10 0.01 G001 0.1 TAV - Time in Avalanche (mS) 1 G001 Max RθJC = 1.5°C/W Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching IDS - Drain- to- Source Current (A) 80 70 60 50 40 30 20 10 0 −50 −25 0 25 50 75 100 125 150 175 200 TC - Case Temperature (ºC) G001 Figure 12. Maximum Drain Current vs Temperature 6 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 CSD17575Q3 www.ti.com SLPS489A – JUNE 2014 – REVISED AUGUST 2014 6 Device and Documentation Support 6.1 Trademarks NexFET is a trademark of Texas Instruments. 6.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 7 CSD17575Q3 SLPS489A – JUNE 2014 – REVISED AUGUST 2014 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Q3 Package Dimensions DIM MILLIMETERS NOM MAX MIN NOM MAX A 0.950 1.000 1.100 0.037 0.039 0.043 A1 0.000 0.000 0.050 0.000 0.000 0.002 b 0.280 0.340 0.400 0.011 0.013 0.016 b1 0.310 NOM 0.012 NOM c 0.150 0.200 0.250 0.006 0.008 0.010 D 3.200 3.300 3.400 0.126 0.130 0.134 D2 1.650 1.750 1.800 0.065 0.069 0.071 d 0.150 0.200 0.250 0.006 0.008 0.010 d1 0.300 0.350 0.400 0.012 0.014 0.016 E 3.200 3.300 3.400 0.126 0.130 0.134 E2 2.350 2.450 2.550 0.093 0.096 0.100 0.550 0.014 e H 0.650 TYP 0.35 K 8 INCHES MIN 0.450 0.026 0.650 TYP 0.018 0.022 0.026 TYP L 0.35 0.450 0.550 0.014 0.018 0.022 L1 0 — 0 0 — 0 θ 0 — 0 0 — 0 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 CSD17575Q3 www.ti.com SLPS489A – JUNE 2014 – REVISED AUGUST 2014 7.2 Recommended PCB Pattern For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. 7.3 Recommended Stencil Opening All dimensions are in mm, unless otherwise specified. Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 9 CSD17575Q3 SLPS489A – JUNE 2014 – REVISED AUGUST 2014 www.ti.com 1.75 ±0.10 7.4 Q3 Tape and Reel Information 4.00 ±0.10 (See Note 1) Ø 1.50 +0.10 –0.00 3.60 1.30 3.60 5.50 ±0.05 12.00 +0.30 –0.10 8.00 ±0.10 2.00 ±0.05 M0144-01 Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2 2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm 3. Material: black static dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified). 5. Thickness: 0.30 ±0.05 mm 6. MSL1 260°C (IR and Convection) PbF Reflow Compatible 10 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD17575Q3 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD17575Q3 ACTIVE VSON-CLIP DQG 8 2500 RoHS-Exempt & Green SN Level-1-260C-UNLIM CSD17575Q3T ACTIVE VSON-CLIP DQG 8 250 RoHS-Exempt & Green SN Level-1-260C-UNLIM CSD17575 -55 to 150 CSD17575 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of