LF444CMX

LF444 www.ti.com SNOSC04D – MAY 1998 – REVISED MARCH 2013 LF444 Quad Low Power JFET Input Operational Amplifier Check for Samples: LF444 FEATURES DESCRIPTION 1 • 23 • • • • • • • ¼ Supply Current of a LM148: 200 μA/Amplifier (max) Low Input Bias Current: 50 pA (max) High Gain Bandwidth: 1 MHz High Slew Rate: 1 V/μs Low Noise Voltage for Low Power 35 nV/√Hz Low Input Noise Current 0.01 pA/√Hz High Input Impedance: 1012Ω High Gain: 50k (min) The LF444 quad low power operational amplifier provides many of the same AC characteristics as the industry standard LM148 while greatly improving the DC characteristics of the LM148. The amplifier has the same bandwidth, slew rate, and gain (10 kΩ load) as the LM148 and only draws one fourth the supply current of the LM148. In addition the well matched high voltage JFET input devices of the LF444 reduce the input bias and offset currents by a factor of 10,000 over the LM148. The LF444 also has a very low equivalent input noise voltage for a low power amplifier. The LF444 is pin compatible with the LM148 allowing an immediate 4 times reduction in power drain in many applications. The LF444 should be used wherever low power dissipation and good electrical characteristics are the major considerations. Simplified Schematic Figure 1. 1/4 Quad Connection Diagram Figure 2. PDIP/SOIC Package Top View See Package Number NAK0014D, D0014A or NFF0014A These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. BI-FET is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1998–2013, Texas Instruments Incorporated LF444 SNOSC04D – MAY 1998 – REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) (2) (3) LF444A LF444 Supply Voltage ±22V ±18V Differential Input Voltage ±38V ±30V Input Voltage Range (4) ±19V ±15V Output Short CircuitDuration (5) Power Dissipation (6) (7) Tj max θjA (Typical) Continuous Continuous NAK Package D, NFF Packages 900 mW 670 mW 150°C 115°C 100°C/W 85°C/W LF444A/LF444 See (8) Operating Temperature Range ESD Tolerance (9) Rating to be determined −65°C ≤ TA ≤ 150°C Storage Temperature Range Soldering Information (1) (2) (3) (4) (5) (6) (7) (8) (9) Dual-In-Line Packages (Soldering, 10 sec.) 260°C Small Outline Package Vapor Phase (60 sec.) 215°C Infrared (15 sec.) 220°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. Refer to RETS444X for LF444MD military specifications. Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction temperature will be exceeded. For operating at elevated temperature, these devices must be derated based on a thermal resistance of θjA. Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside ensured limits. The LF444A is available in both the commercial temperature range 0°C ≤ TA ≤ 70°C and the military temperature range −55°C ≤ TA ≤ 125°C. The LF444 is available in the commercial temperature range only. The temperature range is designated by the position just before the package type in the device number. A “C” indicates the commercial temperature range and an “M” indicates the military temperature range. The military temperature range is available in “NAK” package only. Human body model, 1.5 kΩ in series with 100 pF. DC Electrical Characteristics Symbol (1) Parameter Conditions LF444A Min VOS Input Offset Voltage RS = 10k, TA = 25°C Max 2 5 0°C ≤ TA ≤ +70°C Average TC of Input Offset Voltage RS = 10 kΩ IOS Input Offset Current VS = ±15V (1) IB (1) (2) 2 Input Bias Current VS = ±15V (1) (2) Tj = 25°C Max 3 10 mV 12 mV 5 25 1.5 Tj = 125°C 10 10 mV μV/°C 10 Tj = 70°C Tj = 25°C Units Typ 8 10 (2) Min 6.5 −55°C ≤ TA ≤ +125°C ΔVOS/ΔT LF444 Typ 50 Tj = 70°C 3 Tj = 125°C 20 5 50 pA 1.5 nA nA 10 100 pA 3 nA nA Unless otherwise specified the specifications apply over the full temperature range and for VS = ±20V for the LF444A and for VS = ±15V for the LF444. VOS, IB, and IOS are measured at VCM = 0. The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature, Tj. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj = TA + θjAPD where θjA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 LF444 www.ti.com SNOSC04D – MAY 1998 – REVISED MARCH 2013 DC Electrical Characteristics (1) (continued) Symbol Parameter Conditions LF444A Min Typ LF444 Max Min Typ 1012 RIN Input Resistance Tj = 25°C AVOL Large Signal Voltage Gain VS = ±15V, VO = ±10V 50 100 25 Units Max 1012 Ω 100 V/mV RL = 10 kΩ, TA = 25°C VO Output Voltage Swing VCM Input Common-Mode Over Temperature 25 VS = ±15V, RL = 10 kΩ ±12 ±13 ±12 ±13 V ±16 +18 Common-Mode V/mV ±11 +14 V −17 Voltage Range CMRR 15 −12 V RS ≤ 10 kΩ 80 100 70 95 dB See (3) 80 100 70 90 dB Rejection Ratio PSRR Supply Voltage Rejection Ratio IS (3) Supply Current 0.6 0.8 0.6 1.0 mA Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from ±15V to ±5V for the LF444 and from ±20V to ±5V for the LF444A. AC Electrical Characteristics Symbol (1) Parameter Conditions LF444A Min Amplifier-to-Amplifier Typ LF444 Max Min Typ −120 −120 Units Max dB Coupling SR Slew Rate VS = ±15V, TA = 25°C 1 1 V/μs GBW Gain-Bandwidth Product VS = ±15V, TA = 25°C 1 1 MHz en Equivalent Input Noise Voltage TA = 25°C, RS = 100Ω, 35 35 nV/√Hz 0.01 0.01 pA/√Hz f = 1 kHz in (1) Equivalent Input Noise Current TA = 25°C, f = 1 kHz Unless otherwise specified the specifications apply over the full temperature range and for VS = ±20V for the LF444A and for VS = ±15V for the LF444. VOS, IB, and IOS are measured at VCM = 0. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 3 LF444 SNOSC04D – MAY 1998 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics 4 Input Bias Current Input Bias Current Figure 3. Figure 4. Supply Current Positive Common-Mode Input Voltage Limit Figure 5. Figure 6. Negative Common-Mode Input Voltage Limit Positive Current Limit Figure 7. Figure 8. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 LF444 www.ti.com SNOSC04D – MAY 1998 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Negative Current Limit Output Voltage Swing Figure 9. Figure 10. Output Voltage Swing Gain Bandwidth Figure 11. Figure 12. Bode Plot Slew Rate Figure 13. Figure 14. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 5 LF444 SNOSC04D – MAY 1998 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) 6 Distortion vs Frequency Undistorted Output Voltage Swing Figure 15. Figure 16. Open Loop Frequency Response Common-Mode Rejection Ratio Figure 17. Figure 18. Power Supply Rejection Ratio Equivalent Input Noise Voltage Figure 19. Figure 20. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 LF444 www.ti.com SNOSC04D – MAY 1998 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Open Loop Voltage Gain Output Impedance Figure 21. Figure 22. Inverter Settling Time Figure 23. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 7 LF444 SNOSC04D – MAY 1998 – REVISED MARCH 2013 www.ti.com Pulse Response RL = 10 kΩ, CL = 10 pF 8 Small Signal Inverting Large Signal Inverting Figure 24. Figure 25. Small Signal Non-Inverting Large Signal Non-Inverting Figure 26. Figure 27. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 LF444 www.ti.com SNOSC04D – MAY 1998 – REVISED MARCH 2013 APPLICATION HINTS This device is a quad low power op amp with JFET input devices ( BI-FET™). These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a reversal of phase to the output. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode. Exceeding the positive common-mode limit on a single input will not change the phase of the output; however, if both inputs exceed the limit, the output of the amplifier will be forced to a high state. The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition. When the negative common-mode voltage swings to within 3V of the negative supply, an increase in input offset voltage may occur. Each amplifier is individually biased to allow normal circuit operation with power supplies of ±3.0V. Supply voltages less than these may degrade the common-mode rejection and restrict the output voltage swing. The amplifiers will drive a 10 kΩ load resistance to ±10V over the full temperature range. If the amplifier is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings. Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize “pick-up” and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant. Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 9 LF444 SNOSC04D – MAY 1998 – REVISED MARCH 2013 www.ti.com Typical Application Figure 28. pH Probe Amplifier/Temperature Compensator ***For R2 = 50k, R4 = 330k ±1% For R2 = 100k, R4 = 75k ±1% For R2 = 200k, R4 = 56k ±1% **Polystyrene *Film resistor type RN60C To calibrate, insert probe in pH =7 solution. Set the “TEMPERATURE ADJUST” pot, R2, to correspond to the solution temperature: full clockwise for 0°C, and proportionately for intermediate temperatures, using a turns-counting dial. Then set “CALIBRATE” pot so output reads 7V. Typical probe = Ingold Electrodes #465-35 Detailed Schematic Figure 29. 1/4 Quad 10 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 LF444 www.ti.com SNOSC04D – MAY 1998 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 10 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LF444 11 PACKAGE OPTION ADDENDUM www.ti.com 14-May-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) LF444ACN/NOPB ACTIVE PDIP N 14 25 RoHS & Green NIPDAU Level-1-NA-UNLIM 0 to 70 LF444ACN LF444CM NRND SOIC D 14 55 Non-RoHS & Green Call TI Level-1-235C-UNLIM 0 to 70 LF444CM LF444CM/NOPB ACTIVE SOIC D 14 55 RoHS & Green SN Level-1-260C-UNLIM 0 to 70 LF444CM Samples LF444CMX/NOPB ACTIVE SOIC D 14 2500 RoHS & Green SN Level-1-260C-UNLIM 0 to 70 LF444CM Samples LF444CN/NOPB ACTIVE PDIP N 14 25 RoHS & Green NIPDAU Level-1-NA-UNLIM 0 to 70 LF444CN Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of