LMH6522
www.ti.com
SNOSB53D – JULY 2011 – REVISED MARCH 2013
LMH6522 High Performance Quad DVGA
Check for Samples: LMH6522
•
OIP3: 49dBm @ 200MHz
Noise Figure: 8.5dB
Voltage Gain: 26dB
1dB Gain Steps
−3dB Bandwidth of 1400 MHz
Gain Step Accuracy: 0.2 dB
Disable Function for Each Channel
Parallel and Serial Gain Control
Low Power Mode for Power Management
Flexibility
Small Footprint WQFN Package
APPLICATIONS
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Cellular Base Stations
Wideband and Narrowband IF Sampling
Receivers
Wideband Direct Conversion
ADC Driver
DESCRIPTION
The LMH6522 contains four, high performance,
digitally controlled variable gain amplifiers (DVGA). It
has been designed for use in narrowband and
broadband IF sampling applications. Typically, the
LMH6522 drives a high performance ADC in a broad
range of mixed signal and digital communication
applications such as mobile radio and cellular base
stations where automatic gain control (AGC) is
required to increase system dynamic range.
The LMH6522 digitally controlled attenuator provides
precise 1dB gain steps over a 31dB range. The digital
attenuator can be controlled by either a SPI™ Serial
bus or a high speed parallel bus.
The output amplifier has a differential output, allowing
large signal swings on a single 5V supply. The low
impedance output provides maximum flexibility when
driving a wide range filter designs or analog to digital
converters. For applications which have very large
changes in signal level LMH6522 can support up to
62dB of gain range by cascading channels.
The LMH6522 operates over the industrial
temperature range of −40°C to +85°C. The LMH6522
is available in a 54-Pin, thermally enhanced, WQFN
package.
Performance Curve
60
35
50
30
40
25
30
20
20
f = 200 MHz
15
10
VOUT= 2VPPD
@ filter input
10
0
POWER GAIN (dB)
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23
Each channel of LMH6522 has an independent,
digitally controlled attenuator and a high linearity,
differential output, amplifier. All circuitry has been
optimized for low distortion and maximum system
design flexibility. Power consumption is managed by
a three-state enable pin. Individual channels can be
disabled or placed into a Low Power Mode or a
higher performance, High Power Mode.
OIP3 (dBm)
FEATURES
1
5
50
100
150
200
250
300
FILTER INPUT RESISTANCE ( )
Figure 1. OIP3 vs Filter Input Resistance
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI is a trademark of Motorola, Inc..
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2013, Texas Instruments Incorporated
LMH6522
SNOSB53D – JULY 2011 – REVISED MARCH 2013
www.ti.com
Block Diagram
+5V
Attenuator
INA+
OUTA+
26 dB
INA-
OUTA-
0 dB to 31 dB
Attenuator
INB+
OUTB+
26 dB
INB-
ATTEN_A
5
5
EN_A
4
SPI
ATTEN_D
OUTB-
0 dB to 31 dB
5
Digital
Control,
(Serial
or
Parallel)
EN_B
MODE
5
EN_D
INC+
ATTEN_B
ATTEN_C
EN_C
Attenuator
OUTC+
26 dB
INC-
IND+
OUTC-
0 dB to 31 dB
Attenuator
OUTD+
26 dB
IND-
0 dB to 31 dB
OUTD-
GND
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: LMH6522
LMH6522
www.ti.com
SNOSB53D – JULY 2011 – REVISED MARCH 2013
Absolute Maximum Ratings (1) (2)
ESD Tolerance
(3)
Human Body Model
2 kV
Machine Model
200V
Charged Device Model
750V
−0.6V to 5.5V
Positive Supply Voltage (Pin 3)
Differential Voltage between Any Two Grounds
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