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PCM2903C
SBFS038A – JUNE 2012 – REVISED SEPTEMBER 2015
PCM2903C Stereo Audio Codec With USB Interface,
Single-Ended Analog Input/Output, and S/PDIF
1 Features
•
1
•
•
•
•
•
•
•
On-Chip USB Interface:
– With Full-Speed Transceivers
– Fully Compliant With USB 2.0 Specification
– Certified by USB-IF
– USB Adaptive Mode for Playback
– USB Asynchronous Mode for Record
– Self-Powered
16-Bit Delta-Sigma ADC and DAC
Sampling Rates:
– DAC: 32, 44.1, 48 kHz
– ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz
On-Chip Clock Generator With Single 12-MHz
Clock Source
S/PDIF Input/Output
Single Power Supply:
– 3.3 V Typical
Stereo ADC:
– Analog Performance at VCCC = VCCP1 = VCCP2
= VCCX = VDD = 3.3 V:
– THD+N = 0.01%
– SNR = 89 dB
– Dynamic Range = 89 dB
– Decimation Digital Filter:
– Passband Ripple = ±0.05 dB
– Stop-Band Attenuation = –65 dB
– Single-Ended Voltage Input
– Antialiasing Filter Included
– Digital HPF Included
Stereo DAC:
– Analog Performance at VCCC = VCCP1 = VCCP2
= VCCX = VDD = 3.3 V:
– THD+N = 0.005%
– SNR = 96 dB
– Dynamic Range = 93 dB
– Oversampling Digital Filter:
– Passband Ripple = ±0.1 dB
– Stop-Band Attenuation = –43 dB
– Single-Ended Voltage Output
– Analog LPF Included
Multifunctions:
– Human Interface Device (HID) Function:
– Volume and Mute Controls
– Suspend Flag Function
28-Pin SSOP Package
•
•
2 Applications
•
•
•
•
USB Audio Speaker
USB Headset
USB Monitor
USB Audio Interface Box
3 Description
The PCM2903C is TI's single-chip, USB, stereo audio
codec with a USB-compliant full-speed protocol
controller and S/PDIF. The USB protocol controller
requires no software code. The PCM2903C employs
SpAct™ architecture, TI's unique system that
recovers the audio clock from USB packet data. Onchip analog PLLs with SpAct enable playback and
record with low clock jitter, as well as independent
playback and record sampling rates.
Device Information(1)
PART NUMBER
PCM2903C
PACKAGE
SSOP (28)
BODY SIZE (NOM)
10.20 mm × 5.30 mm
(1) For all available packages, see the orderable addendum at
the end of the datas heet.
Simplified Diagram
USB
Line Out
S/PDIF I/O
Line In
PCM2903C
HID Controls
VDD
VCCC
VCCX
VCCP1
VCCP2
AGNDC
AGNDP
AGNDX
DGND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
PCM2903C
SBFS038A – JUNE 2012 – REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
5
7.1
7.2
7.3
7.4
7.5
7.6
5
5
5
5
6
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 15
Detailed Description ............................................ 16
9.1 Overview ................................................................. 16
9.2 Functional Block Diagram ....................................... 16
9.3 Feature Description................................................. 17
9.4 Device Functional Modes........................................ 18
9.5 Programming........................................................... 18
10 Application and Implementation........................ 24
10.1 Application Information.......................................... 24
10.2 Typical Application ............................................... 24
11 Power Supply Recommendations ..................... 26
12 Layout................................................................... 26
12.1 Layout Guidelines ................................................. 26
12.2 Layout Example .................................................... 26
13 Device and Documentation Support ................. 27
13.1
13.2
13.3
13.4
13.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
27
27
27
27
27
14 Mechanical, Packaging, and Orderable
Information ........................................................... 27
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (June 2011) to Revision A
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
•
Removed Package/Ordering Information table ..................................................................................................................... 5
2
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SBFS038A – JUNE 2012 – REVISED SEPTEMBER 2015
5 Device Comparison Table
PCM2900C
PCM2902C
PCM2903C
PCM2906C
Supply Voltage
5 V (Bus-Powered)
5 V (Bus-Powered)
3.3 V (Self-Powered)
5 V (Bus-Powered)
Additional Features
—
S/PDIF I/O
S/PDIF I/O
S/PDIF I/O
500 mA Max Power
Configuration
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SBFS038A – JUNE 2012 – REVISED SEPTEMBER 2015
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6 Pin Configuration and Functions
DB Package
28-Pin SSOP
Top View
D+
1
28
D-
2
27
SSPND
VDD
VBUS
3
26
DGND
DGNDU
4
25
DOUT
HID0
5
24
HID1
6
23
DIN
VCCX
HID2
7
22
AGNDX
SEL0
8
21
XTI
SEL1
9
20
XTO
VCCC
10
19
VCCP2
AGNDC
11
18
VINL
12
17
AGNDP
VCCP1
VINR
13
16
VOUTL
VCOM
14
15
VOUTR
Pin Functions
PIN
NAME
DESCRIPTION
NO.
I/O
AGNDC
11
–
Analog ground for codec
AGNDP
18
–
Analog ground for PLL
AGNDX
22
–
Analog ground for oscillator
D–
2
I/O
USB differential input/output minus (1)
D+
1
I/O
USB differential input/output plus (1)
DGND
26
–
Digital ground
DGNDU
4
–
Digital ground for USB transceiver
DIN
24
I
S/PDIF input
DOUT
25
O
S/PDIF output
HID0
5
I
HID key state input (mute), active-high (3)
HID1
6
I
HID key state input (volume up), active-high (3)
HID2
7
I
HID key state input (volume down), active-high (3)
SEL0
8
I
Must be set to high (4)
SEL1
9
I
Connected to the USB port of VBUS (4)
SSPND
28
O
Suspend flag, active-low (Low: suspend, High: operational)
VBUS
3
–
Must be connected to VDD
VCCC
10
–
Analog power supply for codec (5)
VCCP1
17
–
Analog power supply for PLL (5)
VCCP2
19
–
Analog power supply for PLL (5)
VCCX
23
–
Analog power supply for oscillator (5)
VCOM
14
–
Common for ADC/DAC (VCCC/2)
(2)
(5)
(5)
VDD
27
–
Digital power supply
VINL
12
I
ADC analog input for L-channel
VINR
13
I
ADC analog input for R-channel
VOUTL
16
O
DAC analog output for L-channel
VOUTR
15
O
DAC analog output for R-channel
XTI
21
I
Crystal oscillator input (6)
XTO
20
O
Crystal oscillator output
(1)
(2)
(3)
(4)
(5)
(6)
4
LV-TTL level.
3.3-V CMOS-level input with internal pulldown, 5-V tolerant.
3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no direct connection with the internal DAC or ADC. See the Interface Number 3 and End-Points sections.
TTL Schmitt trigger, 5-V tolerant.
Connect a decoupling capacitor to GND.
3.3-V CMOS-level input.
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7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted). (1)
MIN
MAX
UNIT
–0.3
4
V
Supply voltage differences, VCCC, VCCP1, VCCP2, VCCX, VDD
±0.1
V
Ground voltage differences, AGNDC, AGNDP, AGNDX, DGND, DGNDU
±0.1
V
6.5
V
V
Supply voltage, VCCC, VCCP1, VCCP2, VCCX, VDD
Digital input
voltage
SEL0, SEL1, DIN
–0.3
D+, D–, HID0, HID1, HID2, XTI, XTO, DOUT, SSPND
–0.3
(VDD + 0.3) < 4
–0.3
(VCCC + 0.3) < 4
V
±10
mA
Analog input voltage VINL, VINR, VCOM, VOUTR, VOUTL
Input current (any pins except supplies)
Ambient temperature under bias
125
°C
Junction temperature TJ
–40
150
°C
Lead temperature (soldering, 5 s)
260
°C
Package temperature (IR reflow, peak)
250
°C
150
°C
Storage temperature, Tstg
(1)
–55
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±2500
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Supply voltage
Supply current
MIN
NOM
MAX
3
3.3
3.6
V
54
70
mA
ADC, DAC operation
USB suspend state
Ambient temperature
250
0
UNIT
µA
25
85
°C
7.4 Thermal Information
PCM2903C
THERMAL METRIC (1)
DB (SSOP)
UNIT
28 PINS
RθJA
Junction-to-ambient thermal resistance
64.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
24.5
°C/W
RθJB
Junction-to-board thermal resistance
25.4
°C/W
ψJT
Junction-to-top characterization parameter
2.0
°C/W
ψJB
Junction-to-board characterization parameter
25
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Electrical Characteristics
All specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT/OUTPUT
Host interface
Apply USB Revision 2.0, full speed
Audio data format
USB isochronous data format
INPUT LOGIC
D+, D–
High-level input
voltage
VIH
XTI, HID0, HID1, and
HID2
SEL0, SEL1
DIN
2
VDD
0.7 VDD
VDD
2
5.25
0.7 VDD
5.25
D+, D–
Low-level input
voltage
VIL
0.8
XTI, HID0, HID1, and
HID2
0.3 VDD
SEL0, SEL1
High-level input
current
IIH
Low-level input
current
IIL
VDC
0.8
DIN
D+, D–, XTI, SEL0,
SEL1
VDC
0.3 VDD
VIN = 3.3 V
±10
HID0, HID1, and HID2 VIN = 3.3 V
50
80
DIN
VIN = 3.3 V
65
100
D+, D–, XTI, SEL0,
SEL1
VIN = 0 V
±10
HID0, HID1, and HID2 VIN = 0 V
±10
DIN
±10
VIN = 0 V
μA
μA
OUTPUT LOGIC
D+, D–
High-level output
DOUT
voltage
SSPND
VOH
2.8
IOH = –4 mA
2.8
IOH = –2 mA
2.8
VDC
D+, D–
Low-level output
voltage
VOL
0.3
DOUT
IOL = 4 mA
0.5
SSPND
IOL = 2 mA
0.5
VDC
CLOCK FREQUENCY
Input clock frequency, XTI
11.994
12
12.006
MHz
ADC CHARACTERISTICS
Resolution
Audio data channel
8, 16
Bits
1, 2
Channel
ADC CLOCK FREQUENCY
fS
Sampling frequencies
8, 11.025, 16, 22.05, 32, 44.1, 48
kHz
ADC DC ACCURACY
Gain mismatch, channel-to-channel
±1
±5
% of
FSR
Gain error
±2
±10
% of
FSR
Bipolar zero error
±0
% of
FSR
ADC DYNAMIC PERFORMANCE (1)
THD+N
(1)
6
Total harmonic distortion plus noise
VIN = –1 dB
VIN = –60 dB
0.01%
0.02%
5%
fIN = 1 kHz, using a System Two™ audio measurement system by Audio Precision™ in RMS mode with a 20-kHz LPF and 400-Hz HPF
in the calculation.
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Electrical Characteristics (continued)
All specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
PARAMETER
SNR
MIN
TYP
Dynamic range
A-weighted
TEST CONDITIONS
81
89
dB
Signal-to-noise ratio
A-weighted
81
89
dB
80
85
dB
Input voltage
0.6 VCCC
VPP
Center voltage
0.5 VCCC
Channel separation
MAX
UNIT
ANALOG INPUT
Input impedance
Antialising filter frequency response
–3 dB
fIN = 20 kHz
V
30
kΩ
150
kHz
–0.08
dB
ADC DIGITAL FILTER PERFORMANCE
Passband
0.454 fS
Stop band
0.583 fS
Hz
Passband ripple
±0.05
Stop-band attenuation
td
dB
–65
Delay time
HPF frequency response
Hz
dB
17.4/fS
–3 dB
s
0.078 fS/1000
Hz
8, 16
Bits
1, 2
Channel
DAC CHARACTERISTICS
Resolution
Audio data channel
DAC CLOCK FREQUENCY
fS
Sampling frequencies
32, 44.1, 48
kHz
DAC DC ACCURACY
Gain mismatch channel-to-channel
±1
±5
% of
FSR
Gain error
±2
±10
% of
FSR
Bipolar zero error
±2
% of
FSR
DAC DYNAMIC PERFORMANCE (2)
THD+N
SNR
Total harmonic distortion plus noise
VOUT = 0 dB
0.005%
VOUT = –60 dB
0.016%
3%
Dynamic range
EIAJ, A-weighted
87
93
dB
Signal-to-noise ratio
EIAJ, A-weighted
90
96
dB
86
92
dB
Output voltage
0.6 VCCC
VPP
Center voltage
0.5 VCCC
Channel separation
ANALOG OUTPUT
VO
Load impedance
LPF frequency response
AC coupling
V
10
–3 dB
f = 20 kHz
kΩ
250
kHz
–0.03
dB
DAC DIGITAL FILTER PERFORMANCE
Passband
0.445 fS
Stop band
0.555 fS
Passband ripple
(2)
Hz
±0.1
Stop-band attenuation
Hz
–43
dB
dB
fOUT = 1 kHz, using a System Two audio measuerment system by Audio Precision in RMS mode with a 20-kHz LPF and 400-Hz HPF.
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Electrical Characteristics (continued)
All specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
PARAMETER
td
TEST CONDITIONS
MIN
Delay time
TYP
MAX
14.3/fS
UNIT
s
POWER-SUPPLY REQUIREMENTS
VDD,
VCCC,
VCCP1,
VCCP2,
VCCX
Voltage range
Supply current
PD
Power dissipation
3
ADC, DAC operation
Suspend mode
(3)
3.3
3.6
VDC
54
70
mA
252
mW
μA
250
ADC, DAC operation
178
Suspend mode (3)
0.83
mW
TEMPERATURE RANGE
Operating temperature range
(3)
8
–25
85
°C
Under USB suspend state.
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7.6 Typical Characteristics
7.6.1 Typical Characteristics: ADC
All specifications at TA = +25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
95
Dynamic Range and SNR (dB)
Total Harmonic Distortion + Noise (%)
0.01
0.009
0.008
0.007
0.006
0.005
0.004
93
91
Dynamic Range
89
SNR
87
85
0.003
-50
0
-25
25
50
75
100
Free-Air Temperature (°C)
-50
G001
75
50
100
G002
Figure 2. Dynamic Range and SNR vs Free-Air
Temperature
95
Dynamic Range and SNR (dB)
0.01
0.009
0.008
0.007
0.006
0.005
0.004
93
91
Dynamic Range
89
SNR
87
85
0.003
2.8
3
3.2
3.4
3.6
3.8
Supply Voltage (V)
2.8
3
3.2
3.4
3.6
3.8
Supply Voltage (V)
G003
Figure 3. Total Harmonic Distortion + Noise at –1 dB vs
Supply Voltage
G004
Figure 4. Dynamic Range and SNR vs Supply Voltage
95
Dynamic Range and SNR (dB)
0.01
Total Harmonic Distortion + Noise (%)
25
Free-Air Temperature (°C)
Figure 1. Total Harmonic Distortion + Noise at –1 dB vs
Free-Air Temperature
Total Harmonic Distortion + Noise (%)
0
-25
0.009
0.008
0.007
0.006
0.005
0.004
0.003
93
91
Dynamic Range
89
SNR
87
85
30
35
40
45
Sampling Frequency (kHz)
50
30
Figure 5. Total Harmonic Distortion + Noise at –1 dB vs
Sampling Frequency
35
40
Sampling Frequency (kHz)
G005
45
50
G006
Figure 6. Dynamic Range and SNR vs Sampling Frequency
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7.6.2 Typical Characteristics: DAC
All specifications at TA = +25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
98
Dynamic Range and SNR (dB)
Total Harmonic Distortion + Noise (%)
0.008
0.007
0.006
0.005
0.004
97
SNR
96
95
94
93
Dynamic Range
92
91
90
0.003
-50
0
-25
25
75
50
Free-Air Temperature (°C)
100
-50
G007
100
G008
98
Dynamic Range and SNR (dB)
Total Harmonic Distortion + Noise (%)
75
50
Figure 8. Dynamic Range and SNR vs Free-Air
Temperature
0.008
0.007
0.006
0.005
0.004
97
SNR
96
95
94
93
Dynamic Range
92
91
90
0.003
3
3.1
3.2
3.3
3.4
3.5
Supply Voltage (V)
3.6
3
3.1
3.2
3.3
3.4
3.5
Supply Voltage (V)
G009
Figure 9. Total Harmonic Distortion + Noise at 0 dB vs
Supply Voltage
3.6
G010
Figure 10. Dynamic Range and SNR vs Supply Voltage
98
Dynamic Range and SNR (dB)
0.008
Total Harmonic Distortion + Noise (%)
25
Free-Air Temperature (°C)
Figure 7. Total Harmonic Distortion + Noise at 0 dB vs
Free-Air Temperature
0.007
0.006
0.005
0.004
97
SNR
96
95
94
93
Dynamic Range
92
91
90
0.003
30
35
40
Sampling Frequency (kHz)
45
50
30
35
40
Sampling Frequency (kHz)
G011
Figure 11. Total Harmonic Distortion + Noise at 0 dB vs
Sampling Frequency
10
0
-25
45
50
G012
Figure 12. Dynamic Range and SNR vs Sampling
Frequency
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7.6.3 Typical Characteristics: ADC Output Spectrum
0
0
-20
-20
-40
-40
Amplitude (dB)
Amplitude (dB)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
-60
-80
-60
-80
-100
-100
-120
-120
-140
-140
0
5
10
15
5
0
20
10
15
20
Frequency (kHz)
Frequency (kHz)
G014
G013
Figure 13. Output Spectrum (–1 dB, N = 8192)
Figure 14. Output Spectrum (–60 dB, N = 8192)
7.6.4 Typical Characteristics: DAC Output Spectrum
0
0
-20
-20
-40
-40
Amplitude (dB)
Amplitude (dB)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
-60
-80
-60
-80
-100
-100
-120
-120
-140
-140
0
5
10
15
20
5
0
Frequency (kHz)
10
15
20
Frequency (kHz)
G015
Figure 15. Output Spectrum (0 dB, N = 8192)
G016
Figure 16. Output Spectrum (–60 dB, N = 8192)
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7.6.5 Typical Characteristics: Supply Current
1.6
70
1.4
60
1.2
Operational
50
1
40
0.8
30
0.6
0.4
20
Suspend
0.2
10
80
Operational Supply Current (mA)
80
Suspend Supply Current (mA)
Operational Supply Current (mA)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
0
0
3
3.1
3.2
3.3
3.4
3.5
70
60
50
ADC and DAC
40
30
20
10
0
3.6
30
40
35
Supply Voltage (V)
45
50
Sampling Frequency (kHz)
G017
Figure 17. Operational and Suspend Supply Current vs
Supply Voltage
G018
Figure 18. Operational Supply Current vs Sampling
Frequency
7.6.6 Typical Characteristics: ADC Digital Decimation Filter Frequency Response
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
0
0
-10
-20
-20
Amplitude (dB)
Amplitude (dB)
-40
-60
-80
-100
-120
-30
-40
-50
-60
-70
-80
-140
-90
-160
-100
0
8
16
24
32
Frequency (× fS)
0
G019
Figure 19. Overall Characteristics
12
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0.2
0.4
0.6
0.8
Frequency (× fS)
1
G020
Figure 20. Stop-Band Attenuation
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Typical Characteristics: ADC Digital Decimation Filter Frequency Response (continued)
0.2
0
0
-4
Amplitude (dB)
Amplitude (dB)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
-0.2
-0.4
-0.6
-8
-12
-16
-0.8
0
0.1
0.2
0.3
0.4
Frequency (× fS)
-20
0.46
0.5
0.48
0.5
0.52
0.54
Frequency (× fS)
G021
Figure 21. Passband Ripple
G022
Figure 22. Transition-Band Response
7.6.7 Typical Characteristics: ADC Digital High-Pass Filter Frequency Response
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
0
0
-10
-0.2
-30
Amplitude (dB)
Amplitude (dB)
-20
-40
-50
-60
-70
-80
-0.4
-0.6
-0.8
-90
-100
-1.0
0
0.1
0.2
0.4
0.3
Frequency (× fS/1000)
0
G023
Figure 23. Stop-Band Characteristics
1
2
3
Frequency (× fS/1000)
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G024
Figure 24. Passband Characteristics
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7.6.8 Typical Characteristics: ADC Analog Antialiasing Filter Frequency Response
0
0
-10
-0.2
Amplitude (dB)
Amplitude (dB)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
-20
-30
-40
-0.4
-0.6
-0.8
-50
-1.0
1
10
100
1k
0.01
10k
0.1
1
10
100
Frequency (kHz)
Frequency (kHz)
G026
G025
Figure 25. Stop-Band Characteristics
Figure 26. Passband Characteristics
7.6.9 Typical Characteristics: DAC Digital Interpolation Filter Frequency Response
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
0
0.2
-10
0
-30
Amplitude (dB)
Amplitude (dB)
-20
-40
-50
-60
-70
-80
-0.2
-0.4
-0.6
-90
-100
-0.8
0
1
2
4
3
Frequency (× fS)
0
0.1
0.2
0.3
0.4
Frequency (× fS)
G027
Figure 27. Stop-Band Attenuation
0.5
G028
Figure 28. Passband Ripple
0
-2
Amplitude (dB)
-4
-6
-8
-10
-12
-14
-16
-18
-20
0.46
0.47
0.48
0.49
0.5
0.51
0.52
0.53
Frequency (× fS)
0.54
G029
Figure 29. Transition-Band Response
14
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7.6.10 Typical Characteristics: DAC Analog Fir Filter Frequency Response
0
0.2
-10
0
Amplitude (dB)
Amplitude (dB)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
-20
-30
-0.2
-0.4
-0.6
-40
-0.8
-50
0
8
16
24
0
32
Frequency (× fS)
0.1
0.2
0.3
0.4
0.5
Frequency (× fS)
G030
Figure 30. Stop-Band Characteristics
G031
Figure 31. Passband Characteristics
7.6.11 Typical Characteristics: DAC Analog Low-Pass Filter Frequency Response
0.0
0.0
-10
-0.2
Amplitude (dB)
Amplitude (dB)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
-20
-30
-40
-0.4
-0.6
-0.8
-50
-1.0
1
10
100
1k
10k
0.01
Frequency (kHz)
0.1
1
10
100
Frequency (kHz)
G032
Figure 32. Stop-Band Characteristics
G033
Figure 33. Passband Characteristics
8 Parameter Measurement Information
All parameters are measured according to the conditions described in the Specifications section.
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9 Detailed Description
9.1 Overview
The PCM2903C is an audio codec with USB connection capability and a digital S/PDIF digital interface. The
PCM2903C is a self-powered device; it needs an external 3.3V voltage source. The PCM2903C meet the
requirements of USB1.1 standard connection. This device has analog and digital inputs and outputs; it has a
digital S/PDIF interface for input and output data. The PCM2903C has 3 external interrupts (HID) which control
the Mute, Volume Up and Volume Down, these control inputs are active High. The PCM2903C requires a 12MHz
clock; it can be provided by an external clock or generated by a built-in crystal resonator.
9.2 Functional Block Diagram
VCCC
VCCP1
VCCP2
VCCX
VDD
Lock
DIN
AGNDC
AGNDP
AGNDX
DGND
DGNDU
Power
Manager
SSPND
S/PDIF Decoder
VBUS
VINL
ISO-In
End-Point
USB SIE
Analog
PLL
VCOM
Selector
Analog
PLL
XCVR
FIFO
ADC
VINR
D+
D-
Control
End-Point
SEL0
SEL1
VOUTL
FIFO
DAC
VOUTR
DOUT
ISO-Out
End-Point
HID0
HID1
HID2
HID
End-Point
S/PDIF Encoder
USB
Protocol
Controller
96 MHz
PLL (×8)
XTI
12 MHz
Tracker
(SpAct)
XTO
4.7 mF
+
VINR
30 kW
–
13
–
+
(+)
+
(–)
Delta-Sigma
Modulator
VCOM
14
+
(VCCC/2)
10 mF
Reference
Figure 34. Block Diagram of Analog Front-End (Right Channel)
16
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9.3 Feature Description
9.3.1 End-Points
The PCM2903C has the following four end-points:
• Control end-point (EP number 0)
• Isochronous-out audio data stream end-point (EP number 2)
• Isochronous-in audio data stream end-point (EP number 4)
• HID end-point (EP number 5)
The control end-point is a default end-point. The control end-point is used to control all functions of the
PCM2903C by the standard USB request and an USB audio class specific request from the host. The
isochronous-out audio data stream end-point is an audio sink end-point, which receives the PCM audio data. The
isochronous-out audio data stream end-point accepts the adaptive transfer mode. The isochronous-in audio data
stream end-point is an audio source end-point that transmits the PCM audio data. The isochronous-in audio data
stream end-point uses asynchronous transfer mode. The HID end-point is an interrupt-in end-point. HID endpoint reports HID0, HID1, and HID2 pin status every 32 ms.
The human interface device (HID) pins are defined as consumer control devices. The HID function is designed
as an independent end-point from both isochronous-in and -out end-points. Therefore, the result obtained from
the HID operation depends on the host software. Typically, the HID function is used as the primary audio-out
device.
9.3.2 Clock and Reset
The PCM2903C requires a 12-MHz (±500 ppm) clock for the USB and audio function, which can be generated
by a built-in crystal oscillator with a 12-MHz crystal resonator or supplied by an external clock. The 12-MHz
crystal resonator must be connected to XTI (pin 21) and XTO (pin 20) with one high (1-MΩ) resistor and two
small capacitors, the capacitance of which depends on the load capacitance of the crystal resonator. If the
external clock is used, the clock must be supplied to XTI, and XTO must be open.
The PCM2903C has an internal power-on reset circuit, which triggers automatically when VDD (pin 27) exceeds
2.5 V typical (2.7 V to 2.2 V). Approximately 700 μs is required until internal reset release.
9.3.3 Digital Audio Interface
The PCM2903C employs both S/PDIF input and output. Isochronous-out data from the host are encoded to the
S/PDIF output and the DAC analog output. Input data are selected as either S/PDIF or ADC analog input. When
the device detects an S/PDIF input and successfully locks on the received data, the isochronous-in transfer data
source is automatically selected from S/PDIF itself; otherwise, the data source selected is the ADC analog input.
This feature is a customer option. It is the responsibility of the user to implement this feature.
9.3.4 Supported Input/Output Data
The following data formats are accepted by the S/PDIF input and output. All other data formats are unable to use
S/PDIF.
• 48-kHz 16-bit stereo
• 44.1-kHz 16-bit stereo
• 32-kHz 16-bit stereo
Any mismatch of the sampling rate between the input S/PDIF signal and the host command is not acceptable.
Any mismatch of the data format between the input S/PDIF signal and the host command may cause unexpected
results, with the following exceptions:
• Recording in monaural format from stereo data input at the same data rate
• Recording in 8-bit format from 16-bit data input at the same data rate
A combination of these two conditions is not acceptable.
For playback, all possible data-rate sources are converted to 16-bit stereo format at the same source data rate.
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Feature Description (continued)
9.3.5 Channel Status Information
The channel status information is fixed as consumer application, PCM mode, copyright, and digital/digital
converter. All other bits are fixed as 0's except for the sample frequency, which is set automatically according to
the data received through the USB.
9.3.6 Copyright Management
Isochronous-in data are affected by the serial copy management system (SCMS). When the control bit indicates
that the received digital audio data are original, the input digital audio data are transferred to the host. If the data
are indicated as first generation or higher, the transferred data are routed to the analog input.
Digital audio data output is always encoded as original with SCMS control.
9.4 Device Functional Modes
The PCM2903C is a USB controlled device. The PCM2903C is a codec, so it has analog input (that goes to an
A/D converter) and analog output (that comes from a D/A converter), alongside of the digital path that goes to
USB and S/PDIF. A wider explanation of these operational modes is in Programming.
9.5 Programming
9.5.1 USB Interface
Control data and audio data are transferred to the PCM2903C via D+ (pin 1) and D– (pin 2). All data to and from
the PCM2903C are transferred at full speed. The device descriprtor contains the information described in
Table 1.
Table 1. Device Descriptor
USB revision
2.0 compliant
Device class
0x00 (device-defined interface level)
Device subclass
0x00 (not specified)
Device protocol
0x00 (not specified)
Max packet size for end-point 0
8 bytes
Vendor ID
0x08BB
Product ID
0x29C3
Device release number
1.0 (0x0100)
Number of configurations
1
Vendor strings
String number 1 (see Table 3)
Product strings
String number 2 (see Table 3)
Serial number
Not supported
The configuration descriptor contains the information described in Table 2.
Table 2. Configuration Descriptor
18
Interface
Four interfaces
Power attribute
0xC0 (self-powered, no remote wakeup)
Maximum power
0x0A (20 mA)
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The string descriptor contains the information described in Table 3.
Table 3. String Descriptor
Number 0
0x0409
Number 1
BurrBrown from Texas Instruments
Number 2
USB Audio CODEC (1)
(1)
Ensure that there are two blank spaces between "Audio" and "CODEC"; copying and pasting will not
transfer the two blank spaces correctly.
9.5.2 Device Configuration
Figure 35 illustrates the USB audio function topology. The PCM2903C has four interfaces. Each interface
consists of alternative settings.
End-Point #0
Default End-Point
FU
End-Point #2
(IF #1)
Analog Out
IT
TID1
OT
TID2
Audio Streaming Interface
UID3
End-Point #4
(IF #2)
Analog In
IT
TID4
OT
TID5
Audio Streaming Interface
Standard Audio Control Interface (IF #0)
End-Point #5
(IF #3)
HID Interface
Figure 35. USB Audio Function Topology
9.5.2.1 Interface Number 0
Interface number 0 is the control interface. Alternative setting number 0 is the only possible setting for interface
number 0. Alternative setting number 0 describes the standard audio control interface. The audio control
interface consists of a single terminal. The PCM2903C has the following five terminals:
• Input terminal (IT number 1) for isochronous-out stream
• Output terminal (OT number 2) for audio analog output
• Feature unit (FU number 3) for DAC digital attenuator
• Input terminal (IT number 4) for audio analog input
• Output terminal (OT number 5) for isochronous-in stream
Input terminal number 1 is defined as USB stream (terminal type 0x0101). Input terminal number 1 can accept
two-channel audio streams consisting of left and right channels. Output terminal number 2 is defined as a
speaker (terminal type 0x0301). Input terminal number 4 is defined as a line connector (terminal type 0x0603).
Output terminal number 5 is defined as a USB stream (terminal type 0x0101). Output terminal number 5 can
generate two-channel audio streams composed of left and right channel data. Feature unit number 3 supports
the following sound control features:
• Volume control
• Mute control
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The built-in digital volume controller can be manipulated by an audio class specific request from 0 dB to –64 dB
in 1-dB steps. Changes are made by incrementing or decrementing by one step (1 dB) for every 1/fS time interval
until the volume level has reached the requested value. Each channel can be set for different values. The master
volume control is not supported. A request to the master volume is stalled and ignored. The built-in digital mute
controller can be manipulated by audio class-specific request. A master mute control request is acceptable. A
request to an individual channel is stalled and ignored.
9.5.2.2 Interface Number 1
Interface number 1 is the audio streaming data-out interface. Interface number 1 has the five alternative settings
described in Table 4. Alternative setting number 0 is the zero-bandwidth setting.
Table 4. Interface Number 1 Alternative Settings
ALTERNATIVE
SETTING
DATA
FORMAT
00
TRANSFER
MODE
SAMPLING RATE
(kHz)
Zero bandwidth
01
16-bit
Stereo
Twos complement (PCM)
Adaptive
32, 44.1, 48
02
16-bit
Mono
Twos complement (PCM)
Adaptive
32, 44.1, 48
03
8-bit
Stereo
Twos complement (PCM)
Adaptive
32, 44.1, 48
04
8-bit
Mono
Twos complement (PCM)
Adaptive
32, 44.1, 48
9.5.2.3 Interface Number 2
Interface number 2 is the audio streaming data-in interface. Interface number 2 has the 19 alternative settings
described in Table 5. Alternative setting number 0 is the zero-bandwidth setting. All other alternative settings are
operational settings.
Table 5. Interface Number 2 Alternative Settings
ALTERNATIVE
SETTING
DATA
FORMAT
00
20
TRANSFER
MODE
SAMPLING RATE
(kHz)
Zero bandwidth
01
16-bit
Stereo
Twos complement (PCM)
Asynchronous
48
02
16-bit
Mono
Twos complement (PCM)
Asynchronous
48
03
16-bit
Stereo
Twos complement (PCM)
Asynchronous
44.1
04
16-bit
Mono
Twos complement (PCM)
Asynchronous
44.1
05
16-bit
Stereo
Twos complement (PCM)
Asynchronous
32
06
16-bit
Mono
Twos complement (PCM)
Asynchronous
32
07
16-bit
Stereo
Twos complement (PCM)
Asynchronous
22.05
08
16-bit
Mono
Twos complement (PCM)
Asynchronous
22.05
09
16-bit
Stereo
Twos complement (PCM)
Asynchronous
16
0A
16-bit
Mono
Twos complement (PCM)
Asynchronous
16
0B
8-bit
Stereo
Twos complement (PCM)
Asynchronous
16
0C
8-bit
Mono
Twos complement (PCM)
Asynchronous
16
0D
8-bit
Stereo
Twos complement (PCM)
Asynchronous
8
0E
8-bit
Mono
Twos complement (PCM)
Asynchronous
8
0F
16-bit
Stereo
Twos complement (PCM)
Synchronous
11.025
10
16-bit
Mono
Twos complement (PCM)
Synchronous
11.025
11
8-bit
Stereo
Twos complement (PCM)
Synchronous
11.025
12
8-bit
Mono
Twos complement (PCM)
Synchronous
11.025
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9.5.2.4 Interface Number 3
Interface number 3 is the interrupt data-in interface. Alternative setting number 0 is the only possible setting for
interface number 3. Interface number 3 consists of the HID consumer control device and reports the status of
these three key parameters:
• Mute (0xE209)
• Volume up (0xE909)
• Volume down (0xEA09)
9.5.3 Interface Sequence
9.5.3.1 Power On, Attach, and Playback Sequence
The PCM2903C is ready for setup when the reset sequence has finished and the USB bus is attached. In order
to perform certain reset sequences defined in the USB specification, VDD, VCCC, VCCP1, VCCP2, and VCCX must rise
up within 10 ms / 3.3 V. After connection has been established by setup, the PCM2903C is ready to accept USB
audio data. While waiting, the audio data (idle state) and analog output are set to bipolar zero (BPZ).
When receiving the audio data, the PCM2903C stores the first audio packet, which contained 1-ms audio data,
into the internal storage buffer. The PCM2903C starts playing the audio data when detecting the next start of
frame (SOF) packet, as illustrated in Figure 36 and Figure 37.
3.3 V (Typ)
VDD (Pin 27)
2.5 V (Typ)
0V
5 V = VBUS
(Typ)
SEL1 (Pin 9)
Bus Reset
First Audio Data
Set Configuration
Second Audio Data
Bus Idle
D+/D–
SOF
SOF
SOF
SSPND
BPZ
VOUTL
VOUTR
700 ms
Device Setup
1 ms
Internal Reset
Ready for Setup
Ready for Playback
Attach
(Connect to USB Bus)
Figure 36. Attach After Poweron
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3.3 V (Typ)
VDD (Pin 27)
2.5 V (Typ)
0V
5 V = VBUS
(Typ)
SEL1 (Pin 9)
Bus Reset
First Audio Data
Set Configuration
Second Audio Data
Bus Idle
D+/D–
SOF
SOF
SOF
SSPND
BPZ
VOUTL
VOUTR
700 ms
Device Setup
1 ms
Internal Reset
Ready for Setup
Ready for Playback
Figure 37. Poweron Under Attach
9.5.3.2 Play, Stop, and Detach Sequence
When the host finishes or aborts the playback, the PCM2903C stops playing after the last audio data have
played, as shown in Figure 38.
5 V = VBUS
(Typ)
SEL1 (Pin 9)
Audio Data
Audio Data
Last Audio Data
D+/D–
SOF
SOF
SOF
SOF
SOF
VOUTL
VOUTR
Detach
1 ms
Figure 38. Play, Stop, and Detach Sequence
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9.5.3.3 Record Sequence
The PCM2903C starts the audio capture into the internal memory after receiving the SET_INTERFACE
command, as shown in Figure 39.
Audio Data
SET_INTERFACE
IN Token
Audio Data
IN Token
Audio Data
IN Token
D+/D–
SOF
SOF
SOF
SOF
SOF
VINL
VINR
1 ms
Figure 39. Record Sequence
9.5.3.4 Suspend and Resume Sequence
The PCM2903C enters the suspend state after it detects a constant idle state on the USB bus (approximately
5 ms), as shown in Figure 40. While the PCM2903C enters the suspend state, the SSPND flag (pin 28) is
asserted. The PCM2903C wakes up immediately after detecting a non-idle state on the USB bus.
Idle
D+/D–
SSPND
Active
5 ms
Suspend
Active
Figure 40. Suspend and Resume Sequence
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The VBUS allows the device to know when it has been plugged to a USB connection port. The SSPND’ flag will
notify when the USB input is idle for at least 5ms; this flag can be used to control or notify subsequent circuits.
More functional details can be found on Interface Sequence.
10.2 Typical Application
Figure 41 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The entire board design should be considered to meet the USB specification as a USB-compliant product.
VDD (3.3 V)
VCC (3.3 V)
1.5 kW × 3
IC1
1.5 kW
22 W
D+
1
D+
SSPND
28
D–
2
D-
VDD
27
VBUS
3
VBUS
DGND
26
GND
4
DGNDU
DOUT
25
5
HID0
DIN
24
6
HID1
VCCX
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
22 W
9
SEL1
XTO
20
10
VCCC
VCCP2
19
11
AGNDC
AGNDP
18
C3
C4
C5
1 MW
C6
12 MHz
C1
1 MW
C9
C10
C2
12
VINL
VCCP1
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
C7
MUTE/
Power Down
C8
C11
LPF,
Amp
C12
15
LPF,
Amp
NOTE: IC1 must be driven by VDD with a 5-V tolerant input.
C1, C2, C3, C4, C7, C8: 10 μF
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
Figure 41. Self-Powered Configuration
10.2.1 Design Requirements
For this example, Table 6 lists the design parameters.
Table 6. Design Parameters
DESIGN PARAMETER
24
EXAMPLE VALUE
Input voltage range
3 V to 3.6 V
Current
50 mA to 70 mA
Input clock frequency
11.994 MHz to 12.006 MHz
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10.2.2 Detailed Design Procedure
The PCM2903C is a simple design device since it is capable to connect directly to a USB port. Only two external
ICs are needed, a 3.3-V regulator and an AND Gate. The switches connected to the HID ports must be normally
open. Other than this, it only needs decoupling capacitors on the voltage source pins.
10.2.3 Application Curves
95
Dynamic Range and SNR (dB)
Total Harmonic Distortion + Noise (%)
0.01
0.009
0.008
0.007
0.006
0.005
0.004
93
91
Dynamic Range
89
SNR
87
85
0.003
2.8
3
3.2
3.4
3.6
3.8
Supply Voltage (V)
2.8
G003
3.6
3.8
G004
98
Dynamic Range and SNR (dB)
Total Harmonic Distortion + Noise (%)
3.4
Figure 43. ADC Dynamic Range and SNR vs Supply
Voltage
0.008
0.007
0.006
0.005
0.004
97
SNR
96
95
94
93
Dynamic Range
92
91
90
0.003
3
3.1
3.2
3.3
3.4
3.6
3.5
Supply Voltage (V)
3
60
1.2
Operational
50
1
40
0.8
30
0.6
0.4
20
Suspend
0.2
10
3.3
3.4
3.5
3.4
3.5
3.6
G010
80
0
0
3.3
Figure 45. DAC Dynamic Range and SNR vs Supply
Voltage
3.6
Operational Supply Current (mA)
1.4
Suspend Supply Current (mA)
1.6
70
3.2
3.2
G009
80
3.1
3.1
Supply Voltage (V)
Figure 44. DAC Total Harmonic Distortion + Noise at 0 dB
vs Supply Voltage
Operational Supply Current (mA)
3.2
Supply Voltage (V)
Figure 42. ADC Total Harmonic Distortion + Noise at –1 dB
vs Supply Voltage
3
3
70
60
50
ADC and DAC
40
30
20
10
0
30
Supply Voltage (V)
40
45
Sampling Frequency (kHz)
G017
Figure 46. Operational and Suspend Supply Current vs
Supply Voltage
35
50
G018
Figure 47. Operational Supply Current vs Sampling
Frequency
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PCM2903C
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11 Power Supply Recommendations
The voltage source needed to power the PCM2903C must be between 3 V and 3.6 V for a proper operation. It is
recommended to place decoupling capacitor in every voltage source pin. This will help filter lower frequency
power supply noise. Place these decoupling capacitors as close as possible to the PCM2903C.
12 Layout
12.1 Layout Guidelines
The decoupling capacitors must be as close as possible to the PCM2903C pins. It is recommended to place a
lowpass Filter in the analog input and output. At least the analog input and analog output need a series capacitor
to eliminate any possible offset level. The PCM2903C is a low power device so there is no need for a special
heat sink PCB design.
12.2 Layout Example
10pF-33pF
VOUTL VOUTR
12MHz
DOUT DIN
SSPND
10uF
Clock hardware for
built-in resonator
10pF-33pF
1MOhm
10uF
10uF
10uF
AND Gate
PCM2903C
Decoupling capacitors as
close as possible to de IC
1.5kOhm
10uF
22Ohm
D+
22Ohm
DVBUS
10uF
GND
1MOhm
1.5kOhmx3
USB port
VINL VINR
HID controls
Connection to ground plane
Connection to power 3.3V
Top layer traces
Top layer ground plane
Figure 48. Layout Example Recommendation
26
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13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
• Updated Operating Environments for PCM270X, PCM290X Applications, SLAA374
13.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.3 Trademarks
SpAct, E2E are trademarks of Texas Instruments.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
All other trademarks are the property of their respective owners.
13.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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27
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
PCM2903CDB
ACTIVE
SSOP
DB
28
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2903C
PCM2903CDBR
ACTIVE
SSOP
DB
28
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2903C
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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