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TCA9617B
SCPS259B – DECEMBER 2014 – REVISED DECEMBER 2018
TCA9617B Level-Translating FM+ I2C Bus Repeater
1 Features
•
•
1
•
•
•
•
•
•
•
•
•
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•
2 Applications
2
Two-Channel Bidirectional I C Buffer
Support for Standard Mode, Fast Mode (400 kHz),
and Fast Mode+ (1 MHz) I2C Operation
Operating Supply Voltage Range of 0.8 V to 5.5 V
on A-Side
Operating Supply Voltage Range of 2.2 V to 5.5 V
on B-Side
Voltage-Level Translation From 0.8 V to 5.5 V and
2.2 V to 5.5 V
Footprint and Function Replacement for TCA9517
Active-High Repeater-Enable Input
Open-Drain I2C I/O
5.5-V Tolerant I2C and Enable Input Support
Lockup-Free Operation
Powered-Off High-Impedance I2C Bus Pins
Support for Clock Stretching and Multiple Master
Arbitration Across The Device
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 4000-V Human-Body Model (A114-A)
– 1500-V Charged-Device Model (C101)
•
•
•
•
Servers
Routers (Telecom Switching Equipment)
Industrial Equipment
Products With Many I2C Slaves and/or Long PCB
Traces
3 Description
The TCA9617B is a BiCMOS dual bidirectional buffer
intended for I2C bus and SMBus systems. It can
provide bidirectional voltage-level translation (uptranslation and down-translation) between low
voltages (down to 0.8 V) and higher voltages (2.2 V
to 5.5 V) in mixed-mode applications. This device
enables I2C and similar bus systems to be extended,
without degradation of performance even during level
shifting.
The TCA9617B buffers both the serial data (SDA)
and the serial clock (SCL) signals on the I2C bus,
allowing two buses of 550 pF to be connected in an
I2C application. This device can also be used to
isolate two halves of a bus for voltage and
capacitance.
Device Information(1)
PART NUMBER
TCA9617B
PACKAGE
BODY SIZE (NOM)
VSSOP (8)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
VCCA
2
I C or SMBus
Master
(e.g. Processor)
VCCB
SCLA
SDAA
SCLB
SDAB
2
I C slave devices
TCA9617B
EN
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TCA9617B
SCPS259B – DECEMBER 2014 – REVISED DECEMBER 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
6.7
3
4
4
4
5
6
6
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 7
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 10
8.4 Device Functional Modes........................................ 11
9
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application .................................................. 12
10 Power Supply Recommendations ..................... 15
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 16
12 Device and Documentation Support ................. 17
12.1
12.2
12.3
12.4
12.5
Receiving Notification of Documentation Updates
Community Resource............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
17
13 Mechanical, Packaging, and Orderable
Information ........................................................... 17
4 Revision History
Changes from Revision A (December 2014) to Revision B
Page
•
Changed the appearance of the DGK pin out image ............................................................................................................ 3
•
Changed VCCA < VCCB To: VCCA ≤ VCCB in the Design Requirements list ............................................................................. 12
Changes from Original (December 2014) to Revision A
•
2
Page
Initial release of full version. .................................................................................................................................................. 1
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SCPS259B – DECEMBER 2014 – REVISED DECEMBER 2018
5 Pin Configuration and Functions
DGK Package
8-Pin VSSOP
Top View
VCCA
1
8
VCCB
SCLA
2
7
SCLB
SDAA
3
6
SDAB
GND
4
5
EN
Not to scale
Pin Functions
PIN
NAME
NO.
DESCRIPTION
VCCA
1
A-side supply voltage (0.8 V to 5.5 V)
SCLA
2
I2C SCL line, A side. Connect to VCCA through a pull-up resistor.
SDAA
3
I2C SDA line, A side. Connect to VCCA through a pull-up resistor.
GND
4
Supply ground
EN
5
Active-high repeater enable input
SDAB
6
I2C SDA line, B side. Connect to VCCB through a pull-up resistor.
SCLB
7
I2C SCL line, B side. Connect to VCCB through a pull-up resistor.
VCCB
8
B-side and device supply voltage (2.2 V to 5.5 V)
6 Specifications
6.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCCB
Supply voltage range
–0.5
7
V
VCCA
Supply voltage range
–0.5
7
V
VI
Enable input voltage range (2)
–0.5
7
V
VI/O
I2C bus voltage range (2)
–0.5
7
V
IIK
Input clamp current
VI < 0
–50
IOK
Output clamp current
VO < 0
–50
IO
Tstg
(1)
(2)
Continuous output current
Continuous current through VCC or GND
Storage temperature range
–65
mA
±50
mA
±100
mA
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
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SCPS259B – DECEMBER 2014 – REVISED DECEMBER 2018
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6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±4000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCCA
Supply voltage, A-side bus
0.8
VCCB
V
VCCB
Supply voltage, B-side bus
2.2
5.5
V
IOLA
Low-level output current
30
mA
IOLB
Low-level output current
0.1
30
mA
TA
Operating free-air temperature
–40
85
°C
6.4 Thermal Information
TCA9617B
THERMAL METRIC
(1)
DGK
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
171.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
61.2
°C/W
RθJB
Junction-to-board thermal resistance
93.6
°C/W
ψJT
Junction-to-top characterization parameter
7.9
°C/W
ψJB
Junction-to-board characterization parameter
91.9
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
VCCB = 2.2 V to 5.5 V, GND = 0 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
VIK
VOL
TEST CONDITIONS
VCCB
Input clamp voltage
II = –18 mA
2.2 V to 5.5 V
Low-level output voltage
SDAB, SCLB
IOL = 100 µA or 30 mA,
VILA = 0 V
2.2 V to 5.5 V
SDAA, SCLA
IOL = 30 mA
SDAA, SCLA
VIH
High-level input voltage
SDAB, SCLB
2.2 V to 5.5 V
EN
MIN
0.48
TYP
Low-level input voltage
0.1
0.23
0.7 × VCCA
5.5
0.7 × VCCB
5.5
0.7 × VCCB
ICCB
0.4
Both channels low,
SDAA = SCLA = GND and
IOLB =100 µA, or
SDAA = SCLA = open and
SDAB = SCLB = GND
2.2 V to 5.5 V
13
+4.5
VI = 0.2 V, EN = 0
mA
+5.7
VI = 5.5 V,VCCA = 0 V
SDAA, SCLA
VI = 0.2 V, EN = 0
EN
Input capacitance
EN
SCLA, SDAA
CI/O
+1
+10
–1
+1
0V
–10
+10
–1
+1
2.2 V to 5.5 V
–10
+10
–1
+1
0V
–10
+10
–1
+1
VI = VCCA – 0.2 V
VI = 5.5 V, VCCA = 0 V
CI
–1
–10
VI = VCCA
Input leakage current
VI = VCCB
VI = 0.2 V
VI = 3 V or 0 V
VI = 3 V or 0 V
Input/output capacitance
SCLB, SDAB
VI = 3 V or 0 V
+8.1
2.2 V to 5.5 V
VI = VCCB – 0.2 V
µA
+7
5.5 V
VI = VCCB
II
V
0.3 ×
VCCB
Both channels low,
SDAA = SCLA = GND,
IOLB = 100 µA
SDAB, SCLB
V
5.5
2.2 V to 5.5 V
Both Channels high,
SDAA = SCLA = VCCA
B-side pulled up to VCCB with
pull-up resistors
Quiescent supply current
V
0.3 ×
VCCA
SDAB, SCLB
Quiescent supply current for VCCA
V
0.58
EN
ICCA
UNIT
–1.2
0.53
SDAA, SCLA
VIL
MAX
μA
–25
3.3 V
7
3.3 V
9
0V
9
3.3 V
14
0V
14
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6.6 Timing Requirements
VCCA = 0.8 V to 5.5 V, VCCB = 2.2 V to 5.5 V, GND = 0 V, TA = –40°C to 85°C (unless otherwise noted) (1) (2) (3)
PARAMETER
tPLH
Propagation delay
FROM
(INPUT)
TO
(OUTPUT)
SDAB, SCLB
SDAA, SCLA
55
90
61
88
137
VCCB > 3 V
61
94
250
SDAA, SCLA
69
93
144
SDAA, SCLA
SDAB, SCLB
68
90
140
30%
70%
70%
30%
Transition
time
B side
tTHL
Transition
time
B side
tsu,en
Setup time, EN high before Start condition (5)
(2)
(3)
(4)
(5)
42
VCCB ≤ 3 V
SDAB, SCLB
tTLH (4)
(1)
TYP MAX UNIT
SDAB, SCLB
Propagation delay
A side
MIN
SDAA, SCLA
tPHL
A side
TEST CONDITIONS
88
ns
ns
37
5.40
6.41
13.8
1.40
4.71
11.3
100
ns
ns
ns
Times are specified with loads of 240 Ω ±1% and 400 pF ±10% on B-side and 240 Ω ±1% and 200 pF ±10% on A-side. Different load
resistance and capacitance alter the rise time, thereby changing the propagation delay and transition times.
Times are specified with A-side signals pulled up to VCCA and B-side signals pulled up to VCCB.
Typical values were measured with VCCA = 0.9 V and VCCB = 2.5 V at TA = 25°C, unless otherwise noted.
TTLH is determined by the pull-up resistance and load capacitance.
EN should change state only when the global bus and the repeater port are in an idle state.
6.7 Typical Characteristics
Port A V OL (V)
Port B VOL (V)
TA = 85 C
TA = 25 C
TA = -40 C
TA = -40 C
TA = 25 C
TA = 85 C
Port A I OL (mA)
VCCA = 0.9 V
VCCB = 2.2 V
Port B IOL (mA)
VCCA = 0.9 V
Figure 1. Port A VOL vs IOL
6
VCCB = 2.2 V
Figure 2. Port B VOL vs IOL
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7 Parameter Measurement Information
VCCA
VCCB
RPUA
RPUB
VCCA VCCB
VIN
VOUT
Open Drain
Driver
DUT
1M
CLA
CLB
Figure 3. Test Circuit for Open-Drain Output from A to B
VCCA
VCCB
RPUA
RPUB
VCCA VCCB
VOUT
VIN
DUT
Open Drain
Driver
1M
CLA
CLB
A.
VCCA = 0.9 V
B.
VCCB = 2.5 V
C.
RPUA = RPUB = 240 Ω on the A-side and the B-side
D.
CLA = 200 pF on A-side and CLB = 400 pF on B-side (includes probe and jig capacitance)
E.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate
≥ 1 V/ns
F.
The outputs are measured one at a time, with one transition per measurement.
Figure 4. Test Circuit for Open-Drain Output from B to A
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Parameter Measurement Information (continued)
tPHL,AB
tTHL,B
0.7 * VCC
0.3 * VCC
VOLB
VILA
A-side
tPLH,AB
tTLH,B
B-side
0.7 * VCC
0.3 * VCC
VOLB
VILA
Figure 5. Propagation Delay And Transition Times (A to B)
tPHL,BA
tTHL,A
0.7 * VCC
0.3 * VCC
A-side
B-side
tPLH,BA
tTLH,A
0.7 * VCC
0.3 * VCC
0.4 V
Figure 6. Propagation Delay And Transition Times (B to A)
8
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8 Detailed Description
8.1 Overview
The TCA9617B is a BiCMOS dual bidirectional buffer intended for I2C bus and SMBus systems. As with the
standard I2C system, pull-up resistors are required to provide the logic high levels on the buffered bus. The
TCA9617B has standard open-drain configuration of the I2C bus. The size of these pull-up resistors depends on
the system, but each side of the repeater must have a pull-up resistor. The device is designed to work with
Standard mode, Fast mode and Fast Mode+ I2C devices. The SCL and SDA lines shall be at high-impedance
when either one of the supplies is powered off.
The TCA9617B B-side drivers operate from 2.2 V to 5.5 V. The output low level for this internal buffer is
approximately 0.5 V, but the input voltage must be below VIL when the output is externally driven low. The
higher-voltage low signal is called a buffered low. When the B-side I/O is driven low internally, the low is not
recognized as a low by the input. This feature prevents a lockup condition from occurring when the input low
condition is released. This type of design on the B side prevents it from being used in series with another
TCA9617B B-side or other buffers that incorporate a static or dynamic offset voltage. This is because these
devices do not recognize buffered low signals as a valid low and do not propagate it as a buffered low again.
The TCA9617B A-side drivers operate from 0.8 V to 5.5 V and do not have the buffered low feature (or the static
offset voltage). This means that a low signal on the B side translates to a nearly 0-V low on the A side, which
accommodates smaller voltage swings of low-voltage logic. The output pull-down on the A side drives a hard low,
and the input level is set to 0.3 VCCA to accommodate the need for a lower low level in systems where the lowvoltage-side supply voltage is as low as 0.8 V.
The A side of two or more TCA9617Bs can be connected together to allow a star topology, with the A side on the
common bus. Also, the A side can be connected directly to any other buffer with static or dynamic offset voltage.
Multiple TCA9617Bs can be connected in series, A side to B side, with no buildup in offset voltage with only
time-of-flight delays to consider.
The TCA9617B includes a power-up circuit that keeps the output drivers turned off until VCCB is above 2.0 V and
VCCA is above 0.7 V. VCCA is only used to provide references for the A-side input comparators and the powergood-detect circuit. The TCA9617B internal circuitry and all I/Os are powered by the VCCB pin.
After power up and with the EN high, the A side falling below 0.7 VCCA turns on the corresponding B-side driver
(either SDA or SCL) and drives the B-side down momentarily to 0 V before settling to approximately 0.5 V. When
the A-side rises above 0.3 VCCA, the B-side pull-down driver is turned off and the external pull-up resistor pulls
the pin high. If the B side falls first and goes below 0.7 VCCB, the A-side driver is turned on and drives the A-side
to 0 V. When the B-side rises above 0.45 V, the A-side pull-down driver is turned off and the external pull-up
resistor pulls the pin high.
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8.2 Functional Block Diagram
SDAA
VCCA
VCCB
1
8
3
6
2
7
SDAB
SCLA
SCLB
VCCB
5
Pullup
Resistor
EN
4
GND
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8.3 Feature Description
8.3.1 Bidirectional Level Translation
The TCA9617B can provide bidirectional voltage level translation (up-translation and down-translation) between
low voltages (down to 0.8 V) and higher voltages (2.2 V to 5.5 V) in mixed-mode applications.
8.3.2 Low to High Transition Characteristics
Figure 8 depicts the offset voltage on the B side of the device. As shown in Figure 8 the slave releases and the
B-side rises, and it will rise to 0.5 V and stay there until the A-side rises above 0.3 VCCA. This effect can cause
the low level signal to have a "pedestal." Once the voltage on the A-side crosses 0.3 VCCA, the B-side will
continue to rise to VCCB.
Due to nature of the B-side pedestal and the static offset voltage, there will be a slight overshoot as the B-side
rises from being externally driven low to the 0.5 V offset. The TCA9617B is designed to control this behavior
provided the system is designed with rise times greater than 20 ns. Therefore, care should be taken to limit the
pull-up strength when devices with rise time accelerators are present on the B side. Excessive overshoot on the
B-side pedestal may cause devices with rise time accelerators to trip prematurely if the overshoot is more than
accelerator thresholds. Since the A-side does not have a static offset low voltage, no pedestal is seen on the Aside as shown in Figure 7.
10
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Feature Description (continued)
8.3.3 High to Low Transition Characteristics
When the A side of the bus is driven to 0.7 VCCA, the B side driver will turn on. This will drive the B-side to 0 V for
a short period (see Figure 8) and then the B-side will rise to the static offset voltage of 0.5 V (VOL of TCA9617B).
This effect, called an inverted pedestal, allows the B-side to drive to logic low much faster than driving to the
static offset. Driving to the static offset voltage requires that the fall time be slowed to prevent ringing.
th
9 Clock Pulse – Acknowledge
SCL
SDA
Figure 7. Bus A (0.8 V to 5.5 V Bus) Waveform
Inverted Pedestal
th
9 Clock Pulse – Acknowledge
SCL
Pedestal
SDA
GND
VOL of TCA9617B
VOL of Slave
Figure 8. Bus B (2.2 V to 5.5 V Bus) Waveform
8.4 Device Functional Modes
The TCA9617B has an active-high enable (EN) input with an internal pull-up to VCCB, which allows the user to
select when the repeater is active. This can be used to isolate a badly behaved slave on power-up reset. It
should never change state during an I2C operation, because disabling during a bus operation may hang the bus,
and enabling part way through the bus cycles could confuse the I2C parts being enabled. The EN input should
change state only when the global bus and repeater port are in the idle state to prevent system failures.
Table 1. Function Table
INPUT
EN
FUNCTION
L
Outputs disabled
H
SDAA = SDAB
SCLA = SCLB
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9 Application and Implementation
9.1 Application Information
A typical application is shown in Figure 9. In this example, the system master is running on a 0.9-V I2C bus, and
the slave is connected to a 2.5-V bus. Both buses are running at 400 kHz. Decoupling capacitors are required
but are not shown in Figure 14 for simplicity.
The TCA9617B is 5-V tolerant so no additional circuits are required to translate between 0.8-V to 5.5-V bus
voltages and 2.7-V to 5.5-V bus voltages.
When the A side of the TCA9617B is pulled low by a driver on the I2C bus, a comparator detects the falling edge
when it goes below 0.7 VCCA and cause the internal driver on the B side to turn on. The B-side will first pull down
to 0 V and then settle to 0.5 V. When the B side of the TCA9617B falls below 0.45 V, the TCA9617B will detect
the falling edge, turn on the internal driver on the A side and pull the A-side pin down to ground.
On the B-side bus of the TCA9617B, the clock and data lines will have a positive offset from ground equal to the
VOL of the TCA9617B. After the eighth clock pulse, the data line is pulled to the VOL of the slave device, which is
close to ground in this example. At the end of the acknowledge, the level rises only to the low level set by the
driver of the TCA9617B for a short delay (approximately 0.5 V), while the A-side bus rises above 0.3 VCCA and
then continues high.
Although the TCA9617 has a single application, the device can exist in multiple configurations. Figure 9 shows
the standard configuration for the TCA9617. Multiple TCA9617s can be connected either in star configuration
(Figure 12) or in series configuration (Figure 13). The design requirements , detailed design procedure, and
application curves in Standard Application are valid for all three configurations.
9.2 Typical Application
9.2.1 Standard Application
0.9 V
240
2.5 V
240
820
VCCA
Master
1 MHz
820
VCCB
SDAA
SDAB
SCLA
SCLB
TCA9617B
Slave
1 MHz
EN
BUS A
BUS B
Figure 9. Bidirectional Voltage Level Translator
9.2.1.1 Design Requirements
For the level-translating application, the following should be true:
• VCCA = 0.8 V to 5.5 V
• VCCB = 2.2 V to 5.5 V
• VCCA ≤ VCCB
• IOL > IO
12
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Typical Application (continued)
9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Pullup Resistor Sizing
For the TCA9617B to function correctly, all devices on the B-side must be able to pull the B-side below the
voltage input low contention level (0.45 V). This means that the VOL of any device on the B-side must be below
0.4 V to ensure proper operation.
The VOL of a device can be adjusted by changing the IOL through the device which is set by the pull-up resistor
value. The pull-up resistor on the B-side must be carefully selected to ensure that logic levels will be transferred
correctly to the A-side.
The B-side pull-up resistor sizing must also ensure that the rise time is greater than 20 ns. Shorter rise times will
increase the pedestal overshoot shown in point 2 of Figure 10.
9.2.1.3 Application Curves
2
2
1
1
Figure 10. B-side Pedestal
Figure 11. B-side Inverted Pedestal
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Typical Application (continued)
9.2.2 Star Application
Multiple TCA9617B A sides can be connected in a star configuration, allowing all nodes to communicate with
each other.
VCCA
240
VCCB
240
820
820
VCCA VCCB
SDAA
SCLA
SDAB
SCLB
TCA9617B
Master
1 MHz
Slave
1 MHz
EN
820
820
VCCA VCCB
SDAA
SCLA
SDAB
SCLB
TCA9617B
Slave
1 MHz
EN
BUS B
820
820
VCCA VCCB
SDAA
SCLA
SDAB
SCLB
TCA9617B
Slave
1 MHz
EN
Figure 12. Typical Star Application
9.2.2.1 Design Requirements
Refer to Design Requirements.
9.2.2.2 Detailed Design Procedure
Refer to Detailed Design Procedure.
9.2.2.3 Application Curves
Refer to Application Curves.
14
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Typical Application (continued)
9.2.3 Series Application
Multiple TCA9617Bs can be connected in series as long as the A side is connected to the B side. I2C bus slave
devices can be connected to any of the bus segments. The number of devices that can be connected in series is
limited by repeater delay/time-of-flight considerations on the maximum bus speed requirements.
VCCA
240
VCCB
240
820
VCCA
820
VCCA
VCCB
820
VCCB
820
VCCA
820
VCCB
SDAA
SDAB
SDAA
SDAB
SDAA
SDAB
SDA
SCLA
SCLB
SCLA
SCLB
SCLA
SCLB
SCL
Master
1 MHz
820
TCA9617B
TCA9617B
TCA9617B
EN
EN
EN
Slave
1 MHz
Figure 13. Typical Series Application
9.2.3.1 Design Requirements
Refer to Design Requirements.
9.2.3.2 Detailed Design Procedure
Refer to Detailed Design Procedure.
9.2.3.3 Application Curves
Refer to Application Curves.
10 Power Supply Recommendations
For VCCA, an 0.8-V to 5.5-V power supply is required. For VCCB, a 2.2-V to 5.5-V power supply is required.
Standard decoupling capacitors are recommended. These capacitors typically range from 0.1 µF to 1 µF, but the
ideal capacitance depends on the amount of noise from the power supply.
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11 Layout
11.1 Layout Guidelines
The recommended decoupling capacitors should be placed as close to the VCCA and VCCB pins of the
TCA9617B as possible.
11.2 Layout Example
Polygonal Copper Pour
VIA to GND Plane
Decoupling capacitors
1
VCCA
VCCB
8
2
SCLA
SCLB
7
TCA9617B
3
SDAA
4
GND
SDAB
6
EN
5
Figure 14. Layout Schematic
16
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SCPS259B – DECEMBER 2014 – REVISED DECEMBER 2018
12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.2 Community Resource
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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17
PACKAGE OPTION ADDENDUM
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29-Sep-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TCA9617BDGKR
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
ZBOK
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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