TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1
SBOS551C – MARCH 2011 – REVISED APRIL 2023
TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1 and TLV3012B-Q1 Low-Power Comparators
With Integrated 1.24 V Voltage Reference
1 Features
3 Description
•
•
The TLV3011-Q1 is a low-power, open-drain output
comparator; the TLV3012-Q1 is a push-pull output
comparator. Both devices feature an uncommitted onchip voltage reference and have a 5 μA (maximum)
quiescent current, an input common-mode range
200 mV beyond the supply rails, and single-supply
operation from 1.8 V to 5.5 V. The integrated 1.242
V series voltage reference offers low 100 ppm/°C
(maximum) drift, is stable with up to 10 nF capacitive
load, and can provide up to 0.5 mA (typical) of output
current.
•
•
•
•
•
•
•
•
•
•
•
Qualified for automotive applications
AEC-Q100 qualified with the following results:
– Device temperature grade 1: –40°C to +125°C
ambient operating temperature range
– Device HBM ESD classification level 2
– Device CDM ESD classification level C6
Low quiescent current: 3.1 μA (maximum, "B"
version)
Integrated voltage reference: 1.242 V
Input common-mode range: 200 mV beyond rails
Voltage reference initial accuracy: 1%
Fail-safe inputs ("B" version)
Power-on-reset ("B" version)
Integrated hysteresis ("B" version)
Open drain output option (TLV3011x-Q1)
Push-pull output option (TLV3012x-Q1)
Fast response time: 6 uS
Low supply voltage = 1.65 V to 5.5 V ("B" version)
2 Applications
Lane departure warning
Cluster
Toll tag
Asset tracking
Battery management systems
The family is available in both the tiny SOT23-6
package for space-conservative designs, and in the
SC-70 package for even greater board area savings.
All versions are specified for the temperature range of
–40°C to +125°C.
Device Information
PART NUMBER
TLV3011-Q1,
TLV3012-Q1,
TLV3011B-Q1,
TLV3012B-Q1
(1)
PACKAGE (1)
BODY SIZE (NOM)
SOT-23 (6)
2.90 mm × 1.60 mm
SC-70 (6)
2.00 mm × 1.25 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
3000
9860 Units
VS = 5.5V
No Load
2500
2000
Units
•
•
•
•
•
The TLV3011B-Q1 and TLV3012B-Q1 "B" versions
add power-on-reset (POR), fail-safe inputs, built-in
hysteresis, a lower minimum supply voltage of 1.65
V and a 3.1 μA maximum quiescent current.
1500
1000
500
0
1.230
1.235
1.240
1.245
Reference Voltage (V)
1.250
TLV3012B-Q1 Reference Voltage Distribution
TLV3012B-Q1 Reference Voltage vs Temperature
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings TLV3012-Q1 DCK
Package Only ............................................................... 4
6.2 Absolute Maximum Ratings - TLV301x-Q1 DBV
Package, TLV3011B-Q1 and TLV3012B-Q1 ................ 4
6.3 ESD Ratings............................................................... 4
6.4 Thermal Information - TLV3012-Q1 DCK
Package Only................................................................ 5
6.5 Thermal Information- TLV301x-Q1 DBV
Package, TLV3011B-Q1 and TLV3012B-Q1 ................ 5
6.6 Recommended Operating Conditions.........................5
6.7 Electrical Characteristics - TLV3012-Q1 DCK
Package Only ............................................................... 6
6.8 Switching Characteristics - TLV3012-Q1 DCK
Package Only ............................................................... 7
6.9 Electrical Characteristics- TLV301x-Q1 DBV
Package, TLV3011B-Q1 and TLV3012B-Q1 ................ 8
6.10 Switching Characteristics- TLV301x-Q1 DBV
Package, TLV3011B-Q1 and TLV3012B-Q1 .............. 10
7 Typical Characteristics - TLV3012-Q1 DCK
Package Only ................................................................11
8 Typical Characteristics - TLV301x-Q1 DBV
Package, TLV3011B-Q1 and TLV3012B-Q1 ................ 15
9 Detailed Description......................................................21
9.1 Overview................................................................... 21
9.2 Functional Block Diagram......................................... 21
9.3 Feature Description...................................................21
9.4 Device Functional Modes..........................................21
10 Application and Implementation................................ 23
10.1 Application Information........................................... 23
10.2 Typical Application.................................................. 24
10.3 System Examples................................................... 26
10.4 Power Supply Recommendations...........................27
10.5 Layout..................................................................... 28
11 Device and Documentation Support..........................29
11.1 Receiving Notification of Documentation Updates.. 29
11.2 Support Resources................................................. 29
11.3 Trademarks............................................................. 29
11.4 Electrostatic Discharge Caution.............................. 29
11.5 Glossary.................................................................. 29
12 Mechanical, Packaging, and Orderable
Information.................................................................... 29
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (August 2022) to Revision C (April 2023)
Page
• Added TLV3011B-Q1 and TLV3012B-Q1 to front page text and tables............................................................. 1
Changes from Revision A (June 2019) to Revision B (August 2022)
Page
• Added TLV3011-Q1 in both DBV and DCK Packages....................................................................................... 1
• Added TLV3012-Q1 in SOT-23 (DBV)................................................................................................................1
• Added new tables for DBV packages................................................................................................................. 1
• Updated the numbering format for tables, figures, and cross-references throughout the document................. 1
Changes from Revision * (March 2011) to Revision A (June 2019)
Page
• Added the HBM and CDM ESD ratings and classification levels. Also added the AEC-Q100 device
temperature grade ............................................................................................................................................. 1
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section................................................................................................................................................................ 1
• Deleted the TLV3011-Q1 device from the data sheet and removed A from the TLV3012-Q1 part number ...... 1
• Deleted the Package Ordering Information section............................................................................................ 3
• Moved the switching characteristics from the Electrical Characteristics table to the Switching Characteristics
table.................................................................................................................................................................... 7
2
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5 Pin Configuration and Functions
1
6
V+
V-
2
5
REF
IN+
3
4
IN-
+
OUT
Figure 5-1. DCK, DBV Package
6-Pin SC-70, SOT-23
Top View
Table 5-1. Pin Functions
PIN
NO.
1
NAME
I/O
DESCRIPTION
OUT
O
Comparator Output
2
V–
-
Negative (lowest) power supply
3
IN+
I
Non-inverting comparator input
4
IN–
I
Inverting comparator input
5
REF
O
Reference Output
6
V+
-
Positive (highest) power supply
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6 Specifications
6.1 Absolute Maximum Ratings TLV3012-Q1 DCK Package Only
Over operating free-air temperature range (unless otherwise noted)(1).
MIN
MAX
UNIT
7
V
Supply voltage
Voltage(2)
Signal input pins
–0.5
Output short circuit(3)
TJ
Junction temperature
Tstg
Storage temperature
(2)
(3)
V
±10
mA
Continuous
Operating temperature
(1)
(V+) +0.5
Current(2)
–40
–65
125
°C
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
All voltage values are with respect to the network ground pin.
Short circuit to ground
6.2 Absolute Maximum Ratings - TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
Supply voltage: VS = (V+) – (V–)
–0.5
7
V
Input pins (IN+, IN–) from (V–)(2)
–0.5
7
V
Output (OUT) (Open-Drain) from (V–)(3)
–0.5
7
V
Output (OUT) (Push-Pull) from (V–)
–0.5
(V+) + 0.5
V
Output short circuit
current(4)
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
(4)
–65
UNIT
10
mA
150
°C
150
°C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
Input pins are diode-clamped to (V–). Inputs (IN+, IN–) can be greater than (V+) as long as within the –0.5 V to 7 V range. Inputs
beyond –0.3 V must be current-limited to less than –10 mA, while inputs beyond 7 V must be externally voltage clamped.
Output (OUT) for open drain can be greater than (V+) and inputs (IN+, IN–) as long as it is within the –0.5 V to 7 V range
Short-circuit to (V–) or (V+).
6.3 ESD Ratings
VALUE
V(ESD)
(1)
4
Electrostatic
discharge
Human-body model (HBM), per AEC Q100-002((1))
±2000
Charged-device model (CDM), per AEC Q100-0111
±1000
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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6.4 Thermal Information - TLV3012-Q1 DCK Package Only
TLV3012-Q1
THERMAL
METRIC(1)
UNIT
DCK (SOT)
6 PINS
RθJA
Junction-to-ambient thermal resistance
179.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
141.3
°C/W
RθJB
Junction-to-board thermal resistance
71.2
°C/W
ψJT
Junction-to-top characterization parameter
53.6
°C/W
ψJB
Junction-to-board characterization parameter
71.0
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Thermal Information- TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
TLV3011B-Q1, TLV3012B-Q1
THERMAL METRIC(1)
DCK
(SC-70)
DBV
(SOT-23)
6 PINS
6 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
169.8
162.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
120.5
78.8
°C/W
RθJB
Junction-to-board thermal resistance
63.2
42.1
°C/W
ψJT
Junction-to-top characterization parameter
45.9
21.2
°C/W
ψJB
Junction-to-board characterization parameter
63.0
41.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
-
-
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics report.
6.6 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Supply voltage: VS = (V+) – (V–)
Supply voltage: VS = (V+) – (V–)
B-Versions
MIN
MAX
1.8
5.5
UNIT
V
1.65
5.5
V
Input voltage range from (V–)
–0.2
(V+) + 0.2
V
Output voltage range from (V–) for open drain
–0.2
(V+)
V
–0.2
5.5
V
–40
125
°C
Output voltage range from (V–) for open drain
Ambient temperature, TA
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B-Versions
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6.7 Electrical Characteristics - TLV3012-Q1 DCK Package Only
VS = 1.8 V to 5.5 V, at TA = 25°C, VOUT = VS, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
15
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
VCM = 0 V, IO = 0 V
0.5
dVOS/dT
Input offset voltage vs temperature
TA = –40°C to +125°C
±12
PSRR
Power supply rejection ratio
VS = 1.8 V to 5.5 V
100
mV
μV/°C
1000
μV/V
INPUT BIAS CURRENT
IB
Input bias current
VCM = VS/2
±10
pA
IOS
Input offset current
VCM = VS/2
±10
pA
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
(V–) – 0.2
(V+) + 0.2
VCM = –0.2 V to (V+) – 1.5 V
60
74
VCM = –0.2 V to (V+) + 0.2 V
54
62
V
dB
INPUT IMPEDANCE
Common mode
1013 ∥ 2
Ω ∥ pF
Differential
1013
∥4
Ω ∥ pF
OUTPUT
VOL
Voltage output low from rail
VS = 5 V, IOUT = –5 mA
160
200
mV
VOH
Voltage output high from rail
VS = 5 V, IOUT = 5 mA
90
200
mV
See Typical
Characteristics
Short-circuit current
VOLTAGE REFERENCE
VOUT
Output voltage
1.208
1.242
Initial accuracy
1.276
V
±1%
dVOUT/dT
Temperature drift
–40°C ≤ TA ≤ 125°C
dVOUT/
dILOAD
Load regulation, sourcing
0 mA < ISOURCE ≤ 0.5 mA
40
100
0.36
1
Load regulation, sinking
0 mA < ISINK ≤ 0.5 mA
ILOAD
Output current
dVOUT/dVIN
Line regulation
1.8 V ≤ VIN ≤ 5.5 V
10
Reference voltage noise
f = 0.1 Hz to 10 Hz
0.2
6.6
0.5
ppm/°C
mV/mA
mA
100
μV/V
NOISE
mVPP
POWER SUPPLY
VS
IQ
Specified voltage
1.8
5.5
Operating voltage range
1.8
5.5
V
5
μA
Quiescent current
VS = 5 V, VO = High
2.8
V
TEMPERATURE
6
Operating range
–40
125
°C
Storage range
–65
150
°C
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6.8 Switching Characteristics - TLV3012-Q1 DCK Package Only
over operating free-air temperature range (unless otherwise noted)
PARAMETER
Propagation delay time, low to high
Propagation delay time, high to low
TEST CONDITIONS
MIN
TYP
f = 10 kHz, VSTEP = 1 V,
input overdrive = 10 mV
12
f = 10 kHz, VSTEP = 1 V,
input overdrive = 100 mV
6
MAX
UNIT
μs
f = 10 kHz, VSTEP = 1 V,
input overdrive = 10 mV
13.5
f = 10 kHz, VSTEP = 1 V,
input overdrive = 100 mV
6.5
μs
tr
Rise time
CL = 10 pF
100
ns
tf
Fall time
CL = 10 pF
100
ns
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6.9 Electrical Characteristics- TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
For VS (TOTAL SUPPLY VOLTAGE) = (V+) – (V–) = 1.8V and 5.5V, VCM = VS /2 at TA = 25°C (Unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
±0.3
6
mV
9
mV
OFFSET VOLTAGE
VOS
Input offset
voltage
VCM = (V–)
–6
VOS
Input offset
voltage
VCM = (V–)
TA = –40°C to +125°C
–9
dVIO/dT
Input offset
voltage drift
VCM = (V–)
TA = –40°C to +125°C
±12
PSRR
power supply
rejection ratio
VCM = (V–)
VS = 1.8 V to 5.5 V
TA = –40°C to +125°C
100
1000
µV/V
PSRR
power supply
rejection ratio (BVersions)
VCM = (V–)
VS = 1.65 V to 5.5 V
TA = –40°C to +125°C
100
1000
µV/V
VHYS
Input hysteresis
voltage
TA = –40°C to +125°C
2
6
8
mV
VCM = VS /2
–10((1))
±4.5
10((1))
pA
Input offset current VCM = VS /2
–10((1))
±1
10((1))
pA
(V+) + 0.2
V
µV/°C
INPUT BIAS CURRENT
IB
Input bias current
IOS
INPUT COMMON MODE RANGE
VCM-Range
Common-mode
voltage range
VS = 1.8 V to 5.5 V
CMRR
Common mode
rejection ratio
VCM = (V–) + 1.5V to (V+) + 0.2V
VS = 5.5 V
60
74
dB
CMRR
Common mode
rejection ratio
VCM = (V–) - 0.2V to (V+) + 0.2V
VS = 5.5 V
54
62
dB
RCM
Input Common
Mode Resistance
1013
Ω
CIC
Input Common
Mode Capacitance
2
pF
1013
Ω
4
pF
(V–) – 0.2
INPUT IMPEDANCE
RDM
Input Differential
Mode Resistance
CID
Input Differential
Mode
Capacitance
OUTPUT
VOL
Voltage swing
from (V–)
VS = 5 V
ISINK = 5 mA
TA = –40°C to +125°C
160
200
mV
VOH
Voltage swing
from (V+) (for
Push-Pull only)
VS = 5 V
ISOURCE = 5 mA
TA = –40°C to +125°C
90
200
mV
VOLTAGE REFERENCE
VOUT
Reference Voltage
1.223
Accuracy
dVOUT/dT
Temperature Drift
TA = –40°C to +125°C
dVOUT/
dILOAD
Load Regulation,
Sourcing
0 mA < ISOURCE ≤ 0.5 mA
Load Regulation,
Sinking
0 mA < ISINK ≤ 0.5 mA
ILOAD
8
Output Current
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1.242
1.260
±0.25%
±1.5%
V
40
100
ppm/℃
0.36
1((1))
mV/mA
6.6
mV/mA
0.5
mA
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6.9 Electrical Characteristics- TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
(continued)
For VS (TOTAL SUPPLY VOLTAGE) = (V+) – (V–) = 1.8V and 5.5V, VCM = VS /2 at TA = 25°C (Unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
µV/V
µV/V
dVOUT/dVS
Line Regulation
1.8 V ≤ VS ≤ 5.5 V
10
100((1))
dVOUT/dVS
Line
Regulation (BVersions)
1.65 V ≤ VS ≤ 5.5 V
10
100((1))
Vnoise
Noise
f = 0.1 Hz to 10 Hz
0.2
2.8
mVPP
POWER SUPPLY
IQ
Quiescent current
per comparator
Output is logic high
IQ
Quiescent current
per comparator
Output is logic high
TA = –40°C to +125°C
IQ
Quiescent current
per comparator (B- Output is logic high
Versions)
IQ
Quiescent current
Output is logic high
per comparator (BTA = –40°C to +125°C
Versions)
(1)
2.4
5
µA
7
µA
3.1
µA
3.6
µA
Ensured by characterization
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6.10 Switching Characteristics- TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
For VS (TOTAL SUPPLY VOLTAGE) = (V+) – (V–) = 1.8 V and 5.5 V, VCM = VS / 2 at TA = 25°C (Unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT
TPD-LH
Propagation delay time, low-to- f = 10 kHz, VSTEP = 1V, VOD = 10 mV, CL =
high
10 pF
12
µs
TPD-LH
Propagation delay time, low-to- f = 10 kHz, VSTEP = 1V, VOD = 100 mV, CL
high
= 10 pF
6
µs
TPD-LH
Propagation delay time, lowto-high (push-pull output, BVersion)
f = 10 kHz, VSTEP = 200mV, VOD = 100
mV, CL = 10 pF
2
TPD-HL
Propagation delay time, highto-low
f = 10 kHz, VSTEP = 1V, VOD = 10 mV, CL =
10 pF
13.5
µs
TPD-HL
Propagation delay time, highto-low
f = 10 kHz, VSTEP = 1V, VOD = 100 mV, CL
= 10 pF
6.5
µs
TPD-HL
Propagation delay time, highto-low (B-Versions)
f = 10 kHz, VSTEP = 200mV, VOD = 100
mV, CL = 10 pF
TRISE
Output Rise Time, 20% to
80%, push-pull output
CL = 10 pF
100
ns
TRISE
Output Rise Time, 20%
to 80%, push-pull output (BVersions)
CL = 10 pF
10
ns
TRISE
Output Rise Time, 20% to 80%,
RL = 10 kΩ, CL = 10 pF
open-drain output
200
ns
TFALL
Output Fall Time, 80% to 20%
CL = 10 pF
100
ns
TFALL
Output Fall Time, 80% to 20%
(B-Versions)
CL = 10 pF
10
ns
TFALL
Output Fall Time, 80% to 20%,
open-drain output
RL = 10 kΩ, CL = 10 pF
200
ns
TFALL
Output Fall Time, 80% to 20%,
open-drain output (B-Versions)
RL = 10 kΩ, CL = 10 pF
10
ns
tON
Power on-time (B-Versions)
1.9
ms
10
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2
4
4
µs
µs
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TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
7 Typical Characteristics - TLV3012-Q1 DCK Package Only
3.8
14
3.6
12
TLV3012
Quiescent Current – µA
Quiescent Current – µA
At TA = 25°C, VS = 1.8 V to 5.5 V, and Input Overdrive = 100 mV, unless otherwise noted.
3.4
3.2
3
2.8
2.6
2.4
10
VS = 3 V
8
6
4
VS = 1.8 V
2
2.2
2
-50
VS = 5 V
0
-25
0
25
50
75
Temperature – °C
100
1
125
Figure 7-1. Quiescent Current vs Temperature
10
100
1k
10k
Output Switching Frequency – Hz
100k
Figure 7-2. Quiescent Current vs Output Switching Frequency
45
0.25
VOL – Output Low – V
Input Bias Current – pA
40
35
30
25
20
15
10
5
0.20
VS = 1.8 V
VS = 3 V
0.15
VS = 5 V
0.10
0.05
0
-5
0
-50
-25
0
25
50
75
Temperature – °C
100
0
125
Figure 7-3. Input Bias Current vs Temperature
4
6
8
Output Current – mA
10
12
Figure 7-4. Output Low vs Output Current
0.25
80
TLV3012
tPLH – Propagation Delay – µs
VDD = 3 V
0.20
(VS – VOH) – V
2
VDD = 1.8 V
0.15
0.10
VDD = 5 V
0.05
0
0
2
4
6
8
Output Current – mA
10
Figure 7-5. Output High vs Output Current
Copyright © 2023 Texas Instruments Incorporated
12
TLV3012
70
60
50
VS = 5 V
40
VS = 3 V
30
VS = 1.8 V
20
10
0
0.01
0.1
1
10
Capacitive Load – nF
100
1k
Figure 7-6. Propagation Delay (tPLH) vs Capacitive Load
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11
TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
7 Typical Characteristics - TLV3012-Q1 DCK Package Only (continued)
At TA = 25°C, VS = 1.8 V to 5.5 V, and Input Overdrive = 100 mV, unless otherwise noted.
20
70
60
50
VS = 3 V
40
VS = 5 V
30
20
10
VS = 1.8 V
0
0.01
0.1
1
10
Capacitive Load – nF
100
tPLH – Propagation Delay – µs
tPHL – Propagation Delay – µs
80
18
16
12
VS = 1.8 V
8
6
4
0
10
20
30 40 50 60 70
Input Overdrive – mV
90 100
tPLH – Propagation Delay – µs
8
18
16
14
12
VS = 1.8 V
10
VS = 3 V
8
6
VS = 5 V
4
0
10
20
30 40 50 60 70
Input Overdrive – mV
80
7.5
7
6.5
VS = 1.8 V
VS = 3 V
6
5.5
5
VS = 5 V
4.5
4
-50
90 100
Figure 7-9. Propagation Delay (tPHL) vs Input Overdrive
-25
0
25
50
75
Temperature – °C
125
VS = 2.5 V
500 mV/div
7.5
VS = 1.8 V
7
VS = 3 V
6.5
VIN–
VIN+
6
TLV3012
5.5
2 V/div
VS = 5 V
5
4.5
4
-50
100
Figure 7-10. Propagation Delay (tPLH) vs Temperature
8
tPHL – Propagation Delay – µs
80
Figure 7-8. Propagation Delay (tPLH) vs Input Overdrive
20
tPHL – Propagation Delay – µs
VS = 3 V
10
1k
Figure 7-7. Propagation Delay (tPHL) vs Capacitive Load
VS = 5 V
14
-25
0
25
50
75
Temperature – °C
100
125
TLV3011
VOUT
2 µs/div
Figure 7-12. Propagation Delay (tPLH)
Figure 7-11. Propagation Delay (tPHL) vs Temperature
12
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
7 Typical Characteristics - TLV3012-Q1 DCK Package Only (continued)
At TA = 25°C, VS = 1.8 V to 5.5 V, and Input Overdrive = 100 mV, unless otherwise noted.
500 mV/div
VS = 0.9 V
500 mV/div
VS = 2.5 V
VIN+
VIN–
VIN–
VIN+
2 V/div
2 V/div
VOUT
VOUT
2 µs/div
2 µs/div
Figure 7-13. Propagation Delay (tPHL)
1.24205
VS = 0.9 V
Reference Voltage – V
500 mV/div
VIN+
Figure 7-14. Propagation Delay (tPLH)
2 V/div
VIN–
VOUT
1.24200
1.24195
1.24190
1.24185
1.24180
1.24175
1.24170
1.24165
1.24160
0
2 µs/div
1.2
Figure 7-16. Reference Voltage vs Output Load Current
(Sourcing)
1.250
1.250
1.249
1.245
Reference Voltage – V
Reference Voltage – V
Figure 7-15. Propagation Delay (tPHL)
0.2
0.4
0.6
0.8
1
Output Load Current, Sourcing – mA
1.248
1.247
1.246
1.245
1.244
1.243
1.240
1.235
1.230
1.225
1.220
1.215
1.242
1.241
0
0.2
0.4
0.6
0.8
1
Output Load Current, Sinking – mA
1.2
Figure 7-17. Reference Voltage vs Output Load Current
(Sinking)
Copyright © 2023 Texas Instruments Incorporated
1.210
-100
-50
0
50
Temperature – °C
100
150
Figure 7-18. Reference Voltage vs Temperature
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13
TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
7 Typical Characteristics - TLV3012-Q1 DCK Package Only (continued)
At TA = 25°C, VS = 1.8 V to 5.5 V, and Input Overdrive = 100 mV, unless otherwise noted.
500
140
450
120
400
100
350
Sink
80
Units
60
Source
40
250
200
150
100
20
Figure 7-19. Short-Circuit Current vs Supply Voltage
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1.252
1.254
1.250
1.246
1.248
1.242
5.5
1.244
5
1.238
3
3.5
4
4.5
Supply Voltage – V
1.240
2.5
1.236
2
1.232
0
1.5
1.234
50
0
14
300
1.230
Short-Circuit Current – mA
TLV3012
Reference Voltage – V
Figure 7-20. Reference Voltage Distribution
Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1
TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
8 Typical Characteristics - TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD =
100mV unless otherwise noted.
1000
5000
3000
2000
125°C
25°C
-40°C
Output Swing from V+ (mV)
Output Swing from V- (mV)
5000
3000
2000
500
300
200
100
50
30
20
10
5
0.001
0.01
0.1 0.2 0.5 1 2 3 5 710 20
Output Sinking Current (mA)
100
50
30
20
100
50
30
20
0.01
0.1 0.2 0.5 1 2 3 5 710 20
Output Sourcing Current (mA)
50 100
Figure 8-2. Output Swing vs. Output Sourcing Current - 1.8V
5000
3000
2000
125°C
25°C
-40°C
500
300
200
10
5
0.001
500
300
200
5
0.001
50 100
Output Swing from V+ (mV)
Output Swing from V- (mV)
1000
Push-Pull Output Only
No Load
10
Figure 8-1. Output Swing vs. Output Sinking Current - 1.8V
5000
3000
2000
1000
125°C
25°C
-40°C
1000
125°C
25°C
-55°C
Push-Pull Output Only
No Load
500
300
200
100
50
30
20
10
0.01
0.1 0.2 0.5 1 2 3 5 710 20
Output Sinking Current (mA)
5
0.001
50 100
Figure 8-3. Output Swing vs. Output Sinking Current - 3.3V
0.01
0.1 0.2 0.5 1 2 3 5 710 20
Output Sourcing Current (mA)
50 100
Figure 8-4. Output Swing vs. Output Sourcing Current - 3.3V
Output Swing from V+ (mV)
5000
3000
2000
1000
125°C
25°C
-40°C
Push-Pull Output Only
No Load
500
300
200
100
50
30
20
10
5
0.001
Figure 8-5. Output Swing vs. Output Sinking Current - 5V
Copyright © 2023 Texas Instruments Incorporated
0.01
0.1 0.2 0.5 1 2 3 5 710 20
Output Sourcing Current (mA)
50 100
Figure 8-6. Output Swing vs. Output Sourcing Current - 5V
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15
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
8 Typical Characteristics - TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
(continued)
For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD =
100mV unless otherwise noted.
3.50
3.50
1.8 V
3.3 V
5V
3.00
2.75
2.50
2.25
2.00
1.75
3.00
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
25°C
2.25
-20°
2.00
-40°
1.50
1.5
110 125
3
3.5
4
Supply Voltage (V)
4.5
5
5.5
Total Quiecent Current (A)
85°C
2.75
2.50
25°C
2.25
-20°C
2.00
-40°C
1.75
0.3
0.8
125°C
3.25
3.00
3.00
85°C
2.75
2.50
25°C
2.25
-20°C
2.00
-40°C
1.75
1.3
1.8
2.3
Input Voltage from V- (V)
2.8
1.50
-0.2
3.3
0.2
0.6
1
1.4
Input Voltage from V- (V)
1.8
2
Figure 8-10. Supply Current vs. Common Mode - 1.8V
Figure 8-9. Supply Current vs. Common Mode - 3.3V
10
3.50
Propagation Delay, TPHL (s)
125°C
3.25
3.00
85°C
2.75
2.50
25°C
2.25
-20°C
2.00
-40°C
1.75
1.50
-0.2
2.5
3.50
125°C
3.25
1.50
-0.2
2
Figure 8-8. Supply Current vs. Supply Voltage
3.50
Total Quiecent Current (A)
55°C
2.50
Figure 8-7. Supply Current vs. Temperature
Total Quiecent Current (A)
85°C
2.75
1.75
1.50
-40
0.4
1
1.6
2.2
2.8
3.4
Input Voltage from V- (V)
4
4.6
Figure 8-11. Supply Current vs. Common Mode - 5V
16
125°C
3.25
Total Quiecent Current (A)
Total Quiecent Current (A)
3.25
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5.2
1.8V
3.3V
5V
8
7
6
5
4
3
2
1
5 6 7 8 10
20
30 40 50 70 100
Overdrive (mV)
200 300
500
Figure 8-12. High to Low Propagation Delay vs. Overdrive
Copyright © 2023 Texas Instruments Incorporated
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
8 Typical Characteristics - TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
(continued)
For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD =
100mV unless otherwise noted.
10
1.8V
3.3V
5V
Propagation Delay, TPLH (s)
7
5
4
3
2
1
0.7
0.5
5 6 7 8 10
20
30 40 50 70 100
Overdrive (mV)
200 300
500
Figure 8-14. High to Low Propagation Delay vs. Temperature
Figure 8-13. Low to High Propagation Delay vs. Overdrive
1.8
5V
3.3V
1.8V
Propagation Dealy, TPLH (s)
VOD = 100mV
1.6
1.4
1.2
1
-40
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
110 125
Figure 8-16. Reference Voltage vs. Temperature
1.2400
1.2410
1.2399
1.2409
Reference Output Voltage (V)
Reference Output Voltage (V)
Figure 8-15. Low to High Propagation Delay vs. Temperature
1.2398
1.2397
1.2396
1.2395
1.2394
1.2393
1.2392
1.8 V
3.3 V
5V
1.2391
1.8 V
3.3 V
5V
1.2408
1.2407
1.2406
1.2405
1.2404
1.2403
1.2402
1.2401
1.2390
1.2400
0
0.1
0.2 0.3 0.4 0.5 0.6 0.7 0.8
Refernce Output Sourcing Current (mA)
0.9
1
Figure 8-17. Reference Voltage vs. Reference Output Sourcing
Current
Copyright © 2023 Texas Instruments Incorporated
0
0.1
0.2 0.3 0.4 0.5 0.6 0.7 0.8
Refernce Output Sinking Current (mA)
0.9
1
Figure 8-18. Reference Voltage vs. Reference Output Sinking
Current
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
8 Typical Characteristics - TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
(continued)
For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD =
100mV unless otherwise noted.
10
5V
3.3V
1.8V
8
7
6
CL = 15pF
RPULLUP = 1M
Pullup current not included
Total Supply Current (A)
Total Supply Current (A)
10
5
4
3
2
1
CL = 15pF
5
4
3
2
1
1
2 3 45 710 20
50 100200
1000
Toggle Frequency (Hz)
10000
50000
Figure 8-19. Supply Current vs. Toggle Frequency - Open Drain
Output
1
2 3 45 710 20
50 100200
1000
Toggle Frequency (Hz)
10000
50000
Figure 8-20. Supply Current vs. Toggle Frequency - Push-Pull
Output
7
8.5
5V
3.3V
1.8V
6.5
125°C
85°C
25°C
-40°C
8
Typical Hysteresis Voltage (V)
Typical Hysteresis (mV)
5V
3.3V
1.8V
8
7
6
6
5.5
5
7.5
7
6.5
6
5.5
5
4.5
4.5
-40
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
110 125
Figure 8-21. Hysteresis Voltage vs. Temperature
4
-0.2
0.2
0.6
1
1.4
Input Common Mode Voltage (V)
1.8
2
Figure 8-22. Hysteresis Voltage vs. Common Mode, 1.8V
8.5
125°C
85°C
25°C
-40°C
Typical Hysteresis Voltage (V)
8
7.5
7
6.5
6
5.5
5
4.5
4
-0.2
0.3
0.8
1.3
1.8
2.3
2.8
Input Common Mode Voltage (V)
3.3
Figure 8-23. Hysteresis Voltage vs. Common Mode, 3.3V
18
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Figure 8-24. Hysteresis Voltage vs. Common Mode, 5V
Copyright © 2023 Texas Instruments Incorporated
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
8 Typical Characteristics - TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
(continued)
For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD =
100mV unless otherwise noted.
8
7
2
6.5
6
5.5
1.5
1
0.5
0
-0.5
-1
-1.5
-2
5
4.5
1.5
7 Individual Units
VS = 1.8V
2.5
Offset Voltage (mV)
Hysteresis Voltage (mV)
7.5
3
125°C
85°C
25°C
-55°C
-2.5
2
2.5
3
3.5
4
Supply Voltage (V)
4.5
5
5.5
-3
-55
-35
-15
5
25
45
65
Temperature (°C)
85
105
125
Figure 8-26. Offset Voltage vs. Temperature, 1.8 V
Figure 8-25. Hysteresis Voltage vs. Supply Voltage
3
7 Individual Units
VS = 3.3V
2.5
Offset Voltage (mV)
2
1.5
1
0.5
0
-0.5
-1
-1.5
-2
-2.5
-3
-40
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
110 125
Figure 8-28. Offset Voltage vs. Temperature, 5 V
Figure 8-27. Offset Voltage vs. Temperature, 3.3 V
3.00
VS = 5V, TA = 25°C
7 Individual Units
2.50
Offset Voltage (mV)
2.00
1.50
1.00
0.50
0.00
-0.50
-1.00
-1.50
-2.00
-2.50
-3.00
-0.2
0.2
0.6
1
1.4
Common Mode Voltage (V)
1.8
2
Figure 8-29. Offset Voltage vs. Common Mode Voltage, 1.8 V
Copyright © 2023 Texas Instruments Incorporated
Figure 8-30. Offset Voltage vs. Common Mode Voltage, 3.3 V
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SBOS551C – MARCH 2011 – REVISED APRIL 2023
8 Typical Characteristics - TLV301x-Q1 DBV Package, TLV3011B-Q1 and TLV3012B-Q1
(continued)
For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD =
100mV unless otherwise noted.
3.00
3.00
VS = 5V, TA = 25°C
7 Individual Units
2.50
2.50
2.00
1.50
Offset Voltage (mV)
Offset Voltage (mV)
2.00
1.00
0.50
0.00
-0.50
-1.00
-1.50
0.50
0.00
-0.50
-1.00
-1.50
-2.00
-2.50
-2.50
0.4
1
1.6
2.2
2.8
3.4
Common Mode Voltage (V)
4
4.6
-3.00
1.5
5.2
3.00
2.50
2.50
2.00
2.00
1.50
1.50
Offset Voltage (mV)
3.00
1.00
0.50
0.00
-0.50
-1.00
-1.50
-2.00
-3.00
1.5
2.1
2.7
3.3
3.9
Supply Voltage (V)
4.5
5.1
Figure 8-33. Offset Voltage vs. Supply Voltage, 25°C
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2.1
2.7
3.3
3.9
Supply Voltage (V)
5.1
5.5
0.50
0.00
-0.50
-1.00
-1.50
TA = -40°C
7 Individual Units
-2.50
5.5
4.5
1.00
-2.00
VS = 5V, TA = 25°C
7 Individual Units
-2.50
VS = 5V, TA = 125°C
7 Individual Units
Figure 8-32. Offset Voltage vs. Supply Voltage, 125°C
Figure 8-31. Offset Voltage vs. Common Mode Voltage, 5 V
Offset Voltage (mV)
1.00
-2.00
-3.00
-0.2
20
1.50
-3.00
1.5
2.1
2.7
3.3
3.9
Supply Voltage (V)
4.5
5.1
5.5
Figure 8-34. Offset Voltage vs. Supply Voltage, -40°C
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9 Detailed Description
9.1 Overview
The TLV301xB-Q1 is a MicroPower comparator with an integrated reference that is well suited for compact,
low-current, precision voltage detection applications. With a high-accuracy, internal reference of 1.242 V and 3.1
uA of quiescent current, the TLV301xB-Q1 enables power conscious systems to monitor and respond quickly to
fault conditions.
9.2 Functional Block Diagram
V+
+
IN+
OUT
INREF
+ 1.242V
Reference
V-
9.3 Feature Description
The TLV301x-Q1 is comprised of a rail-to-rail input comparator with open-drain or push-pull output options and a
voltage reference that is externally available.
9.4 Device Functional Modes
The TLV301x-Q1 requires an operating voltage between 1.8 V and 5.5 V for the comparator output to reflect the
voltage applied to the inputs. Similarly, the reference output (REF) will also be valid over the same operating
voltage range. The "B" versions add hysteresis, power on reset, fail-safe inputs and a 1.65 V minimum supply
voltage.
9.4.1 Open Drain Output (TLV3011-Q1 and TLV3011B-Q1)
The TLV3011-Q1 features an Open-Drain (sinking only) output that allows multiple devices to be driven by a
single pull-up resistor to accomplish an OR function, making the TLV3011-Q1 useful for logic applications. The
value of the pull-up resistor and supply voltage used will affect current consumption due to additional current
drawn when the output is in a low state. This effect can be seen in the typical curve Quiescent Current vs Output
Switching Frequency.
For the TLV3011-Q1, the pull-up voltage must be less than, or equal to, the V+ supply voltage (VPULLUP ≤ V+).
The TLV3011B-Q1 may be pulled-up to any voltage up to 5.5V, regardless of the supply voltage.
9.4.2 Push-Pull Output (TLV3012-Q1 and TLV3012B-Q1)
The TLV3012-Q1 has a "Push-Pull" output capable of both sinking and sourcing current. The push-pull output
stage is optimal for reduced power budget applications by eliminating the need for a pull-up resistor and features
no shoot-through current. Do not tie push-pull outputs together.
9.4.3 Voltage Reference
The integrated 1.242-V voltage reference offers low 100-ppm/°C (maximum) drift provided on a seporate output
pin that allows use of external dividers or to provide a reference voltage for other external circuitry. The reference
is stable with up to a 10-nF capacitive load and can sink or source up to 500µA (typical) of output current.
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9.4.4 TLV3011B-Q1 and TLV3012B-Q1 Fail-Safe inputs
The TLV3011B-Q1 and TLV3012B-Q1 inputs are Fail-Safe up to 5.5V independent of V+ voltage. Fail-Safe is
defined as maintaining the same high input impedance when V+ is unpowered or within the recommended
operating ranges.
The Fail-Safe inputs can be any value between 0 V and 5.5 V, even while V+ is zero or ramping up or down.
This feature avoids power sequencing issues as long as the input voltage range and supply voltage are within
the specified ranges. This is possible since the inputs are not clamped to V+ and the input current maintains its
value even when a higher voltage is applied to the inputs.
As long as one of the input pins remains within the valid input range, and the supply voltage is valid and not in
POR, the output state will be correct.
The following is a summary of the TLV3011B-Q1 and TLV3012B-Q1 device input voltage excursions and their
outcomes:
1. When both IN- and IN+ are within the specified input voltage range:
a. If IN- is higher than IN+ and the offset voltage, the output is low.
b. If IN- is lower than IN+ and the offset voltage, the output is high.
2. When IN- is higher than the specified input voltage range and IN+ is within the specified voltage range, the
output is low.
3. When IN+ is higher than the specified input voltage range and IN- is within the specified input voltage range,
the output is high
4. When IN- and IN+ are both outside the specified input voltage range, the output state is indeterminate
(random). Do not operate in this region.
Because the inputs do not have upper ESD diode clamps to V+, input voltages must be externally clamped to
below 5.5 V if the source could possibly exceed 5.5 V. A current limiting resistor in series with the input is also
recommend in case of input transients.
9.4.5 TLV3011B-Q1 and TLV3012B-Q1 Power On Reset
The TLV3011B-Q1 and TLV3012B-Q1 have an internal Power-on-Reset (POR) circuit for known start-up or
power-down conditions. While the power supply (V+) is ramping up or ramping down, the POR circuitry will be
activated for up to 1.9ms after the minimum supply voltage threshold is crossed, or immediately when the supply
voltage drops below minimum supply. When the supply voltage is equal to or greater than the minimum supply
voltage, and after the delay period, the comparator output reflects the state of the differential input (VID). This
delay is long enough to allow the reference output to stabilize with up to a 10nF capacitive load.
During the POR period (ton), the outputs will be the following:
•
•
The open drain output TLV3011B-Q1 will be high (Hi-Z).
The push-pull output TLV3012B-Q1 will be low (sinking).
Power On Reset Time (tON)
0V
+1.5V
VS
VOH / 2
OUT
VOL
Figure 9-1. Power-On Reset Example Timing Diagram for Push-Pull Output
Note that it the nature of an open collector output that the output will rise with the pull-up voltage during the HI-Z
POR period.
22
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10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
10.1 Application Information
The TLV301x-Q1 and TLV301xB-Q1 comparator family with on-chip 1.242-V series reference with the choice of
either open-drain or push-pull output stages.
A typical supply current of 2.4 μA and small packaging combine with 1.65-V supply requirements to make the
TLV301xB-Q1 devices optimal for battery and portable designs.
Figure 10-1 shows the typical connections for the TLV3012-Q1 device.
V+
0.01 µF
VIN–
4
6
TLV3012-Q1
VIN+
10 µF
1
VOUT
V–
3
2
5
REF
Copyright © 2016, Texas Instruments Incorporated
Figure 10-1. Basic Connections
10.1.1 External Hysteresis
Comparator inputs have no noise immunity within the range of the specified offset voltage. For noisy input
signals, the comparator output may display multiple switching as input signals move through the switching
threshold. The typical comparator threshold of the TLV3012-Q1 device is ±0.5 mV. To prevent multiple switching
within the comparator threshold of the TLV3012-Q1 device, external hysteresis may be added by connecting
a small amount of feedback to the positive input. Figure 10-2 shows a typical topology used to introduce
hysteresis, described by Equation 1.
VHYST =
V+ × R1
R1 + R2
(1)
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V+
5V
VIN
–
VOUT
TLV3012-Q1
+
REF
R2
560 kΩ
R1
39 kΩ
VHYST = 0.38 V
VREF
Copyright © 2016, Texas Instruments Incorporated
Figure 10-2. Adding Hysteresis
The VHYST voltage sets the value of the transition voltage required to switch the comparator output by increasing
the threshold region, thereby reducing sensitivity to noise.
10.1.2 TLV3011B-Q1 and TLV3012B-Q1 Hysteresis
The TLV3011B-Q1 and TLV3012B-Q1 have typically 6mV of built-in hysteresis. External hysteresis can still be
added as explained in the previous section.
10.2 Typical Application
10.2.1 Under-Voltage Detection
Under-voltage detection is frequently required to alert the system that a battery voltage has dropped below the
usable voltage level. Figure 23 shows a simple under-voltage detection circuit using the TLV3012-Q1 which is
configured as a non-inverting comparator with the integrated 1.242 V reference is externally connected to the
inverting input pin (IN-).
VBAT
R1
V+
+
ALERT
t
1.242V
R2
TLV3012-Q1
Microcontroller
Figure 10-3. Under-Voltage Detection
10.2.1.1 Design Requirements
For this design, follow these design requirements:
•
•
•
24
Operate from power supply that powers the microcontroller.
Under-voltage alert is active low.
Logic low output when VBAT is less than 2.0V.
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10.2.1.2 Detailed Design Procedure
Configure the circuit as shown in Figure 10-3. Connect (V+) to VBAT which also powers the microcontroller.
Resistors R1 and R2 create the under-voltage alert level of 2.0 V. When the battery voltage sags down to 2.0
V, the resistor divider voltage crosses VREF, the 1.242 V reference threshold of the TLV3012-Q1. This causes
the comparator output to transition from a logic high to a logic low. The push-pull output of the TLV3012-Q1
is selected since the comparator operating voltage is shared with the microcontroller which is receiving the
under-voltage alert signal.
Equation 2 is derived from the analysis of Figure 10-3.
(2)
where
•
•
•
R1 and R2 are the resistor values for the resistor divider connected to IN+
VBAT is the voltage source that is being monitored for an undervoltage condition.
VREF is the falling edge threshold where the comparator output changes state from high to low
Rearranging Equation 2 and solving for R1 yields Equation 3.
(3)
For the specific undervoltage detection of 2.0 V using the TLV3012-Q1, the following results are calculated.
(4)
where
•
•
•
R2 is set to 1 MΩ
VBAT is set to 2.0 V
VREF is set to1.242 V
Choose RTOTAL (R1 + R2) such that the current through the divider is at least 100 times higher than the input bias
current (IBIAS). The resistors can have high values to minimize current consumption in the circuit without adding
significant error to the resistive divider.
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10.2.1.3 Application Curve
T
2.00
IN+
(V)
IN
1.242
0.00
3.30
VVBAT
BAT (V)
2.00
0.00
3.30
Vout
OUT
(V)
0.00
1.30
1.45
1.60
1.75
1.90
2.05
2.20
Time (s)
Time
(s)
Figure 10-4.
10.3 System Examples
10.3.1 Power-On Reset
The reset circuit shown in Figure 10-5 provides a time-delayed release of reset to the MSP430™ microcontroller.
Operation of the circuit is based on a stabilization time constant of the supply voltage, rather than on a
predetermined voltage value. The negative input is a reference voltage created by the internal voltage reference.
The positive input is an RC circuit that provides a power-up delay. When power is applied, the output of the
comparator is low, holding the processor in the reset condition. Only after allowing time for the supply voltage
to stabilize does the positive input of the comparator become higher than the negative input, resulting in a
high output state, releasing the processor for operation. The stabilization time required for the supply voltage
is adjustable by the selection of the RC component values. Use of a lower-valued resistor in this portion of the
circuit does not increase current consumption, because no current flows through the RC circuit after the supply
has stabilized.
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V+
R1
1 MΩ
DI
MSP430™
+
C1
10 nF
TLV3012-Q1
RESET
1.242 V
–
REF
Copyright © 2016, Texas Instruments Incorporated
Figure 10-5. TLV3012-Q1 Configured as Power-Up Reset Circuit for the MSP430™ Microcontroller
The reset delay needed depends on the power-up characteristics of the system power supply. R1 and C1 are
selected to allow enough time for the power supply to stabilize. D1 provides rapid reset if power is lost. In this
example, the R1 × C1 time constant is 10 ms.
10.3.2 Relaxation Oscillator
The TLV3012-Q1 device can be configured as a relaxation oscillator to provide a simple and inexpensive clock
output (see Figure 10-6). The capacitor is charged at a rate of T = 0.69RC and discharges at a rate of 0.69RC.
Therefore, the period is T = 1.38RC. R1 may be a different value than R2.
VC
2/3 (V+)
1/3 (V+)
V+
V+
C
1000 pF
t
T1
T2
R1
1 MΩ
VOUT
TLV3012-Q1
R2
t
R2
1 MΩ
1 MΩ
F = 724 Hz
V+
R2
1 MΩ
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Figure 10-6. TLV3012-Q1 Configured as Relaxation Oscillator
10.4 Power Supply Recommendations
The TLV3012-Q1 has a recommended operating voltage range (VS) of 1.8 V to 5.5 V. VS is defined as (V+) –
(V-). Therefore, the supply voltages used to create VS can be single-ended or bipolar. For example, single-ended
supply voltages of 5 V and 0 V and bipolar supply voltages of +2.5 V and –2.5 V create comparable operating
voltages for VS. However, when bipolar supply voltages are used, it is important to realize that the reference
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(REF) and logic low level of the comparator output is referenced to (V-). Output capacitive loading and output
toggle rate will cause the average supply current to rise over the quiescent current in the EC Table.
10.5 Layout
10.5.1 Layout Guidelines
To minimize supply noise, power supplies should be capacitively decoupled by a 0.1-μF ceramic capacitor.
Comparators are sensitive to input noise and precautions such as proper grounding (use of ground plane),
supply bypassing, and guarding of high-impedance nodes minimize the effects of noise and help to ensure
specified performance.
10.5.2 Layout Example
C1
GND
OUT
OUT
GND
VIN+
VIN
V+
V
S
REF
INSOT-23
GND
R1
R2
Figure 10-7. Layout Example
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11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.3 Trademarks
MSP430™ is a trademark of Texas Instruments.
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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29
PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV3011AQDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2Q7F
Samples
TLV3011AQDCKRQ1
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1M6
Samples
TLV3011BQDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
31IF
Samples
TLV3011BQDCKRQ1
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1O6
Samples
TLV3012AQDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2Q8F
Samples
TLV3012AQDCKRQ1
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BPF
Samples
TLV3012BQDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
31JF
Samples
TLV3012BQDCKRQ1
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1O7
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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