TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
STEREO 2.8-W AUDIO POWER AMPLIFIER
WITH DC VOLUME CONTROL AND MUX CONTROL
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
Compatible With PC 99 Desktop Line-Out Into
10-kΩ Load
Compatible With PC 99 Portable Into 8-Ω Load
Internal Gain Control, Which Eliminates
External Gain-Setting Resistors
DC Volume Control From 20 dB to -40 dB
2.8-W/Ch Output Power Into a 3-Ω Load
Input MUX Select Terminal
PC-Beep Input
Depop Circuitry
Stereo Input MUX
Fully Differential Input
Low Supply Current and Shutdown Current
Surface-Mount Power Packaging 24-Pin
TSSOP PowerPAD™
PWP PACKAGE
(TOP VIEW)
GND
HP/LINE
VOLUME
LOUT+
LLINEIN
LHPIN
PVDD
RIN
LOUTLIN
BYPASS
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
GND
RLINEIN
SHUTDOWN
ROUT+
RHPIN
VDD
PVDD
CLK
ROUTSE/BTL
PC-BEEP
GND
DESCRIPTION
The TPA0232 is a stereo audio power amplifier in a 24-pin TSSOP thermally enhanced package capable of
delivering 2.8 W of continuous RMS power per channel into 3-Ω loads.
This device minimizes the number of external components needed, which simplifies the design and frees up
board space for other features. When driving 1 W into 8-Ω speakers, the TPA0232 has less than 0.4% THD+N
across its specified frequency range. Included within this device is integrated depop circuitry that virtually
eliminates transients that cause noise in the speakers.
Amplifier gain is controlled by means of a dc voltage input on the VOLUME terminal. There are 31 discrete steps
covering the range of 20 dB (maximum volume setting) to -40 dB (minimum volume setting) in 2-dB steps. When
the VOLUME terminal exceeds 3.54 V, the device is muted. An internal input MUX allows two sets of stereo
inputs to the amplifier. The HP/LINE terminal allows the user to select which MUX input is active regardless of
whether the amplifier is in single-ended (SE) or bridge-tied load (BTL) mode. In notebook applications, where
internal speakers are driven as BTL and the line outputs (often headphone drive) are required to be SE, the
TPA0232 automatically switches into SE mode when the SE/BTL input is activated, and this effectively reduces
the gain by 6 dB.
The TPA0232 consumes only 10 mA of supply current during normal operation. A miserly shutdown mode
reduces the supply current to 150 µA.
The PowerPAD package (PWP) delivers a level of thermal performance that was previously achievable only in
TO-220-type packages. Thermal impedances of approximately 35°C/W are readily realized in multilayer PCB
applications. This allows the TPA0232 to operate at full power into 8-Ω loads at ambient temperatures of 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2004, Texas Instruments Incorporated
TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PACKAGED DEVICE
TA
TSSOP (1) (PWP)
-40°C to 85°C
(1)
TPA0232PWP
The PWP package is available taped and reeled. To order a taped
and reeled part, add the suffix R to the part number (e.g.,
TPA0232PWPR).
FUNCTIONAL BLOCK DIAGRAM
RHPIN
RLINEIN
R
MUX
32-Step
Volume
Control
−
ROUT+
+
VOLUME
32-Step
Volume
Control
RIN
−
ROUT−
+
PC-BEEP
SE/BTL
HP/LINE
PC
Beep
Depop
Circuitry
MUX
Control
Power
Management
PVDD
VDD
BYPASS
SHUTDOWN
GND
LHPIN
LLINEIN
L
MUX
32-Step
Volume
Control
−
LOUT+
+
LIN
32-Step
Volume
Control
−
LOUT−
+
2
TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
BYPASS
11
CLK
17
I
If a 47-nF capacitor is attached, the TPA0232 generates an internal clock. An external clock can
override the internal clock input to this terminal.
GND
1, 12
13, 24
I
Ground connection for circuitry. Connected to thermal pad
LHPIN
6
I
Left channel headphone input, selected when SE/BTL is held high
LIN
10
I
Common left input for fully differential input. AC ground for single-ended inputs
LLINEIN
5
I
Left channel line negative input, selected when SE/BTL is held low
LOUT+
4
O
Left channel positive output in BTL mode and positive output in SE mode
LOUT-
9
O
Left channel negative output in BTL mode and high-impedance in SE mode
HP/LINE
2
I
HP/LINE is the input MUX control input. When the HP/LINE terminal is held high, the headphone inputs
(LHPIN or RHPIN [6, 20]) are active. When the HP/LINE terminal is held low, the line BTL inputs
(LLINEIN or RLINEIN [5, 23]) are active.
PC-BEEP
14
I
The input for PC-Beep mode. PC-BEEP is enabled when a > 1.5-V (peak-to-peak) square wave is
input to PC-BEEP.
7, 18
I
Power supply for output stage
RHPIN
20
I
Right channel headphone input, selected when SE/BTL is held high
RIN
8
I
Common right input for fully differential input. AC ground for single-ended inputs
RLINEIN
23
I
Right channel line input, selected when SE/BTL is held low
ROUT+
21
O
Right channel positive output in BTL mode and positive output in SE mode
ROUT-
16
O
Right channel negative output in BTL mode and high-impedance in SE mode
SE/BTL
15
I
Hold SE/BTL low for BTL mode and hold high for SE mode
SHUTDOWN
22
I
When held low, this terminal places the entire device, except PC-BEEP detect circuitry, in shutdown
mode.
VDD
19
I
Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest
performance.
VOLUME
3
I
VOLUME detects the dc level at the terminal and sets the gain for 31 discrete steps covering a range
of 20 dB to -40 dB for dc levels of 0.15 V to 3.54 V. When the dc level is over 3.54 V, the device is
muted.
PVDD
Tap to voltage divider for internal mid-supply bias generator
Thermal Pad
Connect to ground. Must be soldered down in all applications to properly secure device on PC board.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
UNIT
Supply voltage, VDD
Input voltage, VI
Continuous total power dissipation
6V
-0.3 V to VDD 0.3 V
Internally Limited (see Dissipation Rating
Table)
Operating free-air temperature range, TA
-40°C to 85°C
Operating junction temperature range, TJ
-40°C to 150°C
Storage temperature range, Tstg
-65°C to 85°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1)
260°C
Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
3
TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
DISSIPATION RATING TABLE
(1)
PACKAGE
TA≤ 25°C
DERATING FACTOR
TA = 70°C
TA = 85°C
PWP
2.7 W (1)
21.8 mW/°C
1.7 W
1.4 W
See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (literature number SLMA002), for
more information on the PowerPAD package. The thermal data was measured on a PCB layout based on the information in the section
entitled Texas Instruments Recommended Board for PowerPAD on page 33 of the before mentioned document.
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
4.5
5.5
Supply voltage, VDD
0.8 × VDD
SE/BTL, HP/LINE
High-level input voltage, VIH
SHUTDOWN
0.6 × VDD
SHUTDOWN
0.8
Operating free-air temperature, TA
V
V
2
SE/BTL, HP/LINE
Low-level input voltage, VIL
UNIT
-40
85
V
°C
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
Output offset voltage (measured differentially)
VI = 0 V, Av = 2 V/V
PSRR
Power supply rejection ratio
VDD = 4.9 V to 5.1 V
|IIH|
High-level input current (SHUTDOWN, SE/BTL,
HP/LINE, VOLUME)
VDD = 5.5 V, VI = VDD
900
nA
|IIL|
Low-level input current (SHUTDOWN, SE/BTL,
HP/LINE, VOLUME)
VDD = 5.5 V, VI = 0 V
900
nA
IDD
IDD(SD)
Supply current
35
UNIT
|VOO|
67
dB
BTL mode, SHUTDOWN = 2 V,
SE/BTL = HP/LINE = 0.6 VDD
10
15
SE mode, SHUTDOWN = 2 V,
SE/BTL = HP/LINE = 0.8 VDD
5
7.5
150
300
mA
SHUTDOWN = 0 V,
SE/BTL = HP/LINE = 0 VDD
Supply current, shutdown mode
mV
µA
OPERATING CHARACTERISTICS
VDD = 5 V, TA = 25°C, RL = 4Ω , Gain = 2 V/V, BTL mode (unless otherwise noted)
PARAMETER
TEST CONDITIONS
PO
Output power
RL = 3 Ω, f = 1 kHz
THD+N
Total harmonic distortion plus noise
PO = 1 W, f = 20 Hz to 15 kHz
BOM
Maximum output power bandwidth
THD = 5%
Vn
4
Supply ripple rejection ratio
f = 1 kHz, C(BYP) = 0.47 µF
Noise output voltage
C(BYP) = 0.47 µF,
f = 20 Hz to 20 kHz
MIN
TYP MAX
THD = 10%
2.8
THD = 1%
2.3
UNIT
W
0.4%
>15
BTL mode
65
SE mode
60
BTL mode
34
SE mode
44
kHz
dB
µVRMS
TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Output power
1, 4, 6, 8, 10
vs Voltage gain
2
THD+N
Total harmonic distortion plus noise
Vn
Output noise voltage
vs Frequency
13
Supply ripple rejection ratio
vs Frequency
14, 15
Crosstalk
vs Frequency
16, 17, 18
Shutdown attenuation
vs Frequency
19
Signal-to-noise ratio
vs Frequency
vs Frequency
3, 5, 7, 9, 11
vs Output voltage
SNR
12
20
Closed loop response
PO
21, 22
Output power
PD
Power dissipation
ZI
Input impedance
vs Load resistance
23, 24
vs Output power
25, 26
vs Ambient temperature
27
vs Gain
28
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
VOLTAGE GAIN
1%
THD+N -Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10%
RL = 4 Ω
1%
RL = 8 Ω
RL = 3 Ω
0.1%
AV = +20 to 0 dB
f = 1 kHz
BTL
0.01%
0.5 0.75
1
1.25 1.5 1.75
2
2.25 2.5 2.75
PO − Output Power − W
Figure 1.
3
PO = 1 W for AV ≥ 6 dB
VO = 1 VRMS for AV ≤ 4 dB
RL = 8 Ω
BTL
0.1%
0.01%
-40
-30
-20
-10
0
10
20
A V - Voltage Gain - dB
Figure 2.
5
TPA0232
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SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
10%
RL = 3 Ω
AV = +20 to 0 dB
BTL
THD+N -Total Harmonic Distortion + Noise
THD+N -Total Harmonic Distortion + Noise
10%
1%
PO = 1 W
PO = 0.5 W
0.1%
PO = 1.75 W
0.01%
20
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
0.1%
f = 20 Hz
RL = 3 Ω
AV = +20 to 0 dB
BTL
0.01%
0.01
f - Frequency - Hz
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
1k
10k 20k
10
10%
RL = 4 Ω
AV = +20 to 0 dB
BTL
1%
PO = 0.25 W
0.1%
PO = 1.5 W
PO = 1 W
0.01%
20
100
1k
f - Frequency - Hz
Figure 5.
10k 20k
THD+N -Total Harmonic Distortion + Noise
THD+N -Total Harmonic Distortion + Noise
f = 1 kHz
0.1
1
PO - Output Power - W
100
10%
6
f = 20 kHz
1%
RL = 4 Ω
AV = +20 to 0 dB
BTL
1%
f = 20 kHz
f = 1 kHz
0.1%
f = 20 Hz
0.01%
0.01
0.1
1
PO - Output Power - W
Figure 6.
10
TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
10%
RL = 8 Ω
AV = +20 to 0 dB
BTL
THD+N -Total Harmonic Distortion + Noise
THD+N -Total Harmonic Distortion + Noise
10%
1%
PO = 0.25 W
0.1%
PO = 0.5 W
0.01%
20
PO = 1 W
1%
f = 20 kHz
f = 1 kHz
0.1%
f = 20 Hz
0.01%
0.01
f - Frequency - Hz
0.1
1
PO - Output Power - W
Figure 7.
Figure 8.
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
100
1k
10k 20k
THD+N -Total Harmonic Distortion + Noise
RL = 32 Ω
AV = +14 to 0 dB
SE
1%
0.1%
PO = 25 mW
0.01%
PO = 50 mW
0.001%
20
10
10%
10%
THD+N -Total Harmonic Distortion + Noise
RL = 8 Ω
AV = +20 to 0 dB
BTL
100
PO = 75 mW
1k
f - Frequency - Hz
Figure 9.
10k 20k
1%
f = 20 kHz
0.1%
f = 1 kHz
0.01%
0.01
RL = 32 Ω
AV = +14 to 0 dB
SE
f = 20 Hz
0.1
PO - Output Power - W
1
Figure 10.
7
TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT VOLTAGE
10%
10%
THD+N -Total Harmonic Distortion + Noise
THD+N -Total Harmonic Distortion + Noise
RL = 10 kΩ
AV = +14 to 0 dB
SE
1%
0.1%
VO = 1 VRMS
0.01%
0.001%
20
1k
f = 1 kHz
0.01%
RL = 10 kΩ
AV = +14 to 0 dB
SE
10k 20k
0
f = 20 Hz
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
f - Frequency - Hz
VO - Output Voltage - VRMS
Figure 11.
Figure 12.
OUTPUT NOISE VOLTAGE
vs
FREQUENCY
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
1.8
2
0
VDD = 5 V
BW = 22 Hz to 22 kHz
RL = 4 Ω
140
Supply Ripple Rejection Ratio - dB
Vn - Output Noise Voltage - µV RMS
f = 20 kHz
0.1%
0.001%
100
160
120
100
AV = 20 dB
80
60
AV = 6 dB
40
20
0
RL = 8 Ω
C(BYP) = 0.47 µF
BTL
-20
AV = 20 dB
-40
-60
-80
AV = 6 dB
-100
-120
0
100
1k
f - Frequency - Hz
Figure 13.
8
1%
10k 20k
20
100
1k
f - Frequency - Hz
Figure 14.
10k 20k
TPA0232
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SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
-40
RL = 32 Ω
C(BYP) = 0.47 µF
SE
-20
PO = 1 W
RL = 8 Ω
AV = +20 dB
BTL
-50
-60
-40
AV = 6 dB
Crosstalk - dB
Supply Ripple Rejection Ratio - dB
0
-60
-80
-70
Left to Right
-80
-90
Right to Left
AV = 14 dB
-100
-100
-110
-120
-120
20
100
1k
f - Frequency - Hz
20
10k 20k
100
1k
10k 20k
f - Frequency - Hz
Figure 15.
Figure 16.
CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
0
-40
PO = 1 W
RL = 8 Ω
AV = 6 dB
BTL
-50
-60
VO = 1 VRMS
RL = 10 kΩ
AV = 6 dB
SE
-20
Crosstalk - dB
Crosstalk - dB
-40
-70
Left to Right
-80
Right to Left
-90
-60
Left to Right
-80
-100
Right to Left
-100
-110
-120
-120
20
100
1k
10k 20k
20
100
1k
f - Frequency - Hz
f - Frequency - Hz
Figure 17.
Figure 18.
10k 20k
9
TPA0232
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SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
SHUTDOWN ATTENUATION
vs
FREQUENCY
SIGNAL-TO-NOISE RATIO
vs
FREQUENCY
0
120
PO = 1 W
RL = 8 Ω
BTL
VI = 1 VRMS
115
SNR - Signal-To-Noise Ratio - dB
RL = 10 kΩ, SE
-40
-60
RL = 32 Ω, SE
-80
-100
110
105
AV = 20 dB
100
95
90
AV = 6 dB
85
RL = 8 Ω, BTL
-120
80
20
100
1k
10k 20k
0
100
f - Frequency - Hz
Figure 19.
Figure 20.
CLOSED LOOP RESPONSE
RL = 8 Ω
AV = 20 dB
BTL
25
90°
0°
10
5
-90°
0
-5
90°
15
Gain - dB
Phase
RL = 8 Ω
AV = 6 dB
BTL
20
φ m - Phase Margin
Gain - dB
15
180°
30
Gain
20
Phase
0°
10
5
Gain
-90°
0
-5
-10
-180°
10
100
1k
10k
f - Frequency - Hz
Figure 21.
10
10k 20k
CLOSED LOOP RESPONSE
180°
30
25
1k
f - Frequency - Hz
100k
1M
-10
-180°
10
100
1k
10k
f - Frequency - Hz
Figure 22.
100k
1M
φ m - Phase Margin
Shutdown Attenuation - dB
-20
TPA0232
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SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
OUTPUT POWER
vs
LOAD RESISTANCE
OUTPUT POWER
vs
LOAD RESISTANCE
3.5
1500
AV = +20 to 0 dB
BTL
1250
PO - Output Power - mW
PO - Output Power - W
3
AV = +14 to 0 dB
SE
2.5
2
10% THD+N
1.5
1
1000
750
500
10% THD+N
250
0.5
1% THD+N
1% THD+N
0
0
0
8
16
24
32
40
48
RL - Load Resistance - Ω
56
64
0
Figure 24.
POWER DISSIPATION
vs
OUTPUT POWER
POWER DISSIPATION
vs
OUTPUT POWER
56
64
0.4
3Ω
1.6
0.35
1.4
PD - Power Dissipation - W
PD - Power Dissipation - W
16
24
32
40
48
RL - Load Resistance - Ω
Figure 23.
1.8
4Ω
1.2
1
0.8
0.6
8Ω
0.4
0.5
1
1.5
PO - Output Power - W
Figure 25.
2
4Ω
0.3
0.25
0.2
8Ω
0.15
0.1
32 Ω
f = 1 kHz
BTL
Each Channel
0.2
0
0
8
f = 1 kHz
BTL
Each Channel
0.05
2.5
0
0
0.1
0.2
0.3
0.4
0.5
0.6
PO - Output Power - W
0.7
0.8
Figure 26.
11
TPA0232
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SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
POWER DISSIPATION
vs
AMBIENT TEMPERATURE
INPUT IMPEDENCE
vs
GAIN
7
90
ΘJA4
5
4
ΘJA3
3
ΘJA1,2
2
1
0
-40 -20
70
60
50
40
30
20
0
20 40 60 80 100 120 140 160
TA - Ambient Temperature - °C
Figure 27.
12
80
ZI - Input Impedance - k
PD - Power Dissipation - W
6
Ω
ΘJA1 = 45.9°C/W
ΘJA2 = 45.2°C/W
ΘJA3 = 31.2°C/W
ΘJA4 = 18.6°C/W
10
-40
-30
-20
-10
0
AV - Gain - dB
Figure 28.
10
20
TPA0232
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SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
Volume Control Characteristics
Table 1. Typical DC Volume Control (1)
VOLUME (Terminal 3)
(1)
(2)
TYPICAL
GAIN of AMPLIFIER
(dB) (2)
VOLTAGE INCREASING
OR FIXED GAIN
(V)
VOLTAGE
DECREASING
(V)
0-0.27
0.16-0
20
0.28-0.37
0.28-0.17
18
0.38-0.48
0.39-0.29
16
0.49-0.58
0.50-0.40
14
0.59-0.69
0.61-0.51
12
0.70-0.80
0.72-0.62
10
0.81-0.91
0.84-0.73
8
0.92-1.02
0.95-0.85
6
1.03-1.13
1.06-0.96
4
1.14-1.24
1.17-1.07
2
1.25-1.35
1.29-1.18
0
1.36-1.46
1.40-1.30
-2
1.47-1.58
1.51-1.41
-4
1.59-1.68
1.62-1.52
-6
1.69-1.79
1.73-1.63
-8
1.80-1.90
1.84-1.74
-10
1.91-2.01
1.96-1.85
-12
2.02-2.12
2.06-1.97
-14
2.13-2.23
2.18-2.07
-16
2.24-2.34
2.29-2.19
-18
2.35-2.45
2.41-2.30
-20
2.46-2.56
2.52-2.42
-22
2.57-2.67
2.62-2.53
-24
2.68-2.78
2.74-2.63
-26
2.79-2.90
2.86-2.75
-28
2.91-3.01
2.97-2.87
-30
3.02-3.12
3.07-2.98
-32
3.13-3.23
3.19-3.08
-34
3.24-3.33
3.29-3.20
-36
3.34-3.44
3.40-3.30
-38
3.45-3.55
3.53-3.41
-40
3.56-5.00
5.00-3.54
-85
Each step is tested at its midpoint and characterized within ±4dB of the specified gain value for VDD =
5 V. For VDD = 4.5 V to 5.5 V, multiply values by 90% and 110%, respectively.
95% of the characterized values lie within ±0.5dB of the specified gain value. Figure 29 shows the
typical behavior of most devices.
13
TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
GAIN HISTOGRAM AT 0 dB
100
Frequency of Occurance − %
90
80
70
60
50
40
30
20
10
Gain − dB
Figure 29. Typical Gain Variance
14
4
3
2
1
0
−1
−2
−3
−4
0
TPA0232
www.ti.com
SLOS286D – NOVEMBER 1999 – REVISED SEPTEMBER 2004
THERMAL INFORMATION
The thermally enhanced PWP package is based on the 24-pin TSSOP, but includes a thermal pad (see
Figure 30) to provide an effective thermal contact between the IC and the PWB.
Traditionally, surface mount and power have been mutually exclusive terms. A variety of scaled-down
TO-220-type packages have leads formed as gull wings to make them applicable for surface-mount applications.
These packages, however, have only two shortcomings: they do not address the very low profile requirements
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