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TPD4E05U06-Q1, TPD1E05U06-Q1
SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
TPDxE05U06-Q1 1 and 4 Channel ESD Protection Diodes for SuperSpeed (Up to 6 Gbps)
Interface
1 Features
•
1
•
•
•
•
•
•
•
•
•
AEC-Q101 Qualified
– Device HBM Classification Level H3B
– Device CDM Classification Level C5
– Device Temperature Range: –40°C to +125°C
IEC 61000-4-2 Level 4 ESD Protection
(See the ESD Ratings—IEC Specification Table)
– ±12-kV Contact Discharge
– ±15-kV Air Gap Discharge
IEC 61000-4-4 EFT Protection
– 80 A (5/50 ns)
IEC 61000-4-5 Surge Protection
– 2.5 A (8/20 µs)
I/O Capacitance 0.42 pF to 0.5 pF (Typical)
DC Breakdown Voltage 6.4 V (Minimum)
Ultra Low Leakage Current 10 nA (Maximum)
Low ESD Clamping Voltage (14 V at 5-A TLP)
Easy Flow-Through Routing Packages
3 Description
The TPDxE05U06-Q1 is a family of unidirectional
Transient Voltage Suppressor (TVS) Electrostatic
Discharge (ESD) protection diodes with ultra-low
capacitance. They are rated to dissipate ESD strikes
above the maximum level specified in the IEC 610004-2 level 4 international standard. The ultra-low
loading capacitance makes these devices ideal for
protecting any high-speed signal applications up to 6
Gbps.
These devices are also available without automotive
qualification: TPDxE05U06.
Device Information(1)
2 Applications
•
Interfaces
– USB 2.0
– USB 3.0
– HDMI 1.4/2.0
– LVDS
– DisplayPort
– SIM Card
PART NUMBER
End Equipment
– Head Unit
– Rear Seat Entertainment
– Telematics
– USB Hub
– Navigation Module
– Media Interface
GND
GND
3
BODY SIZE (NOM)
TPD4E05U06-Q1
USON (10)
2.50 mm × 1.00 mm
TPD1E05U06-Q1
X1SON (2)
0.60 mm x 1.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
TPD4E05U06-Q1 Block Diagram
TPD4E05U06-Q1 Simplified Schematic
TPD4E05U06-Q1
PACKAGE
1
2
4
5
8
D0+
D1+
D1-
D2+
D2-
Connector
HDMI Controller
D0D1+
D1D2+
D2CLK+
CLK-
GND
GND
TPD4E05U06-Q1
3
1
2
4
5
GND
8
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPD4E05U06-Q1, TPD1E05U06-Q1
SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings—AEC Specification .............................
ESD Ratings—IEC Specification ..............................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 8
7.4 Device Functional Modes.......................................... 9
8
Application and Implementation ........................ 10
8.1 Application Information............................................ 10
8.2 Typical Application .................................................. 10
9
Layout ................................................................... 12
9.1 Layout Guidelines ................................................... 12
9.2 Layout Example ...................................................... 12
10 Device and Documentation Support ................. 13
10.1
10.2
10.3
10.4
10.5
10.6
10.7
Documentation Support ........................................
Receiving Notification of Documentation Updates
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
13
13
13
13
13
13
13
11 Mechanical, Packaging, and Orderable
Information ........................................................... 14
4 Revision History
Changes from Revision A (August 2014) to Revision B
Page
•
Added 1-channel (TPD1E05U06-Q1) package ...................................................................................................................... 1
•
Added DPY package information in Thermal Information table ............................................................................................. 4
•
Added DPY package Dynamic resistance in Electrical Characteristics table ........................................................................ 5
•
Added DPY package Line capacitance in Electrical Characteristics table............................................................................. 5
Changes from Revision B (August 2016) to Revision C
•
Page
Changed DPY Package pin configuration in the Pin Configuration and Functions section ................................................... 1
Changes from Original (August 2014) to Revision A
•
2
Page
Added (See the ESD Ratings—IEC Specification Table) to Feature: IEC 61000-4-2 Level 4 ESD Protection ..................... 1
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SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
5 Pin Configuration and Functions
DPY Package
2-Pin X1SON
Top View
I/O
1
2
GND
DQA Package
10-Pin USON
Top View
D1+
1
10
N.C.
D1–
2
9
N.C.
GND
3
8
GND
D2+
4
7
N.C.
D2–
5
6
N.C.
Pin Functions TPD1E05U06-Q1 DPY
PIN
NO.
NAME
TYPE
DESCRIPTION
1
I/O
I/O
ESD Protected Channel (1)
2
GND
Ground
Ground; Connect to ground
(1)
Place as close to the connector as possible.
Pin Functions TPD4E05U06-Q1 DQA
PIN
NO.
NAME
TYPE
DESCRIPTION
1
D1+
I/O
ESD Protected Channel (1)
2
D1–
I/O
ESD Protected Channel (1)
4
D2+
I/O
ESD Protected Channel (1)
5
D2–
I/O
ESD Protected Channel (1)
6, 7, 9, 10
NC
NC
Not Connected; Used for optional straight-through routing. Can be left floating or
grounded
GND
Ground
3, 8
(1)
Ground; Connect to ground
Place as close to the connector as possible.
Copyright © 2014–2017, Texas Instruments Incorporated
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SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
Electrical fast transient
Peak pulse
MAX
UNIT
IEC 61000-4-4 (5/50 ns)
80
A
IEC 61000-4-5 Current (tp – 8/20 µs)
2.5
A
IEC 61000-4-5 Power (tp – 8/20 µs) - TPD4E05U06-Q1 (3)
40
W
IEC 61000-4-5 Power (tp – 8/20 µs) - TPD1E05U06-Q1 (3)
30
W
TA
Operating temperature
–40
125
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltages are with respect to GND unless otherwise noted.
Measured at 25°C
6.2 ESD Ratings—AEC Specification
VALUE
Electrostatic discharge (1)
V(ESD)
(1)
(2)
Human-body model (HBM), per AEC Q100-002 (2)
±8000
Charged-device model (CDM), per AEC Q100-011
±1000
UNIT
V
Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges
into the device.
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 ESD Ratings—IEC Specification
VALUE
IEC 61000-4-2 contact discharge - TPD4E05U06-Q1
V(ESD)
(1)
Electrostatic Discharge
(1)
UNIT
±12000
IEC 61000-4-2 contact discharge - TPD1E05U06-Q1
±12000
IEC 61000-4-2 air-gap discharge
±15000
V
Measured at 25°C, per IEC 61000.4.2 Ed. 2.0 Section 7.2.4.
6.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VIO
Input pin voltage
TA
Operating free-air temperature
MIN
MAX
0
5.5
UNIT
V
–40
125
°C
6.5 Thermal Information
THERMAL METRIC (1)
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
RθJB
TPD1E05U06-Q1
TPD4E05U06-Q1
DPY (X1SON)
DQA (USON)
2 PINS
10 PINS
UNIT
697.3
327
°C/W
471
189.5
°C/W
Junction-to-board thermal resistance
575.9
257.7
°C/W
ψJT
Junction-to-top characterization parameter
175.7
60.9
°C/W
ψJB
Junction-to-board characterization parameter
575.1
257
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
6.6 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
INPUT – OUTPUT RESISTANCE
VRWM
Reverse stand-off voltage
IIO < 10 µA
VBR
Break-down voltage
IIO = 1 mA
VCLAMP
ILEAK
Clamp voltage
Leakage current
IPP = 1 A, TLP, from I/O to GND (1)
10
IPP = 5 A, TLP, from I/O to GND (1)
14
IPP = 1 A, TLP, from GND to I/O (1)
3
IPP = 5 A, TLP, from GND to I/O (1)
7.5
VIO = 2.5 V
DPY package
RDYN
6.4
Dynamic
resistance
DQA package
1
I/O to GND (2)
0.8
GND to I/O (2)
0.7
(2)
0.96
GND to I/O (2)
0.9
I/O to GND
5.5
V
8.7
V
V
10
nA
Ω
CAPACITANCE
CL
VIO = 2.5 V, f = 1 MHz, I/O to
GND
Line capacitance
TPD1E05U06-Q1
DPY package
0.42
TPD4E05U06-Q1
DQA package
0.5
pF
Δ CIO-TO-GND
Variation of input capacitance
GND Pin = 0 V, f = 1 MHz, VBIAS = 2.5 V,
Channel x pin to GND – channel y pin to GND
0.05
0.08
pF
CCROSS
Channel to channel input
capacitance
GND Pin = 0 V, f = 1 MHz, VBIAS = 2.5 V, between
channel pins
0.04
0.08
pF
(1)
(2)
Transition line pulse with 100 ns width, 200 ps rise time.
Extraction of RDYN using least squares fit of TLP characteristics between I = 5 A and I = 10 A.
Copyright © 2014–2017, Texas Instruments Incorporated
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SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
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6.7 Typical Characteristics
3.5
1.0
0.8
3
56
Current
Power
48
2.5
40
2
32
1.5
24
1
16
Current (mA)
0.4
Current (A)
0.2
0.0
±0.2
±0.4
Power (W)
0.6
±0.6
0.5
±0.8
±1.0
±2
0
±1
1
2
3
4
5
6
7
8
9
0
-5
10
Voltage (V)
8
0
5
10
15
20 25
Time (µs)
C001
Figure 1. Current vs Voltage
Current vs Voltage DC Voltage Sweep I-V Curve
30
35
40
45
0
50
D002
Figure 2. Current and Power vs Time
Surge Curve (tp = 8/20 µs), Pin I/O to GND
30
35
30
25
20
20
Current (A)
Current (A)
25
15
10
15
10
5
5
0
-5
0
0
5
10
15
20
25
Voltage (V)
30
35
40
0
5
Figure 3. Current vs Voltage
Positive TLP Plot I/O to GND
200
Votlage (V)
Current (pA)
250
150
100
50
0
±20
0
20
40
60
80
100
Temperature (ƒC)
Figure 5. Leakage Current vs Temperature
6
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15
20
25
Voltage (V)
30
35
40
D001
Figure 4. Current vs Voltage
Negative TLP Plot I/O to GND
300
±40
10
D001
120
120
110
100
90
80
70
60
50
40
30
20
10
0
-10
0
25
50
C004
75
100
125
Time (ns)
150
175
200
D005
Figure 6. Voltage vs Time 8-kV IEC Waveform
Copyright © 2014–2017, Texas Instruments Incorporated
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SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
10
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
0
±1
Insertion Loss (dB)
Voltage (V)
Typical Characteristics (continued)
±2
±3
±4
±5
0
25
50
75
100
125
Time (ns)
150
175
Figure 7. Voltage vs Time –8-kV IEC Waveform
Copyright © 2014–2017, Texas Instruments Incorporated
200
±6
100k
1M
10M
100M
1G
1000M
10G
10000M
Frequency (Hz)
D006
C009
Figure 8. Insertion Loss vs Frequency
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TPD4E05U06-Q1, TPD1E05U06-Q1
SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
www.ti.com
7 Detailed Description
7.1 Overview
The TPDxE05U06-Q1 is a family of unidirectional TVS ESD protection diode arrays with ultra-low capacitance
between 0.42 pF and 0.5 pF. They are rated to dissipate ESD strikes above the maximum level specified in the
IEC 61000-4-2 level 4 international standard (12-kV contact, 15-kV air gap). The ultra-low loading capacitance
makes them ideal for protecting any high-speed signal applications up to 6 Gbps.
7.2 Functional Block Diagram
D1+
D1-
D2+
D2-
GND
Figure 9. TPD4E05U06-Q1 Block Diagram
I/O
GND
Figure 10. TPD1E05U06-Q1 Block Diagram
7.3 Feature Description
7.3.1 AEC-Q101 Qualification
These devices are qualified to AEC-Q101 standards. They pass HBM H3B (±8 kV) and CDM C5 (±1 kV) ESD
ratings and are qualified to operate from –40°C to +125°C.
7.3.2 IEC 61000-4-2 Level 4 ESD Protection
The I/O pins can withstand ESD events up to ±12-kV contact and ±15-kV air. An ESD-surge clamp diverts the
current to ground.
7.3.3 IEC 61000-4-4 EFT Protection
The I/O pins can withstand an electrical fast transient burst of up to 80 A (5/50 ns waveform, 4 kV with 50-Ω
impedance). An ESD-surge clamp diverts the current to ground.
8
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SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
Feature Description (continued)
7.3.4 IEC 61000-4-5 Surge Protection
The I/O pins can withstand surge events up to 2.5 A and 40 W (8/20 µs waveform). An ESD-surge clamp diverts
this current to ground.
7.3.5 I/O Capacitance
The capacitance between each I/O pin to ground is 0.5 pF. These capacitances support data rates up to 5 Gbps.
7.3.6 DC Breakdown Voltage
The DC breakdown voltage of each I/O pin is a minimum of 6.4 V. This ensures that sensitive equipment is
protected from surges above the reverse standoff voltage of 5 V.
7.3.7 Ultra-Low Leakage Current
The I/O pins feature an ultra-low leakage current of 10 nA (Maximum) with a bias of 2.5 V.
7.3.8 Low ESD Clamping Voltage
The I/O pins feature an ESD clamp that is capable of clamping the voltage to 10 V (IPP = 1 A).
7.3.9 Easy Flow-Through Routing
The layout of this device makes it simple and easy to add protection to an existing layout. The packages offers
flow-through routing, requiring minimal modification to an existing layout.
7.4 Device Functional Modes
The TPDxE05U06-Q1 are passive integrated circuits that triggers when voltages are above VBR or below the
lower diodes Vf (–0.6 V). During ESD events, voltages as high as ±15 kV (air) can be directed to ground via the
internal diode network. When the voltages on the protected line fall below the trigger levels of TPDxE05U06-Q1
(usually within 10s of nano-seconds) the devices reverts to passive.
Copyright © 2014–2017, Texas Instruments Incorporated
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8 Application and Implementation
8.1 Application Information
The TPD4E05U06-Q1 is a diode type TVS which is typically used to provide a path to ground for dissipating ESD
events on hi-speed signal lines between a human interface connector and a system. As the current from ESD
passes through the TVS, only a small voltage drop is present across the diode. This is the voltage presented to
the protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a safe level for the protected
IC.
8.2 Typical Application
TPD4E05U06DQA-Q1
HOT PLUG 1
UTILITY 2
D2+
1
10
D2-
2
9
3
8
4
7
5
6
UTI_CON
TMDS D2+ 3
D2-
5-V Source
D1+
D1+
TMDS_GND 4
D2+
D1-
D1-
TMDS D2- 5
HDMI Connector
TMDS D1+ 6
TPD4E05U06DQA-Q1
TMDS_GND 7
TMDS D1- 8
D0+
1
10
D0-
2
9
D0+
D0-
TMDS D0+ 9
TMDS_GND 10
CLK+
TMDS D0- 11
CLK-
3
8
4
7
5
6
CLK+
CLK-
TMDS CLK+ 12
TMDS_GND 13
TPD5S116YFF
TMDS CLK- 14
CEC 15
CEC_CON
DDC/CEC GND 16
SCL_CON
SCL 17
SDA_CON
SDA 18
EN
SCL_SYS
SDA_SYS
VCCA
5V_SYS
5V_CON
P 5V0 19
GND 20
HPD_SYS
HPD_CON
UTI_CON
0.1 µF
HDMI Controller
CEC_SYS
GND
0.1 µF
UTI_CON
Copyright © 2016, Texas Instruments Incorporated
Figure 11. HDMI 1.4 Application
8.2.1 Design Requirements
For this design example, two TPD4E05U06-Q1 devices, and a TPD5S116 are being used in an HDMI 1.4
application. This provides a complete port protection scheme.
Given the HDMI 1.4 application, the parameters in Table 1 are known.
Table 1. Design Parameters
DESIGN PARAMETER
VALUE
Signal range on pins 1, 2, 4, or 5
0 V to 5 V
Operating frequency
1.7 GHz
8.2.2 Detailed Design Procedure
To begin the design process, some parameters must be decided upon; the designer needs to know the following:
• Signal range on all the protected lines
• Operating frequency
10
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8.2.2.1 Signal Range on Pin 1, 2, 4, or 5
The TPD4E05U06-Q1 has 4 identical protection channels for signal lines. The symmetry of the device provides
flexibility when selecting which of the 4 I/O channels protect which signal lines. Any I/O will support a signal
range of 0 to 5.5 V.
8.2.2.2 Operating Frequency
The TPD4E05U06-Q1 has a capacitance of 0.5 pF (Typical), supporting HDMI 1.4 data rates.
8.2.3 Application Curve
Figure 12. 3.4 Gbps HDMI Eye Diagram
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9 Layout
9.1 Layout Guidelines
•
•
•
The optimum placement is as close to the connector as possible.
– EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces,
resulting in early system failures.
– The PCB designer needs to minimize the possibility of EMI coupling by keeping any unprotected traces
away from the protected traces which are between the TVS and the connector.
Route the protected traces as straight as possible.
Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded
corners with the largest radii possible.
– Electric fields tend to build up on corners, increasing EMI coupling.
9.2 Layout Example
This application is typical of an HDMI 1.4 layout.
Clk+
Clk-
D0+
D0-
D1+
D1-
D2+
D2-
VIA to GND Plane
GND
D0-
D0+
NC
GND
NC
NC
NC
D1+
D1-
NC
GND
D0+
GND
NC
NC
D1+
NC
D0-
D1-
Figure 13. TPD4E05U06-Q1 Layout
12
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10 Device and Documentation Support
10.1 Documentation Support
10.1.1 Related Documentation
For related documentation see the following:
• TPD1E05U06-Q1 Evaluation Module User's Guide
• Reading and Understanding an ESD Protection Datasheet
• ESD Layout Guide
• TPD4E05U06DQA EVM User's Guide
10.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
10.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPD4E05U06-Q1
Click here
Click here
Click here
Click here
Click here
TPD1E05U06-Q1
Click here
Click here
Click here
Click here
Click here
10.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
10.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
10.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
10.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
Copyright © 2014–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TPD4E05U06-Q1 TPD1E05U06-Q1
13
TPD4E05U06-Q1, TPD1E05U06-Q1
SLVSCO7C – AUGUST 2014 – REVISED SEPTEMBER 2017
www.ti.com
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
14
Submit Documentation Feedback
Copyright © 2014–2017, Texas Instruments Incorporated
Product Folder Links: TPD4E05U06-Q1 TPD1E05U06-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPD1E05U06QDPYRQ1
ACTIVE
X1SON
DPY
2
10000
RoHS & Green
NIPDAU
TPD4E05U06QDQARQ1
ACTIVE
USON
DQA
10
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
4O
Level-2-260C-1 YEAR
-40 to 125
(BRH, CQ1)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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