TPL5110-Q1
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TPL5110-Q1 AEC-Q100 Nano-Power System Timer for Power Gating
1 Features
3 Description
•
•
The TPL5110-Q1 Nano Timer is a low power, AECQ100 qualified timer with an integrated MOSFET
driver ideal for power gating in duty cycled or battery
powered applications. Consuming only 35nA, the
TPL5110-Q1 can enable the power supply line and
drastically reduce the overall system stand by current
during the sleep time. Such power savings enable
the use of significantly smaller batteries making it
well suited for energy harvesting or wireless sensor
applications. The TPL5110-Q1 provides selectable
timing intervals from 100ms to 7200s and is
designed for power gating applications. In addition,
the TPL5110-Q1 has a unique One-shot feature
where the timer will only power the MOSFET for one
cycle. The TPL5110-Q1 is available in a 6-pin SOT23
package.
•
•
•
•
•
•
•
•
•
Qualified for automotive applications
AEC-Q100 qualified with the following results:
– Device temperature grade 1: –40°C to 125°C
ambient operating temperature range
– Device HBM ESD classification level 2
– Device CDM ESD classification level C5
Functional Safety-Capable
– Documentation available to aid functional safety
system design
Current consumption of 35 nA (typical) at 2.5 V
Supply voltage from 1.8 V to 5.5 V
Selectable time intervals: 100 ms to 7200 s
Timer accuracy: 1% (typical)
Resistor selectable time interval
Manual MOSFET power on
One-shot feature
TPL5x10Q family of AEC-Q100 nano-power
system timers:
– TPL5010-Q1:Watchdog function with
programmable delay range
– TPL5110-Q1: MOS-driver with programmable
delay range and one-shot feature
Device Information(1)
PART NUMBER
TPL5110-Q1
(1)
PACKAGE
SOT23 (6)
BODY SIZE (NOM)
3.00 mm x 3.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
µC
VOUT
TPL5110-Q1
VIN
VDD
Battery
VDD
EN/
ONE_SHOT
POWER MANAGEMENT
GND
DRV
-
Electric vehicles
Battery-powered systems
Clutch actuator circuit
Car door handle circuit
Smart key
Remote current sensor
Intruder detection
+
•
•
•
•
•
•
•
DELAY/
M_DRV
GND
DONE
GPIO
REXT
GND
Simplified Application Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPL5110-Q1
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................4
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 Recommended Operating Ratings..............................5
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................6
6.6 Timing Requirements.................................................. 7
6.7 Typical Characteristics................................................ 8
7 Detailed Description........................................................9
7.1 Overview..................................................................... 9
7.2 Functional Block Diagram........................................... 9
7.3 Feature Description.....................................................9
7.4 Device Functional Modes............................................9
7.5 Programming.............................................................11
8 Application and Implementation.................................. 17
8.1 Application Information............................................. 17
8.2 Typical Application.................................................... 17
9 Power Supply Recommendations................................18
10 Layout...........................................................................19
10.1 Layout Guidelines................................................... 19
10.2 Layout Example...................................................... 19
11 Device and Documentation Support..........................20
11.1 Receiving Notification of Documentation Updates.. 20
11.2 Support Resources................................................. 20
11.3 Trademarks............................................................. 20
11.4 Electrostatic Discharge Caution.............................. 20
11.5 Glossary.................................................................. 20
12 Mechanical, Packaging, and Orderable
Information.................................................................... 21
4 Revision History
Changes from Revision * (February 2017) to Revision A (September 2021)
Page
• Added Functional Safety bullets to the Features section....................................................................................1
2
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Device Comparison Table
Table 5-1. TPL5x10Q Family of AEC-Q100 Nano- Power System Timers
PART NUMBER
SUPPLY CURRENT (Typ)
SPECIAL FEATURES
Low Power Timer
TPL5010-Q1
35 nA
Watchdog Function
Programmable Delay Range
Manual Reset
Low Power Timer
MOS-Driver
TPL5110-Q1
35 nA
Programmable Delay Range
Manual Reset
One-Shot Feature
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5 Pin Configuration and Functions
TPL5110-Q1
1
VDD
EN/
ONE_SHOT
6
2
GND
DRV
5
3
DELAY/
M_DRV
DONE
4
Figure 5-1. SOT-23 6-Lead DDC Top View
Table 5-1. Pin Functions
PIN
(1)
4
TYPE(1)
DESCRIPTION
APPLICATION INFORMATION
NO.
NAME
1
VDD
P
Supply voltage
2
GND
G
Ground
3
DELAY/
M_DRV
I
Time interval set and manual
MOSFET Power ON
Resistance between this pin and GND is used to
select the time interval. The manual MOSFET power
ON switch is also connected to this pin.
4
DONE
I
Logic Input for watchdog
functionality
Digital signal driven by the µC to indicate successful
processing.
5
DRV
O
Power Gating output signal
generated every tIP
The Gate of the MOSFET is connected to this pin.
When DRV = LOW, the MOSFET is ON.
6
EN/
ONE_SHOT
I
Selector of mode of operation
When EN/ONE_SHOT = HIGH, the TPL5110-Q1
works as a TIMER. When EN/ONE_SHOT = LOW,
the TPL5110-Q1 turns on the MOSFET one time for
the programmed time interval. The next power on of
the MOSFET is enabled by the manual power ON.
G= Ground, P= Power, O= Output, I= Input.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage (VDD-GND)
Input voltage at any
pin(3)
MIN
MAX
UNIT
-0.3
6.0
V
-0.3
VDD + 0.3
V
Input Current on any pin
-5
+5
mA
Storage temperature, Tstg
-65
150
°C
150
°C
Junction temperature, TJ(2)
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
The maximum power dissipation is a function of TJ(MAX), θJA, and the ambient temperature, TA. The maximum allowable power
dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC
board.
The voltage between any two pins should not exceed 6V.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human Body Model, per AEC
Q100-002(1)
±2000
Charged-device model (CDM), per AEC Q100-011
±750
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with ANSI/ESDA/JADEC JS-001 specification.
6.3 Recommended Operating Ratings
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
Supply Voltage (VDD-GND)
1.8
5.5
V
Temperature Range
–40
125
°C
6.4 Thermal Information
TPL5110-Q1
THERMAL METRIC(1)
SOT-23
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
163
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
26
°C/W
RθJB
Junction-to-board thermal resistance
57
°C/W
ψJT
Junction-to-top characterization parameter
7.5
°C/W
ψJB
Junction-to-board characterization parameter
57
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
Specifications are for TA= 25°C, VDD-GND=2.5 V, unless otherwise stated.(1)
PARAMETER
TEST CONDITIONS
MIN(2)
TYP(3)
MAX(2)
UNIT
POWER SUPPLY
IDD
Supply current(4)
Operation mode
35
50
nA
Digital conversion of external resistance
(Rext)
200
400
µA
TIMER
tIP
Time interval Period(5)
Time interval Setting
Accuracy(7)
Time interval Setting Accuracy over
supply voltage
tOSC
1650 selectable Time Min time interval
intervals
Max time interval
Excluding the precision of Rext
s
±25
–0.5%
ppm/V
0.5%
Oscillator Accuracy over
temperature(5)
–40°C ≤ TA≤ 125°C
150
ppm/°C
Oscillator Accuracy over supply
voltage(5)
1.8V ≤ VDD ≤ 5.5V
±0.4
%/V
Oscillator Accuracy over life time(6)
tDONE
Minimum DONE Pulse width (5)
tDRV
DRV Pulse width
t_Rext
ms
±0.6%
1.8V ≤ VDD ≤ 5.5V
Oscillator Accuracy
100
7200
±0.24%
100
DONE signal not received
ns
tIP–50ms
Time to convert Rext (5)
100
ms
DIGITAL LOGIC LEVELS
(1)
(2)
(3)
(4)
(5)
(6)
(7)
6
VIH
Minimum Logic High Threshold
DONE pin
0.7xVDD
V
VIL
Maximum Logic Low Threshold
DONE pin
0.3xVDD
V
VOH
Logic output High Level DRV pin
VOL
Logic output Low Level DRV pin
VIHM_DRV
Minimum Logic High Threshold
DELAY/M_DRV pin (5)
Iout = 100 µA
VDD–0.3
V
Iout = 1 mA
VDD–0.7
V
Iout = –100 µA
0.3
V
Iout = –1 mA
0.7
V
1.5
V
Electrical Characteristics Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions
result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the
electrical tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits
beyond which the device may be permanently degraded, either mechanically or electrically.
Limits are specified by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are specified through
correlations using statistical quality control (SQC) method.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
The supply current excludes load and pull-up resistor current. Input pins are at GND or VDD.
This parameter is specified by design and/or characterization and is not tested in production.
Operational life time test procedure equivalent to10 years.
The accuracy for time interval settings below 1second is ±100ms.
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6.6 Timing Requirements
MIN(3)
DRV(2)
trDRV
Rise Time
tfDRV
Fall Time DRV(2)
tDDONE
DONE to DRV delay
50
ns
Capacitive load 50 pF
50
ns
100
ns
Min
tDB
(1)
(2)
(3)
(4)
Minimum Valid manual MOSFET
Power ON
MAX(3) UNIT
Capacitive load 50 pF
delay(1)
Max delay (1)
tM_DRV
NOM(4)
tDRV
Observation time 30ms
De-bounce manual MOSFET Power
ON
20
ms
20
ms
from DRV falling edge.
This parameter is specified by design and/or characterization and is not tested in production.
Limits are specified by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are specified through
correlations using statistical quality control (SQC) method.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
VDD
EN/
ONE_SHOT
ttDDONEt
tDONE
DONE
t tDRVt
trDRV
t tDRV + tDBt
t tIPt
DRV
tfDRV
t tIPt
tR_EXT
DELAY/
M_DRV
ttM_DRV
Figure 6-1. TPL5110-Q1 Timing
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6.7 Typical Characteristics
100
100
TA= -40°C
TA= 25°C
TA= 70°C
TA= 105°C
TA = 125°C
90
80
Supply current (nA)
Supply current (nA)
80
70
60
50
70
60
50
40
40
30
30
20
1.5
1.9
2.3
2.7
3.1
3.5
3.9
4.3
4.7
5.1
Supply Voltage (V)
20
-40
5.5
-25
-10
5
20
50
65
80
95
110
125
110
125
.
Figure 6-2. IDD vs. VDD
Figure 6-3. IDD vs. Temperature
2
2
TA= -40°C
TA= 25°C
TA= 70°C
TA= 105°C
TA= 125°C
VDD= 1.8V
VDD= 2.5V
VDD= 3.3V
VDD= 5.5V
1.5
Oscillator accuracy (%)
1.5
1
0.5
0
-0.5
1
0.5
0
-0.5
-1
1.5
1.9
2.3
2.7
3.1
3.5
3.9
4.3
4.7
5.1
-1
-40
5.5
-25
-10
5
20
Supply Voltage (V)
A.
35
Temperature (°C)
D001
.
Oscillator accuracy (%)
VDD= 1.8V
VDD= 2.5V
VDD= 3.3V
VDD= 5.5V
90
35
50
65
80
95
Temperature (°C)
.
.
Figure 6-4. Oscillator Accuracy vs. VDD
Figure 6-5. Oscillator Accuracy vs. Temperature
1000
40%
POR
REXT READING
35%
30%
10
Frequency
Supply current (μA)
100
1
TIMER MODE
0.1
25%
20%
15%
10%
5%
0.01
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
Time (s)
.
.
0.9
1
0
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
Accuracy (%)
number of observations >20000
Figure 6-6. IDD vs. Time
8
0.8
1s < tIP ≤ 7200s
Figure 6-7. Time Interval Setting Accuracy
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7 Detailed Description
7.1 Overview
The TPL5110-Q1 is a timer with power gating feature. It is ideal for use in power-cycled applications and
provides selectable timing from 100ms to 7200s.
Once configured in timer mode (EN/ONE_SHOT= HIGH) the TPL5110-Q1 periodically sends out a DRV signal to
a MOSFET to turn on the µC. If the µC replies with a DONE signal within the programmed time interval (tDRV) the
TPL5110-Q1 turns off the µC, otherwise the TPL5110-Q1 keeps the µC in the on state for a time equal to tDRV.
The TPL5110-Q1 can work also in a one-shot mode (EN/ONE_SHOT= LOW). In this mode the DRV signal is
sent out just one time at the power on of the TPL5110-Q1 to turn on the µC. If the µC replies with a DONE signal
within the programmed time interval (tDRV) the TPL5110-Q1 turns off the µC, otherwise the TPL5110-Q1 keeps
the µC in the on state for a time equal to tDRV.
7.2 Functional Block Diagram
VDD
EN/
ONE_SHOT
LOW FREQUENCY
OSCILLATOR
FREQUENCY
DIVIDER
LOGIC
CONTROL
DRV
DONE
DELAY/
M_DRV
DECODER
&
MANUAL RESET
DETECTOR
GND
7.3 Feature Description
The TPL5110-Q1 implements a periodical power gating feature or one shot power gating according to the
EN/ONE_SHOT voltage. A manual MOSFET Power ON function is realized by momentarily pulling the DELAY/
M_DRV pin to VDD.
7.3.1 DRV
The gate of the MOSFET is connected to the DRV pin. When DRV= LOW, the MOSFET is turned ON. The pulse
generated at DRV is equal to the selected time interval period, minus 50ms. It is shorter in the case of a DONE
signal received from the µC. If the DONE signal is not received within the programmed time interval (minus
50ms), the DRV signal will be high for the last 50ms of the time interval in order to turn off the MOSFET before
the next cycle starts.
The default value (after resistance reading) is HIGH. The signal is sent out from the TPL5110-Q1 when the
programmed time interval starts. When the DRV is LOW, the manual power ON signal is ignored.
7.3.2 DONE
The DONE pin is driven by a µC to signal that the µC is working properly. The TPL5110-Q1 recognizes a valid
DONE signal as a low to high transition; if two or more DONE signals are received within the time interval, only
the first DONE signal is processed. The minimum DONE signal pulse length is 100ns. When the TPL5110-Q1
receives the DONE signal it asserts DRV logic HIGH.
7.4 Device Functional Modes
7.4.1 Start-Up
During start-up, after POR, the TPL5110-Q1 executes a one-time measurement of the resistance attached to the
DELAY/M_DRV pin in order to determine the desired time interval for DRV. This measurement interval is tR_EXT.
During this measurement a constant current is temporarily flowing into REXT.
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Once the reading of the external resistance is completed the TPL5110-Q1 enters automatically in one of the 2
modes according to the EN/ONE_SHOT value. The EN/ONE_SHOT pin must be hard wired to GND or VDD
according to the required mode of operation.
ttIPt
ttIPt
ttDRVt
DRV
FORCED
DRV RISING
MISSED
DONE
DONE
EN/
ONE_SHOT
DELAY/
M_DRV
POR
RESISTANCE
READING
Figure 7-1. Start-Up - Timer Mode
7.4.2 Timer Mode
During timer mode (EN/ONE_SHOT = HIGH), the TPL5110-Q1 asserts periodic DRV pulses according to the
programmed time interval. The length of the DRV pulses is set by the receiving of a DONE pulse from the uC.
See Figure 7-1.
7.4.3 One-Shot Mode
During one-shot mode (EN/ONE_SHOT = LOW), the TPL5110-Q1 generates just one pulse at the DRV pin
which lasts according to the programmed time interval. In one-shot mode, other DRV pulses can be triggered
using the DELAY/M_DRV pin. If a valid manual power ON occurs when EN/ONE_SHOT is LOW, the TPL5110Q1 generates just one pulse at the DRV pin. The duration of the pulse is set by the programmed time interval.
Also in this case, if a DONE signal is received within the programmed time interval (minus 50ms), the MOSFET
connected to the DRV pin is turned off. See Figure 7-2 and Figure 7-3.
ttIPt
DRV
DONE
EN/
ONE_SHOT
DELAY/
M_DRV
POR
RESISTANCE
READING
Figure 7-2. Start-Up One-Shot Mode, (DONE Received Within tIP)
10
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ttIPt
ttDRVt
DRV
FORCED
DRV RISING
MISSED
DONE
DONE
EN/
ONE_SHOT
DELAY/
M_DRV
POR
RESISTANCE
READING
Figure 7-3. Start-Up One-Shot Mode, (No DONE Received Within tIP)
7.5 Programming
7.5.1 Configuring the Time Interval with the DELAY/M_DRV Pin
The time interval between 2 adjacent DRV pulses (falling edges, in timer mode) is selectable through an external
resistance (REXT) between the DELAY/M_DRV pin and ground. The resistance (REXT) must be in the range
between 500Ω and 170kΩ. At least a 1% precision resistance is recommended. See section Section 7.5.3 on
how to set the time interval using REXT.
7.5.2 Manual MOSFET Power ON Applied to the DELAY/M_DRV Pin
If VDD is connected to the DELAY/M_DRV pin, the TPL5110-Q1 recognizes this as a manual MOSFET Power
ON condition. In this case the time interval is not set. If the manual MOSFET Power ON is asserted during the
POR or during the reading procedure, the reading procedure is aborted and is re-started as soon as the manual
MOSFET Power ON switch is released. A pulse on the DELAY/M_DRV pin is recognized as a valid manual
MOSFET Power ON only if it lasts at least 20ms (observation time is 30ms). The manual MOSFET Power ON
may be implemented using a switch (momentary mechanical action).
If the DRV is already LOW (MOSFET ON) the manual MOSFET Power ON is ignored.
ttIPt
ttIPt
DRV
DONE
EN/
ONE_SHOT
ttM_DRVt
ttDBt
ttM_DRVt
ttM_DRVt
DELAY/
M_DRV
VALID M_DRV
NOT VALID M_DRV
IGNORED M_DRV
DRV ALREADY LOW
Figure 7-4. Manual MOSFET Power ON in Timer Mode
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ttIPt
DRV
DONE
EN/
ONE_SHOT
ttM_DRVt
ttDBt
ttM_DRVt
DELAY/
M_DRV
VALID M_DRV
NOT VALID M_DRV
Figure 7-5. Manual MOSFET Power ON in One-Shot Mode
7.5.2.1 DELAY/M_DRV
A resistance in the range between 500Ω and 170kΩ must to be connected to the DELAY/M_DRV pin in order
to select a valid time interval. At the POR and during the reading of the resistance, the DELAY/M_DRV is
connected to an analog signal chain through a mux. After the reading of the resistance, the analog circuit is
switched off and the DELAY/M_DRV is connected to a digital circuit.
In this state, a logic HIGH applied to the DELAY/M_DRV pin is interpreted by the TPL5110-Q1 as a manual
power ON. The manual power ON detection is provided with a de-bounce feature (on both edges) which makes
the TPL5110-Q1 insensitive to the glitches on the DELAY/M_DRV.
The M_DRV must stay high for at least 20ms to be valid. Once a valid signal at DELAY/M_DRV is understood
as a manual power on, the DRV signal will be asserted in the next 10ms. Its duration will be according to the
programmed time interval (minus 50ms), or less if the DONE is received.
A manual power ON signal resets all the counters. The counters will restart as soon as a valid manual power ON
signal is recognized and the signal at DELAY/M_DRV pin is asserted LOW. Due to the asynchronous nature of
the manual power ON signal and its arbitrary duration, the LOW status of the DRV signal may be affected by an
uncertainty of about ±5ms.
An extended assertion of a logic HIGH at the DELAY/M_DRV pin will turn on the MOSFET for a time longer than
the programmed time interval. DONE signals received while the DELAY/M_DRV is HIGH are ignored. If the DRV
is already LOW (MOSFET ON) the manual power ON is ignored.
7.5.2.2 Circuitry
The manual Power ON may be implemented using a switch (momentary mechanical action). The TPL5110-Q1
offers 2 possible approaches according to the power consumption constraints of the application.
12
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µC
VOUT
TPL5110-Q1
VIN
VDD
GND
DRV
+
Battery
VDD
EN/
ONE_SHOT
POWER MANAGEMENT
-
DELAY/
M_DRV
DONE
GPIO
REXT
GND
GND
Figure 7-6. Manual MOSFET Power ON with SPST Switch
For use cases that do not require the lowest power consumption, using a single pole single throw switch may
offer a lower cost solution. The DELAY/M_DRV pin may be directly connected to VDD with REXT in the circuit.
The current drawn from the supply voltage during the manual power ON is given by VDD/REXT.
µC
VOUT
TPL5110-Q1
VIN
EN/
ONE_SHOT
GND
DRV
+
Battery
VDD
VDD
POWER MANAGEMENT
-
DELAY/
M_DRV
DONE
GPIO
REXT
GND
GND
Figure 7-7. Manual MOSFET Power ON with SPDT Switch
The manual MOSFET Power ON function may also be asserted by switching DELAY/M_DRV from REXT to VDD
using a single pole double throw switch, which will provide a lower power solution for the manual power ON,
because no current flows.
7.5.3 Selection of the External Resistance
In order to set the time interval, the external resistance REXT is selected according the following formula:
R EXT
§
100 ¨
¨
©
b
b 2 4 a c 100 T
2a
·
¸
¸
¹
(1)
Where:
•
•
•
T is the desired time interval in seconds.
REXT is the resistance value to use in Ω.
a,b,c are coefficients depending on the range of the time interval.
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Product Folder Links: TPL5110-Q1
13
TPL5110-Q1
www.ti.com
SNAS681A – FEBRUARY 2017 – REVISED SEPTEMBER 2021
Table 7-1. Coefficients for Equation 1
Time Interval
Range (s)
SET
a
b
c
1
1
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