TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
DUAL CHANNEL PRECISION ADJUSTABLE CURRENT-LIMITED POWER SWITCH
Check for Samples: TPS2561-Q1
FEATURES
DESCRIPTION
•
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•
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•
•
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The TPS2561-Q1 is a dual-channel power-distribution
switch intended for applications where precision
current limiting is required or heavy capacitive loads
and short circuits are encountered. These devices
offer a programmable current-limit threshold between
250 mA and 2.8 A (typ) per channel through an
external resistor. The power-switch rise and fall times
are controlled to minimize current surges during turn
on or off.
1
2
Qualified for Automotive Applications
Two Separate Current Limiting Channels
Meets USB Current-Limiting Requirements
Adjustable Current Limit, 250 mA–2.8 A (typ)
± 7.5% Current-Limit Accuracy at 2.8 A
Fast Overcurrent Response - 3.5-μS (typ)
Two 44-mΩ High-Side MOSFETs
Operating Range: 2.5 V to 6.5 V
2-μA Maximum Standby Supply Current
Built-in Soft-Start
15 kV or 8 kV System-Level ESD Capable
UL Listed – File No. E169910
CB and Nemko Certified
TPS2561-Q1
DRC PACKAGE
(TOP VIEW)
GND
IN
IN
EN1
EN2
1
2
3
4
5
PAD
10
9
8
7
6
Each channel of the TPS2561-Q1 device limits the
output current to a safe level by switching into a
constant-current mode when the output load exceeds
the current-limit threshold. The FAULTx logic output
for each channel independently asserts low during
overcurrent and over temperature conditions.
TPS2561-Q1
2.5 V – 6.5 V
FAULT1
OUT1
OUT2
ILIM
FAULT2
ENx = Active Low for the TPS2560
ENx = Active High for the TPS2561-Q1
2x RFAULT
100 kΩ
Fault Signal
Fault Signal
Control Signal
Control Signal
0.1 μF
IN
IN
VOUT1
OUT1
OUT2
ILIM
FAULT1
FAULT2 GND
EN1
EN2
PowerPAD
VOUT2
RILIM
2x CLOAD
Figure 1. Typical Application as USB Power Switch
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
TA
(2)
PACKAGE
–40°C to 125°C
(1)
(2)
SON - DRC
ORDERABLE PART NUMBER
TOP-SIDE MARKING
TPS2561QDRCRQ1
PXPQ
Reel of 3000
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Maximum ambient temperature is a function of device junction temperature and system level considerations, such as power dissipation
and board layout. See dissipation rating table and recommended operating conditions for specific information related to these devices.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted (1)
(2)
Voltage range on IN, OUTx, ENx or ENx, ILIM, FAULTx
Voltage range from IN to OUTx
Continuous output current
ILIM source current
(2)
(3)
(4)
V
25
mA
Internally Limited
mA
HBM
2
kV
CDM
1000
V
8/15
kV
–40 to 125 (4)
°C
ESD – system level (contact/air) (3)
(1)
V
–7 to 7
See the Dissipation Rating Table
Continuous FAULTx sink current
TJ
UNIT
Internally Limited
Continuous total power dissipation
ESD
VALUE
–0.3 to 7
Maximum junction temperature
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltages are referenced to GND unless otherwise noted.
Surges per EN61000-4-2, 1999 applied between USB and output ground of the TPS2561EVM (HPA424) evaluation module
(documentation available on the web.) These were the test level, not the failure threshold.
Ambient over temperature shutdown threshold
DISSIPATION RATING TABLE
(1)
(2)
2
BOARD
PACKAGE
THERMAL RESISTANCE (1)
θJA
THERMAL RESISTANCE
θJC
TA ≤ 25°C
POWER
RATING
High-K (2)
DRC
41.6°C/W
10.7°C/W
2403 mW
TM
Mounting per the PowerPAD Thermally Enhanced Package application report (SLMA002)
The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
RECOMMENDED OPERATING CONDITIONS
VIN
Input voltage, IN
VENx
V/ENx
Enable voltage
VIH
High-level input voltage on ENx or ENx
VIL
Low-level input voltage on ENx or ENx
IOUTx
Continuous output current per channel, OUTx
Operating virtual junction temperature
RILIM
Recommended resistor limit range
MAX
2.5
6.5
UNIT
V
0
6.5
V
1.1
V
0.66
0
Continuous FAULTx sink current
TJ
MIN
2.5
A
mA
0
10
–40
125
°C
20
187
kΩ
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, V/ENx = 0 V, or VENx = VIN (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
MIN
TYP
MAX
44
50
UNIT
POWER SWITCH
rDS(on)
Static drain-source on-state resistance per
channel, IN to OUTx (2)
tr
Rise time, output (2)
tf
Fall time, output (2)
TJ = 25 °C
–40 °C ≤TJ ≤125 °C
79
VIN = 6.5 V
VIN = 2.5 V
VIN = 6.5 V
CLx = 1 μF, RLx = 100 Ω,
(see Figure 2)
VIN = 2.5 V
2
3
4
1
2
3
0.6
0.8
1
0.4
0.6
0.8
mΩ
ms
ENABLE INPUT EN OR EN
Enable pin turn on/off threshold
0.66
IEN
Input current
ton
Turn-on time (2)
toff
Turn-off time (2)
1.1
55 (3)
Hysteresis
VENx = 0 V or 6.5 V, V/ENx = 0 V or 6.5 V
–0.5
CLx = 1 μF, RLx = 100 Ω, (see Figure 2)
V
mV
0.5
μA
9
ms
6
ms
CURRENT LIMIT
RILIM = 20 kΩ
IOS
tIOS
(1)
(2)
(3)
Current-limit threshold per channel (Maximum DC output current IOUTx
delivered to load) and Short-circuit current, OUTx connected to GND
Response time to short circuit
VIN = 5.0 V (see Figure 3)
2590
2800
3005
RILIM = 61.9 kΩ
800
900
1005
RILIM = 100 kΩ
470
560
645
3.5 (3)
mA
μs
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
Not production tested.
These parameters are provided for reference only, and do not constitute part of TI's published specifications for purposes of TI's product
warranty.
Copyright © 2011–2012, Texas Instruments Incorporated
3
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating conditions, V/ENx = 0 V, or VENx = VIN (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
IIN_off
Supply current, low-level output
0.1
2
μA
RILIM = 20 kΩ
100
125
μA
RILIM = 100 kΩ
85
110
μA
0.01
1
μA
2.35
2.45
VIN = 6.5 V, No load on OUTx, V ENx = 6.5 V or VENx = 0 V
IIN_on
Supply current, high-level output
VIN = 6.5 V, No load on OUT
IREV
Reverse leakage current
VOUTx = 6.5 V, VIN = 0 V
TJ = 25°C
UNDERVOLTAGE LOCKOUT
UVLO
Low-level input voltage, IN
VIN rising, TJ = 25°C
Hysteresis, IN
TJ = 25°C
35
V
mV
FAULTx FLAG
VOL
Output low voltage, FAULTx
I FAULTx = 1 mA, FAULTx assertion or de-assertion due to
overcurrent condition
Off-state leakage
V FAULTx = 6.5 V
FAULTx deglitch
I FAULTx = 1 mA, FAULTx assertion or de-assertion due to
overcurrent condition
6
9
180
mV
1
μA
13
ms
THERMAL SHUTDOWN
OTSD2
Thermal shutdown threshold (4)
155
OTSD
Thermal shutdown threshold in currentlimit (4)
135
Hysteresis
(4)
(5)
4
°C
°C
20
(5)
°C
Not production tested.
These parameters are provided for reference only, and do not constitute part of TI's published specifications for purposes of TI's product
warranty.
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
DEVICE INFORMATION
Pin Functions
PIN
NAME
I/O
NO.
DESCRIPTION
EN1
-
I
Enable input, logic low turns on channel one power switch
EN1
4
I
Enable input, logic high turns on channel one power switch
EN2
-
I
Enable input, logic low turns on channel two power switch
EN2
5
I
Enable input, logic high turns on channel two power switch
GND
1
Ground connection; connect externally to PowerPAD
IN
2, 3
I
Input voltage; connect a 0.1 μF or greater ceramic capacitor from IN to GND as
close to the IC as possible.
FAULT1
10
O
Active-low open-drain output, asserted during overcurrent or overtemperature
condition on channel one.
FAULT2
6
O
Active-low open-drain output, asserted during overcurrent or overtemperature
condition on channel two
OUT1
9
O
Power-switch output for channel one
OUT2
8
O
Power-switch output for channel two
ILIM
7
O
External resistor used to set current-limit threshold; recommended 20 kΩ ≤ RILIM ≤
187 kΩ.
PowerPAD™
Internally connected to GND; used to heat-sink the part to the circuit board traces.
Connect PowerPAD to GND pin externally.
PAD
FUNCTIONAL BLOCK DIAGRAM
Current
Sense
CS
IN
OUT1
FAULT1
9-ms Deglitch
Thermal
Sense
Charge
Pump
EN1
EN2
Current
Limit
Driver
UVLO
ILIM
FAULT2
Thermal
Sense
9-ms Deglitch
GND
CS
OUT2
Current
Sense
Copyright © 2011–2012, Texas Instruments Incorporated
5
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
PARAMETER MEASUREMENT INFORMATION
OUTx
tr
CLx
RLx
VOUTx
tf
90%
90%
10%
10%
TEST CIRCUIT
VENx
50%
50%
VENx
ton
toff
50%
50%
toff
ton
90%
90%
VOUTx
VOUTx
10%
10%
VOLTAGE WAVEFORMS
Figure 2. Test Circuit and Voltage Waveforms
IOS
IOUTx
tIOS
Figure 3. Response Time to Short Circuit Waveform
Decreasing
Load Resistance
VOUTx
Decreasing
Load Resistance
IOUTx
IOS
Figure 4. Output Voltage vs. Current-Limit Threshold
6
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
TYPICAL CHARACTERISTICS
TPS2561-Q1
2.5 V – 6.5 V
0.1 μF
2x RFAULT
100 kΩ
Fault Signal
Fault Signal
Control Signal
Control Signal
IN
IN
VOUT1
OUT1
OUT2
VOUT2
2x CLOAD
R1
187 kΩ
FAULT1
FAULT2 ILIM
EN1
GND
EN2
PowerPAD
R2
22.1 kΩ
Q1
Current Limit
Control Signal
Figure 5. Typical Characteristics Reference Schematic
VOUT1
5 V/div
VOUT1
5 V/div
VOUT2
5 V/div
VOUT2
5 V/div
VEN1_bar
VEN1_bar
VEN1_bar = VEN2_bar
5 V/div
5 V/div
VEN1_bar = VEN2_bar
IIN
2 A/div
IIN
2 A/div
t - Time - 2 ms/div
t - Time - 2 ms/div
Figure 6. Turn-on Delay and Rise Time
VOUT1
5 V/div
Figure 7. Turn-off Delay and Fall Time
VOUT1
5 V/div
VOUT2
5 V/div
VOUT2
5 V/div
FAULT2_bar
5 V/div
FAULT2_bar
5 V/div
IIN
2 A/div
IIN
2 A/div
t - Time - 20 ms/div
Figure 8. Full-Load to Short-Circuit Transient Response
Copyright © 2011–2012, Texas Instruments Incorporated
t - Time - 20 ms/div
Figure 9. Short-Circuit to Full-Load Recovery Response
7
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
700
2.335
IIN - Supply Current, Output Disabled - nA
UVLO - Undervoltage Lockout - V
2.33
2.325
UVLO Rising
2.32
2.315
2.31
2.305
UVLO Falling
2.3
600
500
400
VIN = 6.5 V
300
200
VIN = 2.5 V
100
0
2.295
2.29
-50
0
50
TJ - Junction Temperature - °C
100
-100
-50
150
Figure 10. UVLO – Undervoltage Lockout – V
IIN Supply Current vs. VIN Enabled - μA
IIN - Supply Current, Output Enabled - mA
150
80
VIN = 3.3 V
VIN = 2.5 V
60
40
RILIM = 20 kΩ
20
0
50
TJ - Junction Temperature - °C
RILIM = 20kΩ
TJ = 125°C
100
100
110
100
90
80
TJ = 25°C
TJ = -40°C
70
60
150
2
Figure 12. IIN – Supply Current, Output Enabled – µA
3
4
5
Input Voltage - V
6
7
Figure 13. IIN – Supply Current, Output Enabled – µA
70
0.6
60
0.5
IDS - Static Drain-Source Current - A
rDS(on) - Static Drain-Source On-State Resistance - mW
100
120
VIN = 6.5 V
VIN = 5 V
50
40
30
20
TA = -40°C
0.4
TA = 25°C
TA = 125°C
0.3
0.2
RILIM = 100 kW
0.1
10
0
-50
0
0
0
50
TJ - Junction Temperature - °C
100
Figure 14. MOSFET rDS(on) vs. Junction Temperature
8
50
TJ - Junction Temperature - °C
Figure 11. IIN – Supply Current, Output Disabled – nA
120
0
-50
0
150
50
100
VIN - VOUT - mV/div
150
200
Figure 15. Switch Current vs. Drain-Source Voltage Across
Switch
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
TYPICAL CHARACTERISTICS (continued)
3.0
1.0
2.5
0.8
0.7
IDS - Static Drain-Source Current - A
IDS - Static Drain-Source Current - A
0.9
TA = -40°C
0.6
TA = 25°C
0.5
TA = 125°C
0.4
0.3
RILIM = 61.9 kW
0.2
TJ = -40°C
2.0
TJ = 25°C
1.5
1.0
TJ = 125°C
RILIM = 20kΩ
0.5
0.1
0
0
0
20
40
60
80
100
VIN - VOUT - mV/div
120
140
160
Figure 16. Switch Current vs. Drain-Source Voltage Across
Switch
Copyright © 2011–2012, Texas Instruments Incorporated
0
50
100
VIN-VOUT - mV
150
200
Figure 17. Switch Current vs. Drain-Source Voltage Across
Switch
9
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
DETAILED DESCRIPTION
OVERVIEW
The TPS2561-Q1 is a dual-channel, current-limited power-distribution switch using N-channel MOSFETs for
applications where short circuits or heavy capacitive loads are encountered. This device allows the user to
program the current-limit threshold between 250 mA and 2.8 A (typ) per channel through an external resistor.
This device incorporates an internal charge pump and gate drive circuitry necessary to drive the N-channel
MOSFETs. The charge pump supplies power to the driver circuit for each channel and provides the necessary
voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low
as 2.5 V and requires little supply current. The driver controls the gate voltage of the power switch. The driver
incorporates circuitry that controls the rise and fall times of the output voltage to limit large current and voltage
surges and provides built-in soft-start functionality. Each channel of the TPS2561-Q1 limits the output current to
the programmed current-limit threshold IOS during an overcurrent or short-circuit event by reducing the charge
pump voltage driving the N-channel MOSFET and operating it in the linear range of operation. The result of
limiting the output current to IOS reduces the output voltage at OUTx because the N-channel MOSFET is no
longer fully enhanced.
OVERCURRENT CONDITIONS
The TPS2561-Q1 responds to overcurrent conditions by limiting the output current per channel to IOS. When an
overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage
accordingly. Two possible overload conditions can occur.
The first condition is when a short circuit or partial short circuit is present when the device is powered-up or
enabled. The output voltage is held near zero potential with respect to ground and the TPS2561-Q1 ramps the
output current to IOS. The TPS2561-Q1 devices will limit the current to IOS until the overload condition is removed
or the device begins to thermal cycle.
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is
enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 3). The
current-sense amplifier is overdriven during this time and momentarily disables the internal current-limit
MOSFET. The current-sense amplifier recovers and ramps the output current to IOS. Similar to the previous case,
the TPS2561-Q1 device limits the current to IOS until the overload condition is removed or the device begins to
thermal cycle.
The TPS2561-Q1 thermal cycles if an overload condition is present long enough to activate thermal limiting in
any of the above cases. The device turns off when the junction temperature exceeds 135°C (min) while in current
limit. The device remains off until the junction temperature cools 20°C (typ) and then restarts. The TPS2561-Q1
cycles on and off until the overload is removed (see Figure 9) .
10
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
FAULTx RESPONSE
The FAULTx open-drain outputs are asserted (active low) on an individual channel during an overcurrent or
overtemperature condition. The TPS2561-Q1 asserts the FAULTx signal until the fault condition is removed and
the device resumes normal operation on that channel. The TPS2561-Q1 is designed to eliminate false FAULTx
reporting by using an internal delay deglitch circuit (9-ms typ) for overcurrent conditions without the need for
external circuitry. This ensures that FAULTx is not accidentally asserted due to normal operation such as starting
into a heavy capacitive load. The deglitch circuitry delays entering and leaving current-limited induced fault
conditions. The FAULTx signal is not deglitched when the MOSFET is disabled due to an overtemperature
condition but is deglitched after the device has cooled and begins to turn on. This unidrectional deglitch prevents
FAULTx oscillation during an overtemperature event.
UNDERVOLTAGE LOCKOUT (UVLO)
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turnon threshold. Built-in hysteresis prevents unwanted on and off cycling due to input voltage droop during turn on.
ENABLE (ENx OR ENx)
The logic enables control the power switches and device supply current. The supply current is reduced to less
than 2-μA when a logic high is present on ENx or when a logic low is present on ENx. A logic low input on ENx
or a logic high input on ENx enables the driver, control circuits, and power switches. The enable inputs are
compatible with both TTL and CMOS logic levels.
THERMAL SENSE
The TPS2561-Q1 self protects by using two independent thermal sensing circuits that monitor the operating
temperature of the power switch and disable operation if the temperature exceeds recommended operating
conditions. Each channel of the TPS2561-Q1 operates in constant-current mode during an overcurrent
conditions, which increases the voltage drop across the power switch. The power dissipation in the package is
proportional to the voltage drop across the power switch, which increases the junction temperature during an
overcurrent condition. The first thermal sensor (OTSD) turns off the individual power switch channel when the die
temperature exceeds 135°C (min) and the channel is in current limit. Hysteresis is built into the thermal sensor,
and the switch turns on after the device has cooled approximately 20°C.
The TPS2561-Q1 also has a second ambient thermal sensor (OTSD2). The ambient thermal sensor turns off
both power switch channels when the die temperature exceeds 155°C (min) regardless of whether the power
switch channels are in current limit and will turn on the power switches after the device has cooled approximately
20°C. The TPS2561-Q1 continues to cycle off and on until the fault is removed.
Copyright © 2011–2012, Texas Instruments Incorporated
11
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
APPLICATION INFORMATION
INPUT AND OUTPUT CAPACITANCE
Input and output capacitance improves the performance of the device; the actual capacitance should be
optimized for the particular application. For all applications, a 0.1-μF or greater ceramic bypass capacitor
between IN and GND is recommended as close to the device as possible for local noise decoupling. This
precaution reduces ringing on the input due to power-supply transients. Additional input capacitance may be
needed on the input to reduce voltage overshoot from exceeding the absolute maximum voltage of the device
during heavy transient conditions. This is especially important during bench testing when long, inductive cables
are used to connect the evaluation board to the bench power supply.
Output capacitance is not required, but placing a high-value electrolytic capacitor on the output pin is
recommended when large transient currents are expected on the output.
PROGRAMMING THE CURRENT-LIMIT THRESHOLD
The overcurrent threshold is user programmable through an external resistor, RILIM. RILIM sets the current-limit
threshold for both channels. The TPS2561-Q1 use an internal regulation loop to provide a regulated voltage on
the ILIM pin. The current-limit threshold is proportional to the current sourced out of ILIM. The recommended 1%
resistor range for RILIM is 20 kΩ ≤ RILIM ≤ 187 kΩ to ensure stability of the internal regulation loop. Many
applications require that the minimum current limit is above a certain current level or that the maximum current
limit is below a certain current level, so it is important to consider the tolerance of the overcurrent threshold when
selecting a value for RILIM. The following equations calculates the resulting overcurrent threshold for a given
external resistor value (RILIM). The traces routing the RILIM resistor to the TPS2561-Q1 should be as short as
possible to reduce parasitic effects on the current-limit accuracy.
IOSmax (mA) =
IOSnom (mA) =
IOSmin (mA) =
52850 V
RILIM0.957 kΩ
56000 V
RILIM kΩ
61200 V
RILIM1.056 kΩ
(1)
3000
2750
Current-Limit Threshold (mA)
2500
2250
2000
1750
1500
1250
1000
IOS(max)
IOS(typ)
750
500
IOS(min)
250
0
20
30
40
50
60
70
80
90
100
110
120
130
140
150
RILIM – Current Limit Resistor – kΩ
Figure 18. Current-Limit Threshold vs. RILIM
12
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
APPLICATION 1: DESIGNING ABOVE A MINIMUM CURRENT LIMIT
Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 2 A must be delivered to the load so that the minimum desired current-limit threshold is 2000 mA. Use the
IOS equations and Figure 18 to select RILIM.
IOSmin (mA) = 2000 mA
IOSmin (mA) =
61200 V
RILIM1.056 kΩ
1
RILIM
RILIM
æ 61200 V ö1.056
(kΩ) = ç
÷
è IOSmin mA ø
(kΩ) = 25.52 kΩ
(2)
Select the closest 1% resistor less than the calculated value: RILIM = 25.5 kΩ. This sets the minimum current-limit
threshold at 2 A . Use the IOS equations, Figure 18, and the previously calculated value for RILIM to calculate the
maximum resulting current-limit threshold.
RILIM (kΩ) = 25.52 kΩ
IOSmax (mA) =
IOSmax (mA) =
IOSmax
52850 V
RILIM0.957 kΩ
52850 V
25.50.957 kΩ
(mA) = 2382 mA
(3)
The resulting maximum current-limit threshold is 2382 mA with a 25.5-kΩ resistor.
APPLICATION 2: DESIGNING BELOW A MAXIMUM CURRENT LIMIT
Some applications require that current limiting must occur below a certain threshold. For this example, assume
that the desired upper current-limit threshold must be below 1000 mA to protect an up-stream power supply. Use
the IOS equations and Figure 18 to select RILIM.
IOSmax (mA) = 1000 mA
IOSmax (mA) =
52850 V
RILIM0.957 kΩ
1
RILIM
RILIM
æ 52850 V ö 0.957
(kW) = ç
÷
è IOSmax mA ø
(kW) = 63.16 kW
(4)
Select the closest 1% resistor greater than the calculated value: RILIM = 63.4 kΩ. This sets the maximum currentlimit threshold at 1000 mA . Use the IOS equations, Figure 18, and the previously calculated value for RILIM to
calculate the minimum resulting current-limit threshold.
RILIM (kW) = 63.4 kW
IOSmin (mA) =
IOSmin (mA) =
IOSmin
61200 V
RILIM1.056 kΩ
61200 V
63.41.056 kΩ
(mA) = 765 mA
(5)
The resulting minimum current-limit threshold is 765 mA with a 63.4-kΩ resistor.
Copyright © 2011–2012, Texas Instruments Incorporated
13
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
ACCOUNTING FOR RESISTOR TOLERANCE
The previous sections described the selection of RILIM given certain application requirements and the importance
of understanding the current-limit threshold tolerance. The analysis focused only on the TPS2561-Q1
performance and assumed an exact resistor value. However, resistors sold in quantity are not exact and are
bounded by an upper and lower tolerance centered around a nominal resistance. The additional RILIM resistance
tolerance directly affects the current-limit threshold accuracy at a system level. The following table shows a
process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one follows the
selection process outlined in the application examples above. Step two determines the upper and lower
resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS
equations to calculate the threshold limits. It is important to use tighter tolerance resistors, for example, 0.5% or
0.1%, when precision current limiting is desired.
Table 1. Common RILIM Resistor Selections
Desired Nominal
Current Limit (mA)
14
Ideal Resistor Closest 1%
(kΩ)
Resistor (kΩ)
Resistor Tolerance
Actual Limits
1% low (kΩ)
1% high (kΩ)
IOS MIN (mA)
IOS Nom
(mA)
IOS MAX
(mA)
300
186.7
187
185.1
188.9
241.6
299.5
357.3
400
140
140
138.6
141.4
328
400
471.4
600
93.3
93.1
92.2
94
504.6
601.5
696.5
800
70
69.8
69.1
70.5
684
802.3
917.6
1000
56
56.2
55.6
56.8
859.9
996.4
1129.1
1200
46.7
46.4
45.9
46.9
1052.8
1206.9
1356.3
1400
40
40.2
39.8
40.6
1225
1393
1555.9
1600
35
34.8
34.5
35.1
1426.5
1609.2
1786.2
1800
31.1
30.9
30.6
31.2
1617.3
1812.3
2001.4
2000
28
28
27.7
28.3
1794.7
2000
2199.3
2200
25.5
25.5
25.2
25.8
1981
2196.1
2405.3
2400
23.3
23.2
23
23.4
2188.9
2413.8
2633
2600
21.5
21.5
21.3
21.7
2372.1
2604.7
2831.9
2800
20
20
19.8
20.2
2560.4
2800
3034.8
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
POWER DISSIPATION AND JUNCTION TEMPERATURE
The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It
is good design practice to estimate power dissipation and junction temperature. The below analysis gives an
approximation for calculating junction temperature based on the power dissipation in the package. However, it is
important to note that thermal analysis is strongly dependent on additional system level factors. Such factors
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating
power. Good thermal design practice must include all system level factors in addition to individual component
analysis.
Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating
temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on)
from the typical characteristics graph. Using this value, the power dissipation can be calculated by:
PD = (RDS(on) ´ IOUT12 ) + (RDS(on) ´ IOUT22 )
Where:
PD = Total power dissipation (W)
rDS(on) = Power switch on-resistance of one channel (Ω)
IOUTx = Maximum current-limit threshold set by RILIM(A)
This step calculates the total power dissipation of the N-channel MOSFET.
Finally, calculate the junction temperature:
TJ = PD ´ θJA + TA
Where:
TA = Ambient temperature (°C)
θJA = Thermal resistance (°C/W)
PD = Total power dissipation (W)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat
the calculation using the refined rDS(on) from the previous calculation as the new estimate. Two or three iterations
are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on
thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board layout.
The Dissipating Rating Table provides example thermal resistances for specific packages and board layouts.
Copyright © 2011–2012, Texas Instruments Incorporated
15
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
AUTO-RETRY FUNCTIONALITY
Some applications require that an overcurrent condition disables the part momentarily during a fault condition
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and
capacitor. During a fault condition, FAULTx pulls ENx low disabling the part. The part is disabled when ENx is
pulled below the turn-off threshold, and FAULTx goes high impedance allowing CRETRY to begin charging. The
part re-enables when the voltage on ENx reaches the turn-on threshold, and the auto-retry time is determined by
the resistor/capacitor time constant. The part will continue to cycle in this manner until the fault condition is
removed.
TPS2561-Q1
Input
0.1 μF
OUT1
OUT2
IN
RFAULT
2x 100 kΩ
2x CLOAD
ILIM
FAULT1
GND
EN1
FAULT2
EN2
CRETRY
2x 0.22 µF
VOUT1
VOUT2
RILIM
20 kΩ
PowerPAD
Figure 19. Auto-Retry Functionality
Some applications require auto-retry functionality and the ability to enable or disable with an external logic signal.
The figure below shows how an external logic signal can drive EN through RFAULT and maintain auto-retry
functionality. The resistor/capacitor time constant determines the auto-retry time-out period.
TPS2561-Q1
Input
External Logic
Signal & Drivers
RFAULT
2x 100 kΩ
CRETRY
2x 0.22 µF
0.1 μF
IN
OUT1
OUT2
VOUT1
VOUT2
2x CLOAD
ILIM
FAULT1
GND
EN1
FAULT2
EN2
RILIM
20 kΩ
PowerPAD
Figure 20. Auto-Retry Functionality With External EN Signal
16
Copyright © 2011–2012, Texas Instruments Incorporated
TPS2561-Q1
www.ti.com
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
TWO-LEVEL CURRENT-LIMIT CIRCUIT
Some applications require different current-limit thresholds depending on external system conditions. Figure 21
shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is
set by the total resistance from ILIM to GND (see previously discussed Programming the Current-Limit Threshold
section). A logic-level input enables or disables MOSFET Q1 and changes the current-limit threshold by
modifying the total resistance from ILIM to GND. Additional MOSFET and resistor combinations can be used in
parallel to Q1 and R2 to increase the number of additional current-limit levels.
NOTE
ILIM should never be driven directly with an external signal.
TPS2561-Q1
VIN = 5 V
2x RFAULT
100 kΩ
Faultx Signals
Control Signals
0.1 µF
IN
IN
VOUT1
OUT1
OUT2
ILIM
FAULT 1
FAULT 2 GND
EN1
EN2
PowerPAD
VOUT2
24.9 kΩ
2x 150 µF
Figure 21. Two-Level Current-Limit Circuit
Copyright © 2011–2012, Texas Instruments Incorporated
17
TPS2561-Q1
SLVSB51A – DECEMBER 2011 – REVISED AUGUST 2012
www.ti.com
REVISION HISTORY
Changes from Original (December 2011) to Revision A
Page
•
Changed the revision to A, August 2012 and aligned FEATURES and DESCRIPTION to top aligned .............................. 1
•
Changed part number from TPS2561 to TPS2561-Q1 in all images where part number appears. ..................................... 2
•
Changed the First 2 rows of TYP and MAX columns of the ELEC CHAR table from 110 / 290 to 44 / 50, second row
320 / 79 and added cross reference to second column 'Not producton tested.' .................................................................. 3
18
Copyright © 2011–2012, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS2561QDRCRQ1
ACTIVE
VSON
DRC
10
3000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
PXPQ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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