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TPS51604DSGR

TPS51604DSGR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    WSON8_2X2MM_EP

  • 描述:

    用于同步降压高频CPU核心电源应用的4-A、28-V半桥栅极驱动器

  • 数据手册
  • 价格&库存
TPS51604DSGR 数据手册
Sample & Buy Product Folder Support & Community Tools & Software Technical Documents Reference Design TPS51604 SLUSBA6B – DECEMBER 2012 – REVISED OCTOBER 2015 TPS51604 Synchronous Buck FET Driver for High-Frequency CPU Core Power 1 Features 3 Description • The TPS51604 drivers are optimized for highfrequency CPU VCORE applications. Advanced features such as reduced dead-time drive and auto zero crossing are used to optimize efficiency over the entire load range. 1 • • • • • • • Reduced Dead-Time Drive Circuit for Optimized CCM Automatic Zero Crossing Detection for Optimized DCM Efficiency Multiple Low-Power Modes for Optimized LightLoad Efficiency Optimized Signal Path Delays for High-Frequency Operation Integrated BST Switch Drive Strength Optimized for Ultrabook FETs Optimized for 5-V FET Drive Conversion Input Voltage Range (VIN): 4.5 to 28 V 2-mm × 2-mm, 8-Pin, WSON Thermal Pad Package The SKIP pin provides the option of CCM operation to support controlled management of the output voltage. In addition, the TPS51604 supports two lowpower modes. With the PWM input in tri-state, quiescent current is reduced to 130 µA, with immediate response. When SKIP is held at tri-state, the current is reduced to 8 µA (typically 20 µs is required to resume switching). Paired with the appropriate TI controller, the drivers deliver an exceptionally high performance power supply system. The TPS51604 device is packaged in a space saving, thermally-enhanced 8-pin, 2-mm x 2-mm WSON package and operates from –40°C to 105°C. 2 Applications • Tablets Using High-Frequency CPUs With the Following Power Input: – Adapter – Battery – NVDC – 5-V or 12-V Rails Device Information(1) PART NUMBER PACKAGE TPS51604 WSON (8) BODY SIZE (NOM) 2.00 mm × 2.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic R1 C3 VIN TPS51604 Q1 DRVH 8 PWM SW 7 3 SKIP GND 6 4 VDD DRVL 5 1 BST PWM 2 SKIP VDD Q2 L1 C1 C2 C4 UDG-12234 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS51604 SLUSBA6B – DECEMBER 2012 – REVISED OCTOBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 4 4 4 4 5 7 9 Absolute Maximum Ratings ..................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Typical Power Block MOSFET Characteristics......... Detailed Description ............................................ 10 7.1 Overview ................................................................. 10 7.2 Functional Block Diagram ....................................... 10 7.3 Feature Description................................................. 10 7.4 Device Functional Modes........................................ 13 8 Application and Implementation ........................ 14 8.1 Application Information............................................ 14 8.2 Typical Application ................................................. 14 9 Power Supply Recommendations...................... 19 10 Layout................................................................... 19 10.1 Layout Guidelines ................................................. 19 10.2 Layout Example .................................................... 19 11 Device and Documentation Support ................. 20 11.1 11.2 11.3 11.4 11.5 11.6 Device Support...................................................... Documentation Support ........................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 20 20 20 20 20 20 12 Mechanical, Packaging, and Orderable Information ........................................................... 20 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (August 2013) to Revision B • 2 Page Added ESD Ratings table, Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPS51604 TPS51604 www.ti.com SLUSBA6B – DECEMBER 2012 – REVISED OCTOBER 2015 5 Pin Configuration and Functions DSG Package 8-Pin WSON Top View BST 1 8 DRVH PWM 2 7 SW SKIP 3 6 GND VDD 4 5 DRVL Pin Functions PIN NAME NO. I/O (1) DESCRIPTION BST 1 I High-side N-channel FET bootstrap voltage input; power supply for high-side driver DRVH 8 O High-side N-channel gate drive output DRVL 5 O Synchronous low-side N-channel gate drive output GND 6 G Synchronous low-side N-channel gate drive return and device reference PWM 2 I PWM input. A tri-state voltage on this pin turns off both the high-side (DRVH) and low-side drivers (DRVL) When SKIP is LO, the zero crossing comparator is active. The power chain enters discontinuous conduction mode when the inductor current reaches zero. When SKIP is HI, the zero crossing comparator is disabled, and the driver outputs follow the PWM input. A tri-state voltage on SKIP puts the driver into a very-low power state. SKIP 3 I SW 7 I/O VDD 4 Thermal Pad (1) High-side N-channel gate drive return. Also, zero-crossing sense input I 5-V power supply input; decouple to GND with a ceramic capacitor with a value of 1 µF or greater G Tie to system GND plane with multiple vias I = Input, O = Output, G = Ground Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TPS51604 3 TPS51604 SLUSBA6B – DECEMBER 2012 – REVISED OCTOBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) over operating free-air temperature (unless otherwise noted) Input voltage Output voltage MIN MAX VDD –0.3 6 PWM, SKIP –0.3 6 BST –0.3 35 BST (transient
TPS51604DSGR 价格&库存

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TPS51604DSGR
  •  国内价格
  • 1+2.59200
  • 10+2.00880
  • 30+1.76040
  • 100+1.45800
  • 500+1.31760
  • 1000+1.23120

库存:8084