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Table of Contents
User’s Guide
TPS53819A Buck Controller Evaluation Module User's
Guide
ABSTRACT
The TPS53819AEVM-123 evaluation module (EVM) is designed to evaluate the TPS53819A. The TPS53819A is
a small-size single-buck controller with adaptive on-time D-CAP2 mode control. It provides a fixed 1.2-V output
at up to 25 A from a nominal 12-V input bus. This controller is an analog PWM controller allowing programming
and monitoring via the PMBus interface. The TPS53819AEVM-123 also uses a 5 mm × 6 mm TI power block
MOSFET (CSD87350Q5D) for high power density and superior thermal performance.
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Table of Contents
1 Description.............................................................................................................................................................................. 2
1.1 Typical Applications............................................................................................................................................................2
1.2 Features............................................................................................................................................................................. 2
2 Electrical Performance Specifications................................................................................................................................. 3
3 Schematic................................................................................................................................................................................4
4 Test Setup................................................................................................................................................................................5
4.1 Test and Configuration Software........................................................................................................................................ 5
4.2 Test Equipment.................................................................................................................................................................. 5
4.3 Recommended Test Setup.................................................................................................................................................6
4.4 List of Test Points............................................................................................................................................................... 7
4.5 Jumper Configuration: Enable Selection............................................................................................................................8
5 EVM Configuration Using the Fusion GUI............................................................................................................................8
5.1 Configuration Procedure.................................................................................................................................................... 8
5.2 Default Fusion GUI Screenshots and Description..............................................................................................................8
6 Test Procedure...................................................................................................................................................................... 12
6.1 Line and Load Regulation and Efficiency Measurement Procedure................................................................................ 12
6.2 Control Loop Gain and Phase Measurement Procedure................................................................................................. 12
6.3 Equipment Shutdown....................................................................................................................................................... 12
7 Performance Data and Typical Characteristic Curves...................................................................................................... 13
7.1 Efficiency..........................................................................................................................................................................13
7.2 Load Regulation............................................................................................................................................................... 13
7.3 Line Regulation................................................................................................................................................................ 14
7.4 fSW Versus Load...............................................................................................................................................................14
7.5 Bode Plot..........................................................................................................................................................................15
7.6 Transient Response......................................................................................................................................................... 15
7.7 Output Ripple................................................................................................................................................................... 16
7.8 Switching Node................................................................................................................................................................ 17
7.9 Turn-On Waveform...........................................................................................................................................................18
7.10 Turn-Off Waveform.........................................................................................................................................................19
7.11 Pre-bias Turn-On Waveform...........................................................................................................................................20
7.12 Thermal Images............................................................................................................................................................. 20
8 EVM Assembly Drawing and PCB layout........................................................................................................................... 22
9 Bill of Materials..................................................................................................................................................................... 26
10 Revision History................................................................................................................................................................. 26
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Trademarks
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List of Figures
Figure 3-1. TPS53819AEVM-123 Schematic.............................................................................................................................. 4
Figure 4-1. Tip and Barrel Measurement for VOUT Ripple............................................................................................................5
Figure 4-2. Probe with Short Ground Lead for VOUT Ripple Across C14.....................................................................................6
Figure 4-3. TPS53819AEVM-123 Recommended Test Setup.....................................................................................................7
Figure 5-1. Selection of Device Scan Options............................................................................................................................. 8
Figure 5-2. TPS53819A GUI Configure General Tab.................................................................................................................. 9
Figure 5-3. TPS53819A GUI Configure, All Config Tab.............................................................................................................10
Figure 5-4. TPS53819A GUI Status...........................................................................................................................................11
Figure 7-1. TPS53819AEVM-123 Efficiency..............................................................................................................................13
Figure 7-2. TPS53819AEVM-123 Load Regulation...................................................................................................................13
Figure 7-3. TPS53819AEVM-123 Line Regulation.................................................................................................................... 14
Figure 7-4. TPS53819AEVM-123 fSW Versus Load...................................................................................................................14
Figure 7-5. TPS53819AEVM-123 Loop Response Gain and Phase......................................................................................... 15
Figure 7-6. TPS53819AEVM-123 Load Transient, 12 VIN, 0-A to 15-A Eco-mode................................................................... 15
Figure 7-7. TPS53819AEVM-123 Load Transient, 12 VIN, 0-A to 15-A FCCM..........................................................................16
Figure 7-8. TPS53819AEVM-123 Output Ripple, 12 VIN, 25 A..................................................................................................16
Figure 7-9. TPS53819AEVM-123 Output Ripple, 12 VIN, 1-A Load Eco-mode......................................................................... 17
Figure 7-10. TPS53819AEVM-123 Switching Node, 12-VIN, 25-A Load Full Bandwidth...........................................................17
Figure 7-11. TPS53819AEVM-123 Enable Turn-On Waveform, 12-VIN, 1-Ω Load................................................................... 18
Figure 7-12. TPS53819AEVM-123 VIN Turn-On Waveform, 12-VIN, 1-Ω Load......................................................................... 18
Figure 7-13. TPS53819AEVM-123 Enable Turn-Off Waveform, 12 VIN, 1-Ω Load................................................................... 19
Figure 7-14. TPS53819AEVM-123 VIN Turn off Waveform, 12 VIN, 1-Ω Load...........................................................................19
Figure 7-15. TPS53819AEVM-123 Enable Turn-On Waveform, 12 VIN, 1-Ω Load, 1-V Pre-bias............................................. 20
Figure 7-16. TPS53819AEVM-123 Top Board, 12 VIN, 25-A Fan..............................................................................................20
Figure 7-17. TPS53819AEVM-123 Bottom Board, 12 VIN, 25-A Fan........................................................................................ 21
Figure 8-1. TPS53819AEVM-123 Top Layer Assembly Drawing (Top View).............................................................................22
Figure 8-2. TPS53819AEVM-123 Bottom Layer Assembly Drawing (Bottom View)................................................................. 22
Figure 8-3. TPS53819AEVM-123 Top Copper (Top View).........................................................................................................23
Figure 8-4. TPS53819AEVM-123 Internal Layer 1 (Top View).................................................................................................. 23
Figure 8-5. TPS53819AEVM-123 Internal Layer 3 (Top View).................................................................................................. 24
Figure 8-6. TPS53819AEVM-123 Internal Layer 4 (Top View).................................................................................................. 24
Figure 8-7. TPS53819AEVM-123 Internal Layer 5 (Top View).................................................................................................. 25
Figure 8-8. TPS53819AEVM-123 Bottom Copper (Top View)................................................................................................... 25
List of Tables
Table 2-1. TPS53819AEVM-123 Electrical Performance Specifications(1) ................................................................................. 3
Table 4-1. The Functions of Each Test Points............................................................................................................................. 7
Table 4-2. Enable Selection......................................................................................................................................................... 8
Table 9-1. TPS53819AEVM-123 List of Materials..................................................................................................................... 26
Trademarks
D-CAP2™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
1 Description
The TPS53819AEVM-123 is designed to use a regulated 12-V bus to produce a regulated 1.2-V output at up
to 25 A of load current. The TPS53819AEVM-123 is designed to demonstrate the TPS53819A in a typical low
voltage application while providing a number of test points to evaluate the performance of the TPS53819A.
1.1 Typical Applications
•
•
•
•
•
Point of load systems
Storage computer
Server computer
Multi-function printer
Embedded computing
1.2 Features
•
2
Regulated 1.2-V output, marginable and trimmable through the PMBus interface
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•
•
•
•
•
•
•
•
•
•
Electrical Performance Specifications
25-A DC steady state output current
D-CAP2™ mode control supporting all ceramic output capacitors
Programmable soft start through the PMBus interface
Programmable enable function through the PMBus interface
Fault report through the PMBus interface
J2 for external enable function
Supports pre-bias output voltage start-up
High efficiency and high-power density by using a TI power block MOSFET
Convenient test points for probing critical waveforms
Cycle-by-cycle valley overcurrent limit protection
2 Electrical Performance Specifications
Table 2-1. TPS53819AEVM-123 Electrical Performance Specifications(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
8
12
14
UNITS
INPUT CHARACTERISTICS
Voltage range, VIN
Maximum input current
VIN = 8 V, IOUT = 25 A
No load input current
VIN = 14 V, IOUT = 0 A with auto skip mode
V
4.3
A
1
mA
OUTPUT CHARACTERISTICS
Output voltage, VOUT
1.2
Output load current, IOUT
Output voltage regulation
0
25
Line regulation: input voltage = 8 V to 14 V
0.5%
Load regulation: output current = 0 A to 25 A
0.5%
Output voltage ripple
VIN = 12 V, IOUT = 25 A
Output over current
IOUT_OC fault flag asserted
V
10
A
mVpp
25
A
SYSTEMS CHARACTERISTICS
Switching frequency
425
Peak efficiency
VIN = 12 V, IOUT = 10 A
91.0%
Full load efficiency
VIN = 12 V, IOUT = 25 A
87.9%
Loop bandwidth
VIN = 12 V, IOUT = 25 A
111
Phase margin
VIN = 12 V, IOUT = 25 A
91.4
Operating temperature
(1)
25
kHz
kHz
°
°C
This design uses TI Default PMBus settings
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Schematic
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3 Schematic
TP1
VIN
TP2
VREG
VREG
VIN
J1
100k
VREG
J2
C2
C3
C4
C5
22uF
22uF
22uF
22uF
0.1uF
+
C6
1
4
2
R2
OPEN= ENABLE
TP3
PGOOD
100k
300k
C1
2
3
1
R3
Input:
8 - 14V
1
R1
TP4
PGND
R4
C7
R5
0.1uF
0
1.00K
4
EN
VBST
PGOOD
PwPd
13
SW
DRVH
ALERT#
DRVL
TRIP
VREG
VO
R10
39.2k
5
6
7
TP6
SW
VOUT
L1
TP7
R6
SDA
GND
3
14
Q1
CSD87350Q5D
LM27403
Lm
4.7
0.440uH
12
11
R8
10
0
9
R9
C18
8
1uF
J3
1000pF
VREG
3
TP8
DRVL
VOUT
C9
R7
C8
VDD
2
SCL
15
FB
1
16
17
ADDR
U1
TP5
DRVH
1
C17
(
1
Output:
1.2V @ 0 - 25A
4
1
2
)
C10
C11
C12
C13
C14
100uF
100uF
100uF
100uF
100uF
+
C15
1
+
C16
1
3
2
1
FB
TP9
J4
PGND
1
2
3
4
5
6
7
8
9
10
TP10
VDD
ALERT#
R11
R12
CLK
0
DATA
R13
R14
R15
100k
100k
C19
1
0
VIN
1
Not Populated
1uF
TP11
LOOPB
FB
VOUT
TP13
LOOPA
R16
R17
0
10.0k
R18
TP12
GND
10.0k
Figure 3-1. TPS53819AEVM-123 Schematic
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Test Setup
4 Test Setup
4.1 Test and Configuration Software
In order to change any of the default configuration parameters on the EVM, it is necessary to obtain the TI
Fusion Digital Power Designer software.
4.1.1 Description
Fusion Digital Power Designer is the Graphical User Interface (GUI) used to configure and monitor Texas
Instrument’s (TI) TPS53819A power controller on this evaluation module (EVM). The application uses the
PMBus protocol to communicate with the controller over serial bus by way of a TI USB Interface Adapter EVM
included.
4.1.2 Features
Some of the tasks performed with the GUI include:
•
•
•
Turn on or off the power supply output, either through the hardware control line or the PMBus operation
command.
Configure common operating characteristics such as VOUT, switching frequency, soft-start time, and more.
Monitor status and warnings or fault conditions real-time.
The software is available for download at this location:
http://focus.ti.com/docs/toolsw/folders/print/fusion_digital_power_designer.html.
4.2 Test Equipment
Voltage Source: The input voltage source VIN should be a 0-V to 14-V variable DC source capable of supplying
30 ADC. Connect VIN to J4 as shown in Figure 4-2.
Multimeters:
• V1: VIN at TP1 (VIN) to TP4 (PGND)
• V2: VOUT at TP7 (VOUT) to TP9 (PGND)
• A1: VIN input current
Output Load: The output load should be an electronic constant-resistance mode load capable of 0 ADC to 25
ADC at 1.2 V. An electronic constant-current load is also acceptable.
Oscilloscope: A digital or analog oscilloscope can be used to measure the output ripple. The oscilloscope must
be set for 1-MΩ impedance, 20-MHz bandwidth, AC coupling, 2-μs per division horizontal resolution, 20-mV per
division vertical resolution. As shown in Figure 4-1, test points TP7 and TP9 can be used to measure the output
ripple voltage by placing the oscilloscope probe tip through TP7 and holding the ground barrel to TP9. It is not
recommended to use a long leaded ground connection because this may induce additional noise due to a large
ground loop. Alternatively, the output ripple can be measured directly across C14 with a short ground lead as
shown in Figure 4-2. To measure other waveforms, adjust the oscilloscope as needed.
Figure 4-1. Tip and Barrel Measurement for VOUT Ripple
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Test Setup
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Output Ripple
Measurement directly
Across C14
a
Figure 4-2. Probe with Short Ground Lead for VOUT Ripple Across C14
Fan: Some of the components of this EVM can approach temperatures of 60°C during operation. A small fan
capable of 200–400 LFM is recommended to reduce component temperatures while the EVM is operating.
Exercise caution when touching the EVM while the fan is not running and always exercise caution when touching
any circuits that can be live or energized.
Recommended Wire Gauge:
• VIN to J1 (12-V input): The recommended wire size is 1 × AWG #14 per input connection, with the total
length of wire less than four feet (two feet input, two feet return).
• J3 to LOAD: The minimum recommended wire size is 2 × AWG #14, with the total length of wire less than
four feet (two feet input, two feet return).
4.3 Recommended Test Setup
Figure 4-3 is the recommended test set up to evaluate the TPS53819AEVM-123. Working at an ESD
workstation, make sure that any wrist straps, bootstraps or mats are connected referencing the user to earth
ground before power is applied to the EVM.
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Test Setup
USB Interface Adapter EVM
PC
LM27403
PWR123 Rev. B
V1
DC
Source
VIN
Load
A1
V2
Figure 4-3. TPS53819AEVM-123 Recommended Test Setup
4.3.1 Input Connections
1. Prior to connecting the DC input source VIN, it is advisable to limit the source current from VIN to 10-A
maximum. Make sure VIN is initially set to 0 V and connected to J1 as shown in Figure 4-3.
2. Connect a voltmeter V1 at TP1 and TP4 to measure the input voltage.
3. Connect a current meter to A1 to measure the input current.
4.3.2 Output Connections
1. Connect Load to J3 and set Load to constant resistance mode to sink 0 Adc before VIN is applied.
2. Connect a voltmeter V2 at TP7 and TP9 to measure the output voltage.
4.3.3 Other Connections
1. When using a fan, ensure air is flowing across the EVM.
2. Connect the ribbon cable from the USB interface adapter to J4.
4.4 List of Test Points
Table 4-1. The Functions of Each Test Points
TEST POINTS
NAME
DESCRIPTION
TP1
VIN
Input voltage
TP2
VREG
5-V LDO output
TP3
PGOOD
Power good
TP4
PGND
GND reference for VIN
TP5
DRVH
High-side driver output
TP6
SW
Switching node
TP7
VOUT
Output voltage
TP8
DRVL
Low-side driver output
TP9
PGND
GND reference for VOUT
TP10
VDD
Controller power-supply input
TP11
LOOPB
Input B for loop injection
TP12
GND
GND for sensitive analog circuitry
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Table 4-1. The Functions of Each Test Points (continued)
TEST POINTS
NAME
DESCRIPTION
TP13
LOOPA
Input A for loop injection
4.5 Jumper Configuration: Enable Selection
The controller can be enabled and disabled by J3.
Default setting: No Jumper shorts on J3 to Enable the controller.
Table 4-2. Enable Selection
JUMPER POSITION
ENABLE SELECTION
Jumper shorts on J3
Disable the controller
No jumper shorts on J3
Enable the controller
5 EVM Configuration Using the Fusion GUI
In order to configure the TPS53819A controller on the EVM from its default values, it is required to use the
TI Fusion Digital Power Designer software. It is necessary to have input voltage applied to the EVM prior to
launching the software so the TPS53819A can respond to the GUI and the GUI can recognize the TPS53819A.
At least 4.25 V must be applied to the VDD pin to overcome the default UVLO setting.
5.1 Configuration Procedure
1. Adjust the input supply to provide at least 4.25 V.
2. Apply the input voltage to the EVM. Refer to Figure 4-3 for connections and test setup.
3. Launch the Fusion GUI software. If prompted, select GUI scan mode to DEVICE_CODE only. Refer to
Figure 5-1 for changing device scanning options. The software will recognize the TPS53819A device on the
EVM and load the GUI.
4. Configure the EVM operating parameters as needed.
CAUTION
Some parameters can be configured, such as switching frequency, to values that can result in erratic
or unexpected behavior on this EVM. Consult the TPS53819A 3-V to 28-V Input, 40-A, Eco-Mode™,
D-CAP2™ Synchrons Buck Controller Data Sheet for guidance in configuration of parameters and
impact on component selection.
Figure 5-1. Selection of Device Scan Options
5.2 Default Fusion GUI Screenshots and Description
Figure 5-2 is a screenshot of the General tab of the Fusion GUI with default configuration where the general
configuration parameters can be set. After modifying a parameter the Write to Hardware button must be clicked
to apply it. When power cycling all parameters reset to the values stored in flash. To change the values stored in
flash, click the Store RAM to Flash button. Figure 5-3 is a screenshot of the All Config tab where all accessible
registers are viewed. Figure 5-4 is a screenshot of the Status screen selected on the bottom-left corner. The
USB adapter settings are found in the File menu of the Digital Fusion GUI.
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EVM Configuration Using the Fusion GUI
Figure 5-2. TPS53819A GUI Configure General Tab
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EVM Configuration Using the Fusion GUI
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Figure 5-3. TPS53819A GUI Configure, All Config Tab
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EVM Configuration Using the Fusion GUI
Figure 5-4. TPS53819A GUI Status
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Test Procedure
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6 Test Procedure
6.1 Line and Load Regulation and Efficiency Measurement Procedure
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
Set up the EVM as described in Section 4 and Figure 4-3.
Ensure the load is set to constant resistance mode and to sink 0 ADC.
Ensure the jumper provided in the EVM shorts on J2 before VIN is applied.
Increase VIN from 0 V to 12 V, using V1 to measure input voltage.
Remove the jumper on J3 to enable the controller.
Use V2 to measure VOUT voltage.
Vary Load from 0 ADC to 25 ADC. VOUT should remain in load regulation.
Vary VIN from 8 V to 14 V. VOUT should remain in line regulation.
Put the jumper on J3 to disable the controller.
Decrease the load to 0 A.
Decrease VIN to 0 V.
6.2 Control Loop Gain and Phase Measurement Procedure
TPS53819AEVM-123 contains a place holder for a 10-Ω series resistor in the feedback loop for loop response
analysis.
1.
2.
3.
4.
5.
6.
7.
8.
Replace R16 with a 10-Ω resistor.
Set up EVM as described in Section 4 and Figure 4-3.
Connect isolation transformer to test points marked TP13 and TP11.
Connect input signal amplitude measurement probe (Loop B) to TP11. Connect output signal amplitude
measurement probe (Loop A) to TP13.
Connect ground lead of Loop A and Loop B to TP12.
Inject around 10 mV or less signal through the isolation transformer.
Sweep the frequency from 100 Hz to 1 MHz with 10 Hz or lower post filter. The control loop gain and phase
margin can be measured.
Disconnect isolation transformer from bode plot test points before making other measurements (Signal
injection into feedback can interfere with accuracy of other measurements).
6.3 Equipment Shutdown
1. Shut down the load.
2. Shut down VIN.
3. Shut down fan.
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Performance Data and Typical Characteristic Curves
7 Performance Data and Typical Characteristic Curves
Figure 7-1 through Figure 7-4 present typical performance curves for TPS53819AEVM-123.
7.1 Efficiency
100
90
80
Efficiency (%)
70
60
50
40
8VIN DCM
12VIN DCM
14VIN DCM
8VIN FCCM
12VIN FCCM
14VIN FCCM
30
20
10
0
0.001
0.01
0.1
1
10
100
Output Current (A)
G000
Figure 7-1. TPS53819AEVM-123 Efficiency
7.2 Load Regulation
1.205
VIN = 12V
Output Voltage Deviation (%)
1.204
1.203
1.202
1.201
DCM
FCCM
1.2
0
5
10
15
20
25
Output Current (A)
G000
Figure 7-2. TPS53819AEVM-123 Load Regulation
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Performance Data and Typical Characteristic Curves
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7.3 Line Regulation
1.204
Output Voltage Deviation (%)
12VIN 15A Load
1.202
1.2
1.198
1.196
5
6
7
8
9
10
Input Voltage (V)
11
12
13
14
G000
Figure 7-3. TPS53819AEVM-123 Line Regulation
7.4 fSW Versus Load
1000000
Switching Frequency (Hz)
100000
10000
1000
100
10
12VIN DCM
12VIN FCCM
1
0.01
0.1
1
Input Voltage (V)
10
100
G000
Figure 7-4. TPS53819AEVM-123 fSW Versus Load
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Performance Data and Typical Characteristic Curves
7.5 Bode Plot
180
60
40
120
20
60
0
0
Phase (°)
Gain (dB)
12VIN 25A Load
−60
−20
−120
−40
Gain
Phase
−60
10
100
1000
10000
100000
−180
1000000
Frequency (Hz)
G000
Figure 7-5. TPS53819AEVM-123 Loop Response Gain and Phase
7.6 Transient Response
IOUT
VOUT AC
Figure 7-6. TPS53819AEVM-123 Load Transient, 12 VIN, 0-A to 15-A Eco-mode
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Performance Data and Typical Characteristic Curves
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IOUT
VOUT AC
Figure 7-7. TPS53819AEVM-123 Load Transient, 12 VIN, 0-A to 15-A FCCM
7.7 Output Ripple
VIN AC
SW
VOUT AC
Figure 7-8. TPS53819AEVM-123 Output Ripple, 12 VIN, 25 A
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Performance Data and Typical Characteristic Curves
SW
VOUT AC
Figure 7-9. TPS53819AEVM-123 Output Ripple, 12 VIN, 1-A Load Eco-mode
7.8 Switching Node
SW
Figure 7-10. TPS53819AEVM-123 Switching Node, 12-VIN, 25-A Load Full Bandwidth
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Performance Data and Typical Characteristic Curves
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7.9 Turn-On Waveform
EN
VREG
VOUT
PG
Figure 7-11. TPS53819AEVM-123 Enable Turn-On Waveform, 12-VIN, 1-Ω Load
VIN
VREG
VOUT
PG
Figure 7-12. TPS53819AEVM-123 VIN Turn-On Waveform, 12-VIN, 1-Ω Load
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Performance Data and Typical Characteristic Curves
7.10 Turn-Off Waveform
EN
VREG
VOUT
PG
Figure 7-13. TPS53819AEVM-123 Enable Turn-Off Waveform, 12 VIN, 1-Ω Load
VIN
VREG
VOUT
PG
Figure 7-14. TPS53819AEVM-123 VIN Turn off Waveform, 12 VIN, 1-Ω Load
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Performance Data and Typical Characteristic Curves
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7.11 Pre-bias Turn-On Waveform
EN
VREG
VOUT
PG
Figure 7-15. TPS53819AEVM-123 Enable Turn-On Waveform, 12 VIN, 1-Ω Load, 1-V Pre-bias
7.12 Thermal Images
Hottest point is the CSD87350Q5D
Figure 7-16. TPS53819AEVM-123 Top Board, 12 VIN, 25-A Fan
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Performance Data and Typical Characteristic Curves
Hottest point is below the CSD87350Q5D
Figure 7-17. TPS53819AEVM-123 Bottom Board, 12 VIN, 25-A Fan
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EVM Assembly Drawing and PCB layout
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8 EVM Assembly Drawing and PCB layout
Figure 8-1 through Figure 8-8 show the design of the TPS53819AEVM-123 printed-circuit board (PCB). The
EVM has been designed using six layers, 2-oz copper circuit board.
Figure 8-1. TPS53819AEVM-123 Top Layer Assembly Drawing (Top View)
Figure 8-2. TPS53819AEVM-123 Bottom Layer Assembly Drawing (Bottom View)
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EVM Assembly Drawing and PCB layout
Figure 8-3. TPS53819AEVM-123 Top Copper (Top View)
Figure 8-4. TPS53819AEVM-123 Internal Layer 1 (Top View)
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EVM Assembly Drawing and PCB layout
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Figure 8-5. TPS53819AEVM-123 Internal Layer 3 (Top View)
Figure 8-6. TPS53819AEVM-123 Internal Layer 4 (Top View)
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EVM Assembly Drawing and PCB layout
Figure 8-7. TPS53819AEVM-123 Internal Layer 5 (Top View)
Figure 8-8. TPS53819AEVM-123 Bottom Copper (Top View)
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Bill of Materials
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9 Bill of Materials
Table 9-1. TPS53819AEVM-123 List of Materials
COUN REFDES
T
DESCRIPTION
PART NUMBER
MFR
4
C1–C4
Capacitor, Ceramic, 22 μF, 16 V, X5R, 10%
GRM31CR61C226ME15L
Murata
2
C5, C7
Capacitor, Ceramic, 0.1 μF, 50 V, X7R, 10%
Std
Std
0
C6
Capacitor, OSCON, 330 μF, 16 V
16SEP330M
Sanyo
1
C8
Capacitor, Ceramic, 1000 pF, 50 V, X7R, 20%
Std
Std
0
C9, C17
Capacitor, Ceramic, 50 V, X7R, 10%
Std
Std
5
C10–C14
Capacitor, Ceramic, 100 μF, 6.3 V, X5R, 20%
GRM32ER60J107ME20L
Murata
0
C15–C16
Capacitor, POSCAP, SMT, 2.5 V, 330 μF, 8 mΩ
2R5TPE330M9 or 6TPE330MIL
Sanyo
2
C18, C19
Capacitor, Ceramic, 1 μF, 16 V, X7R, 10%
Std
Std
2
J1, J3
Terminal Block, 4-pin, 15-A, 5.1 mm
ED120/4DS
OST
1
J2
Header, Male 2-pin, 100-mil spacing
PEC02SAAN
Sullins
1
J4
Connector, Male Straight 2 × 5 pin, 100-mil spacing, 4 Wall
N2510-6002RB
3M
1
L1
Inductor, Toroid, 0.440 μH, 30 A, 0.0032 Ω
PA0513.441NLT or 744309047
Pulse or
WE
1
Q1
MOSFET, Dual N-Chan, 30 V 27 A
CSD87350Q5D
TI
4
R1–R2, R14–R15
Resistor, Chip, 100 kΩ, 1/16W, 1%
Std
Std
1
R3
Resistor, Chip, 300 kΩ, 1/16W, 1%
Std
Std
1
R4
Resistor, Chip, 1.00 kΩ, 1/16W, 1%
Std
Std
2
R6
Resistor, Chip, 4.7 Ω, 1/16W, 1%
Std
Std
1
R9
Resistor, Chip, 3 Ω, 1/4W, 1%
Std
Std
0
R7, R13
Resistor, Chip, 1/16W, 1%
Std
Std
1
R10
Resistor, Chip, 39.2 kΩ, 1/16W, 1%
Std
Std
5
R5, R8, R11–R12,
R16
Resistor, Chip, 0 Ω, 1/10W, 1%
Std
Std
2
R17–R18
Resistor, Chip, 10.0 kΩ, 1/16W, 1%
Std
Std
10
TP1–TP3, TP5–
TP8, TP10–TP11,
TP13
Test Point, Red, Thru Hole Color Keyed
5000
Keystone
3
TP4, TP9, TP12
Test Point, Black, Thru Hole Color Keyed
5001
Keystone
1
U1
IC, Single Synchronous Step-Down Controller with PMBus
TPS53819ARGT
TI
1
—
Shunt, 100-mil, Black
929950-00
3M
1
—
PCB, 2.5 inch × 3.3 inch × 0.062 inch
PWR123
Any
4
—
STANDOFF HEX .375"L 4-40THR NYL
1902B
Keystone
4
—
STANDOFF M/F HEX 4-40 NYL 1.00"L
4806
Keystone
10 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2012) to Revision B (November 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................2
• Updated the user's guide title............................................................................................................................. 2
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