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TPS61162A, TPS61163A
SLVSC26A – NOVEMBER 2013 – REVISED JUNE 2015
TPS6116xA Dual-Channel WLED Drivers For Smart Phones
1 Features
3 Description
•
•
•
•
•
•
The TPS61162A and TPS61163A are dual-channel
WLED drivers which provide highly integrated
solutions for single-cell Li-ion battery powered smart
phone backlight. The devices have a built-in high
efficiency boost regulator with integrated 1.5-A, 40-V
power MOSFET and support as low as 2.7-V input
voltage. With two high current-matching capability
current sink regulators, the devices can drive up to
10s2p WLED diodes. The boost output can
automatically adjust to the WLED forward voltage and
allow very low voltage headroom control, thus to
improve LED strings efficiency effectively.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
2.7-V to 6.5-V Input Voltage
Integrated 1.5-A/40-V MOSFET
1.2-MHz Switching Frequency
Dual Current Sinks of up to 30-mA Current Each
1% Typical Current Matching and Accuracy
Optional 26.5-V / 37.5-V OVP Threshold
– TPS61162A: 26.5-V OVP
– TPS61163A: 37.5-V OVP
Adaptive Boost Output to WLED Voltages
Very Low Voltage Headroom Control (90 mV)
Flexible Digital and PWM Brightness Control
One-Wire Control Interface (EasyScale™)
PWM Dimming Control Interface
Up to 100:1 PWM Dimming Ratio
Up to 9-Bit Dimming Resolution
Up to 90% Efficiency
Built-in Soft Start
PFM Mode at Light Load
Overvoltage Protection
Built-in WLED Open/Short Protection
Thermal Shutdown
Supports 4.7-µH Inductor Application
The TPS61162A and TPS61163A support both the
PWM dimming interface and one-wire digital
EasyScale™ dimming interface and can realize 9-bit
brightness code programming.
The TPS61162A and TPS61163A integrate built-in
soft start, as well as overvoltage, overcurrent, and
thermal shutdown protections.
Device Information(1)
PART NUMBER
TPS61162A
DSBGA (9)
TPS61163A
Smart Phones
PDAs, Handheld Computers
GPS Receivers
Backlight for Small and Media Form-Factor LCD
Display with Single-Cell Battery Input
OPEN LED PROTECTION
TPS61162A use 26.5 V (typical)
TPS61162A use 37.5 V (typical)
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
2 Applications
•
•
•
•
PACKAGE
L1
4.7µH
2.7V ~ 6.5V
D1
VBAT
C1
1µF
R2
10
SW
VIN
C2
1µF
C3
1µF
Enable /
Disable
EN
PWM
Dimming
PWM
TPS61162A/3A
IFB1
COMP
IFB2
C4
330nF
ISET
GND
R1
63.4k
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61162A, TPS61163A
SLVSC26A – NOVEMBER 2013 – REVISED JUNE 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
EasyScale Timing Requirements..............................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 12
7.5 Programming........................................................... 14
8
Application and Implementation ........................ 17
8.1 Application Information............................................ 17
8.2 Typical Application ................................................. 17
9 Power Supply Recommendations...................... 25
10 Layout................................................................... 26
10.1 Layout Guidelines ................................................. 26
10.2 Layout Example .................................................... 26
11 Device and Documentation Support ................. 27
11.1
11.2
11.3
11.4
11.5
11.6
Device Support......................................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
27
27
27
27
27
27
12 Mechanical, Packaging, and Orderable
Information ........................................................... 27
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (November 2013) to Revision A
Page
•
Added Pin Configuration and Functions section, ESD Rating table, Feature Description , Device Functional Modes,
Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support ,
and Mechanical, Packaging, and Orderable Information sections; ....................................................................................... 1
•
Deleted Ordering Information ................................................................................................................................................. 1
2
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SLVSC26A – NOVEMBER 2013 – REVISED JUNE 2015
5 Pin Configuration and Functions
YFF Package
9-Pin DSBGA
Bottom View
Top View
1
2
3
3
2
1
A
ISET
IFB2
IFB1
IFB1
IFB2
ISET
A
B
PWM
COMP
GND
GND
COMP
PWM
B
C
EN
VIN
SW
SW
VIN
EN
C
Pin Functions
PIN
NUMBER
NAME
I/O
DESCRIPTION
A1
ISET
I
Full-scale LED current set pin. Connecting a resistor to the pin programs the full-scale LED
current.
A2
IFB2
I
Regulated current sink input pin
A3
IFB1
I
Regulated current sink input pin
B1
PWM
I
PWM dimming signal input
B2
COMP
O
Output of the transconductance error amplifier. Connect external capacitor to this pin to
compensate the boost loop.
B3
GND
—
Ground
C1
EN
I
Enable control and one-wire digital signal input
C2
VIN
I
Supply input pin
C3
SW
I
Drain connection of the internal power MOSFET
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Voltage (2)
(1)
MIN
MAX
VIN, EN, PWM, IFB1, IFB2
–0.3
7
COMP, ISET
–0.3
3
SW
–0.3
40
V
PD
Continuous power dissipation
TJ
Operating junction temperature
–40
150
Tstg
Storage temperature
–65
150
(1)
(2)
UNIT
See Thermal Information
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
V(ESD)
Electrostatic discharge
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±750
Machine model (MM)
(1)
(2)
UNIT
±2000
V
200 (max)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VIN
Input voltage
NOM
MAX
UNIT
2.7
6.5
V
4.7
10
µH
TPS61162A
VOUT
Output voltage
L
Inductor
CI
Input capacitor
1
CO
Output capacitor
1
CCOMP
Compensation capacitor
FPWM
PWM dimming signal frequency
TJ
Operating junction temperature
TPS61163A
µF
2.2
µF
10
100
kHz
–40
125
°C
330
nF
6.4 Thermal Information
TPS61162A/63A
THERMAL METRIC (1)
YFF (DSBGA)
UNIT
9 PINS
RθJA
Junction-to-ambient thermal resistance
107
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
0.9
°C/W
Junction-to-board thermal resistance
18.1
°C/W
ψJT
Junction-to-top characterization parameter
4.0
°C/W
ψJB
Junction-to-board characterization parameter
18
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
NA
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SLVSC26A – NOVEMBER 2013 – REVISED JUNE 2015
6.5 Electrical Characteristics
VIN = 3.6 V, EN = high, PWM = high, IFB current = 20 mA, TJ = –40°C to 125°C, typical values are at TJ = 25°C (unless
otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
VIN
Input voltage range
2.7
VIN falling
VVIN_UVLO
Undervoltage lockout threshold
VVIN_HYS
VIN UVLO hysteresis
Iq
Operating quiescent current into
VIN
Device enable, switching 1.2 MHz and no
load, VIN = 3.6 V
ISD
Shutdown current
EN = low
6.5
2.2
VIN rising
V
2.3
V
2.45
100
mV
1.2
2
mA
1
2
µA
EN and PWM
VH
EN Logic high
VL
EN Logic Low
1.2
V
VH
PWM Logic high
VL
PWM Logic Low
RPD
EN pin and PWM pin internal
pulldown resistor
tPWM_SD
PWM logic low width to shutdown
PWM high to low
20
ms
tEN_SD
EN logic low width to shutdown
EN high to low
2.5
ms
1.204
0.4
V
1.2
V
0.4
400
800
V
1600
kΩ
CURRENT REGULATION
VISET_full
ISET pin voltage
Full brightness
KISET_full
Current multiplier
Full brightness
IFB_avg
Current accuracy
KM
(IMAX – IAVG) / IAVG
IIFB_max
Current sink max output current
IISET = 20 μA, D = 100%, 0°C to 70°C
IISET = 20 µA, D = 100%, –40°C to 85°C
1.229
–2%
2%
–2.3%
2.3%
D = 100%
1%
D = 25%
1%
IISET = 35 μA, each IFBx pin
1.253
V
1030
2%
30
mA
POWER SWITCH
RDS(on)
Switch MOSFET on-resistance
ILEAK_SW
Switch MOSFET leakage current
VIN = 3.6 V
0.25
VIN = 3 V
Ω
0.3
VSW = 35 V, TJ = 25°C
1
µA
1500
kHz
OSCILLATOR
fSW
Dmax
Oscillator frequency
Measured on the drive signal of switch
MOSFET
Maximum duty cycle
1000
1200
89%
95%
BOOST VOLTAGE CONTROL
IIFBx = 20 mA, measured on IFBx pin
which has a lower voltage
VIFB_reg
IFBx feedback regulation voltage
90
mV
Isink
COMP pin sink current
Isource
COMP pin source current
12
µA
Gea
Error amplifier transconductance
Rea
Error amplifier output resistance
45.5
MΩ
fea
Error amplifier crossover frequency 5 pF connected to COMP pin
1.65
MHz
5
30
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55
µA
80
µmho
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Electrical Characteristics (continued)
VIN = 3.6 V, EN = high, PWM = high, IFB current = 20 mA, TJ = –40°C to 125°C, typical values are at TJ = 25°C (unless
otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
1
1.5
2
UNIT
PROTECTION
ILIM
Switch MOSFET current limit
D = Dmax, 0°C to 70°C
ILIM_Start
Switch MOSFET start-up current
limit
D = Dmax
tHalf_LIM
Time window for half current limit
VOVP_SW
SW pin overvoltage threshold
VOVP_IFB
IFBx pin overvoltage threshold
VACKNL
Acknowledge output voltage low
Open drain, Rpullup = 15 kΩ to
VIN (1)
0.7
A
A
5
ms
TPS61162A
25
26.5
28
TPS61163A
36
37.5
39
Measured on IFBx pin
4.2
4.5
5
V
0.4
V
V
THERMAL SHUTDOWN
Tshutdown
Thermal shutdown threshold
160
°C
Thys
Thermal shutdown hysteresis
15
°C
(1)
Acknowledge condition active 0, this condition is only applied when the RFA bit is set to 1. To use this feature, master must have an
open drain output, and the data line needs to be pulled up by the master with a resistor load.
6.6 EasyScale Timing Requirements
MIN
NOM
MAX
UNIT
tes_delay
EasyScale detection delay, measured from EN low to high
100
tes_det
EasyScale detection time, EN pin low time
260
µs
tes_win
EasyScale detection window, easured from EN low to high (1)
1
ms
tstart
Start time of program stream
2
tEOS
End time of program stream
2
360
µs
tH_LB
High time of low bit (Logic 0)
2
180
µs
tL_LB
Low time of low bit (Logic 0)
2 x tH_LB
360
µs
tH_HB
High time of high bit (Logic 1)
2 x tL_HB
360
µs
tL_HB
Low time high bit (Logic 1)
2
180
µs
tvalACKN
Acknowledge valid time
2
µs
tACKN
Duration of acknowledge condition
512
µs
(1)
6
µs
µs
To select EasyScale interface, after tes_delay delay from EN low to high, drive EN pin to low for more than tes_det before tes_win expires.
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6.7 Typical Characteristics
Io - Output Current (mA)
50
PWM
Voltage
2V/div
DC
40
Inductor
Current
200mA/div
DC
30
20
VIN = 3V
VIN = 3.6V
10
VIN = 4.2V
VIN = 5V
0
0
20
40
60
80
Output
Voltage
20V/div
DC
Output
Current
20mA/div
DC
PWM Freq = 20kHz, Duty = 50%
100
t - Time - 10ms/div
Dimming Duty Cycle (%)
Figure 1. Dimming Linearity
Figure 2. Startup Waveform
PWM
Voltage
2V/div
DC
PWM
Voltage
2V/div
DC
Inductor
Current
200mA/div
DC
Inductor
Current
200mA/div
DC
Output
Voltage
20V/div
DC
Output
Voltage
20V/div
DC
Output
Current
20mA/div
DC
Output
Current
20mA/div
DC
Duty = 100%
PWM Freq = 20kHz, Duty = 50%
t - Time - 10ms/div
t - Time - 10ms/div
Figure 4. Shutdown Waveform
Figure 3. Shutdown Waveform
PWM
Voltage
2V/div
DC
Inductor
Current
200mA/div
DC
Output
Voltage
20V/div
DC
Output
Current
20mA/div
DC
Duty = 100%
t - Time - 10ms/div
Figure 5. Startup Waveform
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7 Detailed Description
7.1 Overview
The TPS61162A, TPS61163A is a high-efficiency, dual-channel white LED driver for smart-phone backlighting
applications. Two current sink regulators of high current-matching capability are integrated in the
TPS61162A,TPS61163A to support dual LED strings connection and to improve the current balance and protect
the LED diodes when either LED string is open or short.
The TPS61162A, TPS61163A has integrated all of the key function blocks to power and control up to 20 white
LED diodes. It includes a 1.5-A, 40-V boost converter, two current-sink regulators, and protection circuit for
overcurrent, overvoltage, and thermal shutdown protection.
In order to provide high brightness backlighting for large size or high resolution smart phone panels, more and
more white LED diodes are used. Having all LED diodes in a string improves overall current matching; however,
the output voltage of a boost converter will be limited when input voltage is low, and normally the efficiency will
drop when output voltage goes very high. Thus, the LED diodes are arranged in two parallel strings.
7.2 Functional Block Diagram
L1
VBAT
D1
R2
10
C1
1µF
VOUT
C2
1µF
VIN
SW
C3
1µF
SW OVP
UVLO /
Internal Regulator
R
OSC
Q
S
OCP
GND
Slope
Compensation
S
Vref
Comp
GM
COMP
120mV
OPAMP Vclamp
C4
330nF
COMP clamp circuit
UVLO
IFBx Voltage
Detection / OVP
SW OVP
EN
Enable / Disable
Detection
Shutdown
Control
Dual-Channel
Current Sinks
IFB1
EA
PWM
Duty Decoding
ISET
Current Sink 1
Analog Dimming Control
R1
63.4k
IFB2
Current Sink 2
8
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7.3 Feature Description
7.3.1 Boost Converter
The boost converter of the TPS61162A, TPS61163A integrates a 1.5-A, 40-V low-side switch MOSFET and has
a fixed switching frequency of 1.2 MHz. The control architecture is based on traditional current-mode Pulse Width
Modulation (PWM) control. For operation see the Functional Block Diagram. Two current sinks regulate the dualchannel current, and the boost output is automatically set by regulating voltage on the IFBx pin. The output of
error amplifier and the sensed current of switch MOSFET are applied to a control comparator to generate the
boost switching duty cycle; slope compensation is added to the current signal to allow stable operation for duty
cycles larger than 50%.
The forward voltages of two LED strings are normally different due to the LED diode forward voltage
inconsistency; thus, the IFB1 and IFB2 voltages are normally different. The TPS61162A, TPS61163A can select
out the IFBx pin which has a lower voltage than the other and regulate its voltage to a very low value (90 mV
typical), which is enough for the two current sinks' headroom. In this way, the output voltage of the boost
converter is automatically set and adaptive to LED strings' forward voltages, and the power dissipation of the
current sink regulators can be reduced remarkably with this very low headroom voltage.
In order to improve the boost efficiency at light load, Pulse Frequency Modulation (PFM) mode is automatically
enabled under light load conditions. When the load current decreases along with the dimming duty, the output of
gm amplifier — COMP pin voltage decreases until it is clamped at an internal reference voltage. Because COMP
pin voltage controls the inductor peak current, when it is clamped the inductor peak current is also clamped and
cannot decrease. As a result, more energy than needed is transferred to the output stage, and the output voltage
and IFBx pin voltage increase. An internal hysteresis comparator detects the minimum IFBx pin voltage. When
the minimum IFBx voltage is detected as higher than the regulation voltage 90 mV by around 120 mV, the boost
stops switching. Then the output voltage, as well as IFBx pin voltage, decrease. When the minimum IFBx voltage
is lower than the hysteresis (around 40 mV), the boost switches again. Thus, during PFM mode the boost output
trips between the low and high thresholds. When the load increases along with the dimming duty, the COMP pin
voltage will exit from the clamped status, and the boost will exit the PFM mode and return to the PWM operation,
during which the minimum IFBx pin voltage is regulated at 90 mV again. Refer to Figure 23 and Figure 24 for
PFM mode operation.
7.3.2 IFBx Pin Unused
If only one channel is needed, a user can easily disable the unused channel by connecting its IFBx pin to
ground. If both IFBx pins are connected to ground, the device will not start up.
7.3.3 Enable and Start-up
In order to enable the device from shutdown mode, three conditions have to be met:
1. POR (Power On Reset, that is, VIN voltage is higher than UVLO threshold);
2. Logic high on EN pin; and
3. PWM signal (logic high or PWM pulses) on PWM pin.
When these conditions are all met, an internal LDO linear regulator is enabled to provide supply to internal
circuits and the device can start up.
The TPS61162A, TPS61163A support two dimming interfaces: one-wire digital interface (EasyScale interface)
and PWM interface. TPS61162A, TPS61163A begin an EasyScale detection window after start-up to detect
which interface is selected. If the EasyScale interface is needed, signals of a specific pattern should be input into
EN pin during the EasyScale detection window; otherwise, PWM dimming interface will be enabled (see details in
One-Wire Digital Interface (EasyScale Interface)).
After the EasyScale detection window, the TPS61162A, TPS61163A check the status of IFBx pins. If one IFBx
pin is detected to connect to ground, the corresponding channel will be disabled and removed from the control
loop. Then the soft-start begins, and the boost converter starts switching. If both IFBx pins are shorted to ground,
the TPS61162A, TPS61163A will not start up.
Either pulling EN pin low for more than 2.5 ms or pulling PWM pin low for more than 20 ms can disable the
device, and the TPS61162A, TPS61163A enters into shutdown mode.
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Feature Description (continued)
If the EasyScale is selected as unique control to enable/disable and change brightness for
TPS61162A,TPS61163A, it is required to pull EN pin more than 100 ms to enable the TPS61162A, TPS61163A
from the previous disable. The 100-ms time period can ensure the fully voltage discharge remained on IFBx pin.
7.3.4 Soft Start
Soft start is implemented internally to prevent voltage over-shoot and in-rush current. After the IFBx pin status
detection, the COMP pin voltage starts ramp up, and the boost starts switching. During the beginning 5 ms
(tHalf_LIM) of the switching, the peak current of the switch MOSFET is limited at ILIM_Start (0.7 A typical) to avoid the
input inrush current. After the 5 ms, the current limit is changed to ILIM (1.5 A typical) to allow the normal
operation of the boost converter.
7.3.5 Full-Scale Current Program
The dual channels of the TPS61162A, TPS61163A can provide up to 30 mA current each. It does not matter
whether either the EasyScale interface or PWM interface is selected, the full-scale current (current when
dimming duty cycle is 100%) of each channel should be programmed by an external resistor RISET at the ISET
pin according to Equation 1.
VISET _ full
IFB _ full =
´ KISET _ full
RISET
where
•
•
•
•
IFB_full, full-scale current of each channel
KISET_full = 1030 (Current multiple when dimming duty cycle = 100%)
VISET_full = 1.229 V (ISET pin voltage when dimming duty cycle = 100%)
RISET = ISET pin resistor
(1)
7.3.6 Brightness Control
The TPS61162A, TPS61163A controls the DC current of the dual channels to realize the brightness dimming.
The DC current control is normally referred to as analog dimming mode. When the DC current of LED diode is
reduced, the brightness is dimmed.
The TPS61162A, TPS61163A can receive either the PWM signals at the PWM pin (PWM interface) or digital
commands at the EN pin (EasyScale interface) for brightness dimming. If the EasyScale interface is selected, the
PWM pin should be kept high; if PWM interface is selected, the EN pin should be kept high.
7.3.7 Undervoltage Lockout
An undervoltage lockout circuit prevents the operation of the device at input voltages below undervoltage
threshold (2.2 V typical). When the input voltage is below the threshold, the device is shut down. If the input
voltage rises by undervoltage lockout hysteresis, the device restarts.
7.3.8 Overvoltage Protection
Overvoltage protection circuitry prevents device damage as the result of white LED string disconnection or
shortage.
The TPS61162A/TPS61163A monitors the voltages at SW pin and IFBx pin during each switching cycle. No
matter either SW OVP threshold VOVP_SW or IFBx OVP threshold VOVP_FB is reached due to the LED string open
or short issue, the protection circuitry will be triggered. Refer to Figure 6 and Figure 7 for the protection actions.
If one LED string is open, its IFBx pin voltage drops, and the boost output voltage is increased by the control
loop as it tries to regulate this lower IFBx voltage to the target value (90mV typical). For the normal string, its
current is still under regulation but its IFBx voltage increases along with the output voltage. During the process,
either the SW voltage reaches its OVP threshold VOVP_SW or the normal string’s IFBx pin voltage reaches the
IFBx OVP threshold VOVP_FB, then the protection circuitry will be triggered accordingly.
If both LED strings are open, both IFBx pins’ voltages drop to ground, and the boost output voltage is increased
by the control loop until reaching the SW OVP threshold VOVP_SW, the SW OVP protection circuitry is triggered,
and the device is latched off. Only VIN POR or EN/PWM pin toggling can restart the IC.
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Feature Description (continued)
One LED diode short in a string is allowed for the TPS61162A, TPS61163A. If one LED diode in a string is short,
the normal string’s IFBx voltage is regulated to about 90 mV, and the abnormal string’s IFBx pin voltage will be
higher. Normally with only one diode short, the higher IFBx pin voltage does not reach the IFBx OVP threshold
VOVP_FB, so the protection circuitry will not be triggered.
If more than one LED diodes are short in a string, as the boost loop regulates the normal string’s IFBx voltage to
90 mV, this abnormal string’s IFBx pin voltage is much higher and will reach VOVP_FB, then the protection circuitry
is triggered.
The SW OVP protection will also be triggered when the forward voltage drop of an LED string exceeds the SW
OVP threshold. In this case, the device turns off the switch FET and shuts down.
Soft Start /
Normal Operation
SW > VOVP for 16~32
switching cycles?
No
Yes
Latch off
Figure 6. SW OVP Action
Normal Operation
IFBx > VIFB_OVP for
24~32 switching
cycles?
No (caused by transient)
Yes
Another string is no
use?
Yes (single string application,
caused by transient)
Boost stops
switching, current
sink(s) keep on
No
No (dual string application,
caused by transient)
Another VIFBx < 0.5V?
Yes (caused by open string or
more than two LED diodes
short in a string)
Boost stops switching,
disable the current sink
with VIFBx < 0.5V
VIFBx < VIFB_OVP_hys?
Yes (to recover boost
switching)
Figure 7. VIFBx OVP Action
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Feature Description (continued)
7.3.9 Overcurrent Protection
The TPS61162A, TPS61163A have a pulse-by-pulse overcurrent limit. The boost switch turns off when the
inductor current reaches this current threshold, and it remains off until the beginning of the next switching cycle.
This protects the TPS61162A, TPS61163A and external component under overload conditions.
7.3.10 Thermal Shutdown
An internal thermal shutdown turns off the device when the typical junction temperature of 160°C is exceeded.
The device is released from shutdown automatically when the junction temperature decreases by 15°C.
7.4 Device Functional Modes
7.4.1 One-Wire Digital Interface (EasyScale Interface)
The EN pin features a simple digital interface to allow digital brightness control. The digital dimming interface can
save the processor power and battery life as it does not require PWM signals all the time, and the processor can
enter idle mode if possible. In order to enable the EasyScale interface, the following conditions must be satisfied,
and the specific digital pattern on the EN pin must be recognized by the device every time the TPS61162A,
TPS61163A starts up from shutdown mode.
1. VIN voltage is higher than UVLO threshold, and PWM pin is pulled high.
2. Pull EN pin from low to high to enable the TPS61162A, TPS61163A. At this moment, the EasyScale
detection window starts.
3. After EasyScale detection delay time (tes_delay, 100 µs), drive EN to low for more than EasyScale detection
time (tes_detect, 260 µs).
The third step must be finished before the EasyScale detection window (tes_win, 1 ms) expires, and once this step
is finished, the EasyScale interface is enabled, and the EasyScale communication can start. Refer to Figure 8 for
a graphical explanation.
Insert battery
PWM Signal
high
PWM
low
Enter ES mode
ES Detection
Window
Programming
code
Programming code
high
EN
low
ES detect time
EasyScale
mode
Shutdown
Ramp up
delay
ES detect delay
IFBx
Ramp up
Programmed value
(if not programmed, full current default )
IC
Shutdown
Startup delay
Startup delay
Figure 8. Easyscale Interface Detection
The TPS61162A, TPS61163A support 9-bit brightness code programming. By the EasyScale interface, a master
can program the 9-bit code D8(MSB) to D0(LSB) to any of 511 steps with a single command. The default code
value of D8~D0 is “111111111” when the device is first enabled, and the programmed value will be stored in an
internal register and set the dual-channel current according to Equation 2. The code will be reset to default value
when the device is shut down or disabled.
Code
I FBx = IFB_full ´
511
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Device Functional Modes (continued)
where
•
•
IFB_full: the full-scale LED current set by the RISET at ISET pin.
Code: the 9-bit brightness code D8~D0 programmed by EasyScale interface
(2)
When the one-wire digital interface at EN pin is selected, the PWM pin can be connected to either the VIN pin or
a GPIO (refer to Additional Application Circuits). If PWM pin is connected to VIN pin, EN pin alone can enable
and disable the device — pulling EN pin low for more than 2.5 ms disables the device; if PWM pin is connected
to a GPIO, both PWM and EN signals should be high to enable the device, and either pulling EN pin low for more
than 2.5 ms or pulling PWM pin low for more than 20 ms disables the device.
7.4.2 PWM Control Interface
The PWM control interface is automatically enabled if the EasyScale interface fails to be enabled during startup.
In this case, the TPS61162A, TPS61163A receives PWM dimming signals on the PWM pin to control the
backlight brightness. When using PWM interface, the EN pin can be connected to VIN pin or a GPIO (refer to
Additional Application Circuits). If EN pin is connected to VIN pin, PWM pin alone is used to enable and disable
the device: pulling PWM pin high or apply PWM signals at PWM pin to enable the device and pulling PWM pin
low for more than 20 ms to disable the device; if EN pin is connected to a GPIO, either pulling EN pin low for
more than 2.5 ms or pulling PWM pin low for more than 20 ms can disable the device. Only after both EN and
PWM signals are applied, the TPS61162A/TPS61163A can start up. Refer to Figure 9 for a graphical
explanation.
Insert battery
Insert battery
EN signal
EN signal
high
high
EN
low
low
PWM signal
PWM signal
high
high
PWM
PWM
low
low
PWM
mode
Startup
delay
Ramp up
Startup
delay
Shutdown delay
Full current x PWM Duty
IFBx
t
Ramp up
Shutdown delay
Full current x PWM Duty
Shut down by
PWM signal
Shut down by
EN signal
IFBx
t
Figure 9. PWM Control Interface Detection
When the PWM pin is constantly high, the dual channel current is regulated to full scale according to Equation 1.
The PWM pin allows PWM signals to reduce this regulation current according to the PWM duty cycle; therefore,
it achieves LED brightness dimming. The relationship between the PWM duty cycle and IFBx current is given by
Equation 3.
I FBx = IFB_full ´ Duty
where
•
•
•
IFBx is the current of each current sink
IFB_full is the full-scale LED current
Duty is the duty cycle information detected from the PWM signals
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7.5 Programming
7.5.1 EasyScale Programming
EasyScale is a simple, but flexible, one-pin interface to configure the current of the dual channels. The interface
is based on a master-slave structure, where the master is typically a microcontroller or application processor and
the device is the slave. Figure 10 and Table 1 give an overview of the protocol used by TPS61162A/TPS61163A.
A command consists of 24 bits, including an 8-bit device address byte and a 16-bit data byte. All of the 24 bits
should be transmitted together each time, and the LSB bit should be transmitted first. The device address byte
D7(MSB)~D0(LSB) is fixed to 0x8F. The data byte includes 9 bits D8(MSB)~D0(LSB) for brightness information
and an RFA bit. The RFA bit set to "1" indicates the Request for Acknowledge condition. The Acknowledge
condition is only applied when the protocol is received correctly. The advantage of EasyScale compared with
other one pin interfaces is that its bit detection is in a large extent independent from the bit transmission rate. It
can automatically detect bit rates between 1.7 kBit/sec and up to 160 kBit/sec.
DATA IN
Data Byte
Start
D0
D1
D2
D3
D4
D5
D6
Address Byte
D7
D8
Bit 9 RFA
Bit 11 ~
Bit 15
D0
1
D1
1
D2
1
D3
1
D4
0
D5
0
D6
0
D7
1
EOS
DATA OUT
ACK
Figure 10. Easyscale Protocol Overview
Table 1. Easyscale Bit Description
BYTE
Device
Address
Byte
(0x8F)
14
BIT
NUMBER
NAME
23 (MSB)
DA7
DA7 = 1, MSB of device address
22
DA6
DA6 = 0
21
DA5
DA5 = 0
20
DA4
19
DA3
18
DA2
DA2 = 1
17
DA1
DA1 = 1
16
DA0
DA0 = 1, LSB of device address
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TRANSMISSION
DIRECTION
IN
DESCRIPTION
DA4 = 0
DA3 = 1
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Programming (continued)
Table 1. Easyscale Bit Description (continued)
BYTE
Data Byte
BIT
NUMBER
NAME
TRANSMISSION
DIRECTION
15
Bit 15
No information. Write 0 to this bit.
14
Bit 14
No information. Write 0 to this bit.
13
Bit 13
No information. Write 0 to this bit.
12
Bit 12
No information. Write 0 to this bit.
11
Bit 11
No information. Write 0 to this bit.
10
RFA
Request for acknowledge. If set to 1, device will pull low the data line
when it receives the command well. This feature can only be used
when the master has an open drain output stage and the data line
needs to be pulled high by the master with a pullup resistor;
otherwise, acknowledge condition is not allowed and don't set this bit
to 1.
9
Bit 9
8
D8
Data bit 8, MSB of brightness code
7
D7
Data bit 7
6
D6
Data bit 6
5
D5
Data bit 5
4
D4
Data bit 4
3
D3
Data bit 3
2
D2
Data bit 2
1
D1
Data bit 1
0 (LSB)
D0
Data bit 0, LSB of brightness code
DESCRIPTION
IN
t start
No information. Write 0 to this bit.
Data Byte
Address Byte
Static High
Static High
DATA IN
D0
D8
Bit 9
RFA
Bit 15
DA0
DA7
1
0
0
0
0
1
1
tEOS
Figure 11. Easyscale Timing, With RFA = 0
t start
DATA IN
Data Byte
Address Byte
Static High
Static High
D0
D8
Bit 9
RFA
Bit 15
DA0
DA7
1
0
0
1
0
1
1
tvalACK
Acknowledge
true, Data line
ACKN pulled down by
the IC
DATA OUT
(ACKN)
Master needs to pull up
Data line via a pullup
resistor to detect ACKN
DATA OUT
(ACK)
ACK
Acknowledge
false, no pull
down
Figure 12. Easyscale Timing, With RFA = 1
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tLow
tHigh tLow
Low Bit
(Logic 0)
tHigh
High Bit
(Logic 1)
Figure 13. Easyscale — Bit Coding
The 24-bit command should be transmitted with LSB first and MSB last. Figure 11 shows the protocol without
acknowledge request (Bit RFA = 0), Figure 12 with acknowledge request (Bit RFA = 1). Before the command
transmission, a start condition must be applied. For this, the EN pin must be pulled high for at least tstart (2 μs)
before the bit transmission starts with the falling edge. If the EN pin is already at high level, no start condition is
needed. The transmission of each command is closed with an End of Stream condition for at least tEOS (2 μs).
The bit detection is based on a Logic Detection scheme, where the criterion is the relation between tLOW and
tHIGH (refer to Figure 13). It can be simplified to:
Low Bit (Logic 0): tLOW ≥ 2 x tHIGH
High Bit (Logic 1): tHIGH ≥ 2 x tLOW
The bit detection starts with a falling edge on the EN pin and ends with the next falling edge. Depending on the
relation between tHIGH and tLOW, the logic 0 or 1 is detected.
The acknowledge condition is only applied if:
• Acknowledge is requested by setting RFA bit to 1.
• The transmitted device address matches with the device address of the IC.
• Total 24 bits are received correctly.
If above conditions are met, after tvalACK delay from the moment when the last falling edge of the protocol is
detected, an internal ACKN-MOSFET is turned on to pull the EN pin low for the time tACKN, which is 512 μs
maximum, then the Acknowledge condition is valid. During the tvalACK delay, the master controller keeps the line
low; after the delay, it should release the line by outputting high impedance and then detect the acknowledge
condition. If it reads back a logic 0, it means the device has received the command correctly. The EN pin can be
used again by the master when the acknowledge condition ends after tACKN time.
The acknowledge condition can only be requested when the master device has an open drain output. For a
push-pull output stage, the use of a series resistor in the EN line to limit the current to 500 μA is recommended
to for such cases as:
• An accidentally requested acknowledge, or
• To protect the internal ACKN-MOSFET.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS61162A, TPS61163A provide a complete high-performance LED lighting solution for mobile handsets.
They can drive up to 2 strings of white LEDs with up to 10 LEDs per string. A boost converter generates the high
voltage required for the LEDs. LED brightness can be controlled either by the PWM dimming interface or by the
single-wire EasyScale dimming interface.
8.2 Typical Application
L1
4.7µH
2.7V ~ 6.5V
D1
VBAT
R2
10
C1
1µF
C2
1µF
SW
VIN
C3
1µF
Enable /
Disable
EN
PWM
Dimming
PWM
TPS61162A/3A
IFB1
COMP
IFB2
C4
330nF
ISET
R1
63.4k
GND
Figure 14. TPS61162A/63A Typical Application
8.2.1 Design Requirements
For TPS61162A, TPS61163A typical applications, use the parameters listed in Table 2 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
2.7 V to 6.5 V
Boost switching frequency
1.2 MHz
Efficiency
up to 90%
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8.2.2 Detailed Design Procedure
8.2.2.1 Inductor Selection
Because the selection of inductor affects power supply’s steady-state operation, transient behavior, loop stability
and the boost converter efficiency, the inductor is one of the most important components in switching power
regulator design. There are three specifications most important to the performance of the inductor: inductor
value, DC resistance, and saturation current. The TPS61162A, TPS61163A are designed to work with inductor
values from 4.7 µH to 10 µH to support all applications. A 4.7-µH inductor is typically available in a smaller or
lower profile package, while a 10-µH inductor produces lower inductor ripple. If the boost output current is limited
by the overcurrent protection of the device, using a 10-µH inductor may maximize the controller’s output current
capability. A 22-µH inductor can also be used for some applications, such as 6s2p and 7s2p, but may cause
stability issue when more than eight WLED diodes are connected per string. Therefore, customers need to verify
the inductor in their application if it is different from the values in Recommended Operating Conditions.
Inductor values can have ±20% or even ±30% tolerance with no current bias. When the inductor current
approaches saturation level, its inductance can decrease 20% to 35% from the 0-A value depending on how the
inductor vendor defines saturation. When selecting an inductor, please make sure its rated current, especially the
saturation current, is larger than its peak current during the operation.
Follow Equation 4 to Equation 6 to calculate the inductor’s peak current. To calculate the current in the worst
case, use the minimum input voltage, maximum output voltage and maximum load current of the application. In
order to leave enough design margin, the minimum switching frequency (1 MHz for TPS61162A, TPS61163A),
the inductor value with –30% tolerance, and a low power conversion efficiency, such as 80% or lower are
recommended for the calculation.
In a boost regulator, the inductor DC current can be calculated as Equation 4.
V
´I
IDC = OUT OUT
VIN ´ h
where
•
•
•
•
VOUT = boost output voltage
IOUT = boost output current
VIN = boost input voltage
η = boost power conversion efficiency
(4)
The inductor current peak-to-peak ripple can be calculated as Equation 5.
1
IPP =
æ
1
1 ö
+
L´ç
÷ ´ FS
V
V
V
IN
IN ø
è OUT
where
•
•
•
•
•
IPP = inductor peak-to-peak ripple
L = inductor value
FS = boost switching frequency
VOUT = boost output voltage
VIN = boost input voltage
(5)
Therefore, the peak current IP seen by the inductor is calculated with Equation 6.
IP = IDC +
IPP
2
(6)
Select an inductor with saturation current over the calculated peak current. If the calculated peak current is larger
than the switch MOSFET current limit ILIM, use a larger inductor, such as 10 µH, and make sure its peak current
is below ILIM.
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Boost converter efficiency is dependent on the resistance of its current path, the switching losses associated with
the switch MOSFET and power diode, and the inductor’s core loss. The TPS61162A, TPS61163A has optimized
the internal switch resistance; however, the overall efficiency is affected a lot by the inductor’s DC Resistance
(DCR), Equivalent Series Resistance (ESR) at the switching frequency, and the core loss. Core loss is related to
the core material and different inductors have different core loss. For a certain inductor, larger current ripple
generates higher DCR/ESR conduction losses as well as higher core loss. Normally a datasheet of an inductor
does not provide the ESR and core loss information. If needed, consult the inductor vendor for detailed
information. Generally, an inductor with lower DCR/ESR is recommended for TPS61162A, TPS61163A
applications. However, there is a trade-off among an inductor’s inductance, DCR/ESR resistance, and its
footprint; furthermore, shielded inductors typically have higher DCR than unshielded ones. Table 3 lists some
recommended inductors for the TPS61162A and TPS61163A. Verify whether the recommended inductor can
support target application by the calculations above as well as bench validation.
Table 3. Recommended Inductors
PART NUMBER
L (µH)
DCR MAX (mΩ)
SATURATION CURRENT
(A)
SIZE (L x W x H mm)
VENDOR
LPS4018-472ML
4.7
125
1.9
4 x 4 x 1.8
Coilcraft
LPS4018-682ML
6.8
150
1.3
4 x 4 x 1.8
Coilcraft
LPS4018-103ML
10
200
1.3
4 x 4 x 1.8
Coilcraft
PIMB051B-4R7M
4.7
163
2.7
5.4 x 5.2 x 1.2
Cyntec
PIMB051B-6R8M
6.8
250
2.3
5.4 x 5.2 x 1.2
Cyntec
8.2.2.2 Schottky Diode Selection
The TPS61162A, TPS61163A demands a low forward-voltage, high-speed and low-capacitance Schottky diode
for optimum efficiency. Ensure that the diode average and peak current rating exceeds the average output
current and peak inductor current. In addition, the diode’s reverse breakdown voltage must exceed the open LED
protection voltage. ONSemi MBR0540 and NSR05F40, and Vishay MSS1P4 are recommended for the
TPS61162A, TPS61163A.
8.2.2.3 Compensation Capacitor Selection
The compensation capacitor C4 (refer to Additional Application Circuits) connected from the COMP pin to GND,
is used to stabilize the feedback loop of the TPS61162A, TPS61163A. A 330-nF ceramic capacitor for C4 is
suitable for most applications. A 470-nF is also OK for some applications and customers are suggested to verify
it in their applications.
8.2.2.4 Output Capacitor Selection
The output capacitor is mainly selected to meet the requirement for the output ripple and loop stability. A 1-µF to
2.2-µF capacitor is recommended for the loop stability consideration. This ripple voltage is related to the
capacitor’s capacitance and its ESR. Due to its low ESR, Vripple_ESR could be neglected for ceramic capacitors.
Assuming a capacitor with zero ESR, the output ripple can be calculated with Equation 7.
(V
- VIN ) ´ IOUT
Vripple = OUT
VOUT ´ FS ´ COUT
where
•
Vripple = peak-to-peak output ripple.
(7)
The additional part of ripple caused by the ESR is calculated using Vripple_ESR = IOUT x RESR and can be ignored
for ceramic capacitors.
Note that capacitor degradation increases the ripple much. Select the capacitor with 50-V rated voltage to reduce
the degradation at the output voltage. If the output ripple is too large, change a capacitor with less degradation
effect or with higher rated voltage could be helpful.
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8.2.3 Application Curves
100
100
Vo = 18V, 6s2p, 20mA/string
Vo = 15V, 5s2p, 20mA/string
90
Efficiency (%)
Efficiency (%)
90
80
VIN = 3V
VIN = 3.6V
70
80
VIN = 3V
VIN = 3.6V
70
VIN = 4.2V
VIN = 4.2V
VIN = 5V
VIN = 5V
60
60
0
20
40
60
80
100
0
20
Dimming Duty Cycle (%)
60
80
Figure 16. Dimming Efficiency
100
100
Vo = 24V, 8s2p, 20mA/string
Vo = 21V, 7s2p, 20mA/string
90
Efficiency (%)
90
80
VIN = 3V
VIN = 3.6V
70
80
VIN = 3V
VIN = 3.6V
70
VIN = 4.2V
VIN = 4.2V
VIN = 5V
VIN = 5V
60
60
0
20
40
60
80
100
0
20
Dimming Duty Cycle (%)
60
80
100
Figure 18. Dimming Efficiency
100
100
Vo = 27V, 9s2p, 20mA/string
Vo = 30V, 10s2p, 20mA/string
90
Efficiency (%)
90
Efficiency (%)
40
Dimming Duty Cycle (%)
Figure 17. Dimming Efficiency
80
VIN = 3V
VIN = 3.6V
70
80
VIN = 3V
VIN = 3.6V
70
VIN = 4.2V
VIN = 4.2V
VIN = 5V
VIN = 5V
60
60
0
20
40
60
80
100
0
20
Dimming Duty Cycle (%)
Figure 19. Dimming Efficiency
20
100
Dimming Duty Cycle (%)
Figure 15. Dimming Efficiency
Efficiency (%)
40
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40
60
80
100
Dimming Duty Cycle (%)
Figure 20. Dimming Efficiency
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SW
Voltage
20V/div
DC
Output
Voltage
100mV/div
AC
Inductor
Current
200mA/div
DC
Output
Current
20mA/div
DC
Duty = 100%
SW
Voltage
20V/div
DC
Min
Feedback
Voltage
100mV/div
DC
Inductor
Current
200mA/div
DC
Output
Current
20mA/div
DC
Duty = 100%
t - Time - 1ms/div
t - Time - 1ms/div
Figure 22. Switching Waveform
Figure 21. Switching Waveform
SW
Voltage
20V/div
DC
Output
Voltage
200mV/div
AC
Inductor
Current
100mA/div
DC
Output
Current
5mA/div
DC
PWM Freq = 20kHz, Duty = 10%
SW
Voltage
20V/div
DC
Min
Feedback
Voltage
100mV/div
DC
Inductor
Current
100mA/div
DC
Output
Current
2mA/div
DC
PWM Freq = 20kHz, Duty = 10%
t - Time - 4ms/div
t - Time - 4ms/div
Figure 23. Switching Waveform
Figure 24. Switching Waveform
SW
Voltage
20V/div
DC
Inductor
Current
200mA/div
DC
Output
Voltage
2V/div
AC
Output
Current
20mA/div
DC
PWM Freq = 20kHz,
Duty = 10% - 80% - 10%
t - Time - 400ms/div
Figure 25. Dimming Transient Waveform
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8.2.4 Additional Application Circuits
In Figure 26 the PWM Interface is enabled, and the PWM input signal is used to adjust the brightness level. The
PWM pin as well as the EN pin can be used to enable or disable the TPS61162A, TPS61163A.
L1
4.7µH
2.7V ~ 6.5V
D1
VBAT
C1
1µF
R2
10
C2
1µF
SW
VIN
C3
1µF
Enable /
Disable
EN
PWM
Dimming
PWM
TPS61162A/3A
IFB1
COMP
IFB2
C4
330nF
ISET
R1
63.4k
GND
Figure 26. TPS61162A/TPS61163A Typical Application
22
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Figure 27 shows PWM interface enabled, EN pin connected to VIN, with only the PWM Signal used to adjust the
brightness level and to enable or disable the TPS61162A, TPS61163A.
L1
4.7µH
2.7V ~ 6.5V
D1
VBAT
R2
10
C1
1µF
SW
VIN
C2
1µF
C3
1µF
EN
TPS61162A/3A
PWM
Dimming
PWM
IFB1
COMP
IFB2
C4
330nF
ISET
GND
R1
63.4k
Figure 27. TPS61162A/TPS61163A Typical Application
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In Figure 28 the one-wire digital interface is enabled. Brightness level is adjusted with the PWM pin using
EasyScale commands. The PWM signal must remain high for the device to be enabled.
L1
4.7µH
2.7V ~ 6.5V
D1
VBAT
C1
1µF
R2
10
C2
1µF
SW
VIN
C3
1µF
EasyScale
Command
Enable /
Disable
EN
TPS61162A/3A
PWM
IFB1
COMP
IFB2
C4
330nF
ISET
R1
63.4k
GND
Figure 28. TPS61162A/TPS61163A Typical Application
24
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Figure 29 shows one-wire digital interface enabled, PWM pin connected to VIN, with only the EN signal used to
enable or disable the device. Brightness level adjustments (using EasyScale Commands) can be achieved via
the EN pin only.
L1
4.7µH
2.7V ~ 6.5V
D1
VBAT
C1
1µF
R2
10
SW
VIN
C2
1µF
C3
1µF
EasyScale
Command
EN
TPS61162A/3A
PWM
IFB1
COMP
IFB2
C4
330nF
ISET
GND
R1
63.4k
Figure 29. TPS61162A/TPS61163A Typical Application
9 Power Supply Recommendations
The TPS61162A and TPS61163A are designed to operate from an input supply range of 2.7 V to 6.5 V. This
input supply should be well regulated and be able to provide the peak current required by the LED configuration
and inductor selected without voltage drop under load transients (start-up or rapid brightness change). If the input
supply is located far from the TPS6116xA additional bulk capacitance may be required in addition to the ceramic
bypass capacitors.
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10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those providing high current and using high switching frequencies,
layout is an important design step. If layout is not carefully done, the regulator could show instability as well as
EMI problems. Therefore, use wide and short traces for high current paths. The input capacitor, C1 in Additional
Application Circuits, needs to be close to the inductor, as well as the VIN pin and GND pin in order to reduce the
input ripple seen by the device. If possible, choose higher capacitance value for it. If the ripple seen at VIN pin is
so large that it affects the boost loop stability or internal circuits operation, R2 and C3 are recommended to filter
and decouple the noise. In this case, C3 should be placed as close as possible to the VIN and GND pins. The
SW pin carries high current with fast rising and falling edges. Therefore, the connection between the SW pin to
the inductor and Schottky diode should be kept as short and wide as possible. The trace between Schottky diode
and the output capacitor C2 should also be as short and wide as possible. It is also beneficial to have the ground
of the output capacitor C2 close to the GND pin since there is a large ground return current flowing between
them. When laying out signal grounds, it is recommended to use short traces separated from power ground
traces, and connect them together at a single point close to the GND pin.
10.2 Layout Example
ISET
ISET
LED2
LED1
IFB2
IFB1
Vias to GND
Plane
PWM
PWM
COMP
GND
1 PF
EN
Vias to GND
Plane
EN
VIN
SW
VIN
SW
GND
1 PF
4.7 P+
Minimize the
area of this trace
Figure 30. TPS61162A/TPS61163A Layout
26
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SLVSC26A – NOVEMBER 2013 – REVISED JUNE 2015
11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Related Links
Table 4 below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS61162A
Click here
Click here
Click here
Click here
Click here
TPS61163A
Click here
Click here
Click here
Click here
Click here
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
EasyScale, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS61162AYFFR
ACTIVE
DSBGA
YFF
9
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-55 to 125
TPS
61162A
TPS61163AYFFR
ACTIVE
DSBGA
YFF
9
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
TPS
61163A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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