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TPS62745, TPS627451
SLVSC68A – JUNE 2015 – REVISED JUNE 2015
TPS62745 Dual-cell Ultra Low IQ Step Down Converter for Low Power Wireless
Applications
1 Features
3 Description
•
•
•
•
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•
The TPS62745 is a high efficiency ultra low power
synchronous step down converter optimized for low
power wireless applications. It provides a regulated
output voltage consuming only 400-nA quiescent
current. The device operates from two rechargeable
Li-Ion batteries, Li-primary battery chemistries such
as Li-SOCl2, Li-SO2, Li-MnO2 or four to six cell
alkaline batteries. The input voltage range up to 10 V
allows also operation from a USB port and thin-film
solar modules. The output voltage is set with four
VSEL pins between 1.8 V and 3.3 V for TPS62745 or
1.3 V and 2.8 V for TPS627451. TPS62745 features
low output ripple voltage and low noise with a small
output capacitor. An internal input voltage switch
controlled by pin EN_VIN_SW connects the supply
voltage to pin VIN_SW. The switch is intended to be
used for an external voltage divider, scaling down the
input voltage for an external ADC. The switch is
automatically opened when the supply voltage is
below the undervoltage lockout threshold. The
TPS62745 is available in a small 12 pin 3 mm × 2
mm WSON package.
1
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•
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Input Voltage Range VIN from 3.3 V to 10 V
Typical 400 nA Quiescent Current
Up to 90% efficiency with load currents >15 µA
Up to 300 mA Output Current
RF Friendly DCS-Control™
Low Output Ripple Voltage
16 Selectable Output Voltages from
– 1.8 V to 3.3 V (TPS62745)
– 1.3 V to 2.8 V (TPS627451)
Integrated input voltage switch
Integrated Discharge Function at VOUT
Open Drain Power Good Output
Operates with a Tiny 3.3 µH or 4.7 µH Inductor
Small 3 mm x 2 mm WSON Package
2 Applications
•
•
•
Bluetooth® Low Energy, RF4CE, Zigbee
Industrial Metering
Energy Harvesting
Device Information(1)
PART NUMBER
TPS62745
TPS627451
PACKAGE
BODY SIZE (NOM)
WSON
3 mm x 2 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Typical Application Schematic
spacer
spacer
TPS62745
CIN
10 µF
VIN
EN
EN_VIN_SW
VSEL1
VSEL2
VSEL3
VSEL4
SW
VOUT
4.7 µH
VOUT = 1.8 V
L
COUT
10 µF
Efficiency vs Output Current; Vo = 3.3 V
100
90
PG
VIN_SW
GND
80
70
Efficiency (%)
VIN = 3.3 V to 10 V
60
50
40
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
30
20
10
0
1P
10P
100P
1m
Output Current (A)
10m
100m
D001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS62745, TPS627451
SLVSC68A – JUNE 2015 – REVISED JUNE 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Typical Application Schematic.............................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
3
3
5
7.1
7.2
7.3
7.4
7.5
7.6
7.7
5
5
5
6
6
8
9
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information .................................................
Electrical Characteristics...........................................
Timing Characteristics...............................................
Typical Characteristics ..............................................
Detailed Description ............................................ 10
8.1
8.2
8.3
8.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
10
10
10
12
8.5 VOUT Discharge ..................................................... 12
8.6 Internal Current Limit .............................................. 12
9
Application and Implementation ........................ 13
9.1 Application Information............................................ 13
9.2 Typical Application ................................................. 13
9.3 System Examples .................................................. 21
10 Power Supply Recommendations ..................... 25
11 Layout................................................................... 25
11.1 Layout Guidelines ................................................. 25
11.2 Layout Example .................................................... 25
12 Device and Documentation Support ................. 26
12.1
12.2
12.3
12.4
12.5
12.6
Device Support ....................................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
13 Mechanical, Packaging, and Orderable
Information ........................................................... 26
Changes from Original (May 2015) to Revision A
•
2
26
26
26
26
26
26
Page
Changed status to Production Data ...................................................................................................................................... 1
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SLVSC68A – JUNE 2015 – REVISED JUNE 2015
5 Device Comparison Table(1)
Device Number
Output voltage range
marking
TPS62745
1.8 V to 3.3 V in 100-mV steps
PD5I
TPS627451
1.3 V to 2.8 V in 100-mV steps
PD6I
(1) For all available packages, see the orderable addendum at the end of the datasheet.
6 Pin Configuration and Functions
DSS Package
12-Pin WSON
Top View
12
1
2
3
4
5
EXPOSED
THERMAL PAD
VIN
SW
GND
EN_VIN_SW
VOUT
VIN_SW
6
11
10
9
8
7
EN
VSEL1
VSEL2
VSEL3
VSEL4
PG
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
VIN
1
PWR
VIN power supply pin. Connect this pin close to the VIN terminal of the input capacitor. A
ceramic capacitor of 4.7 µF from this pin to GND is required.
SW
2
OUT
This is the switch pin which is connected to the internal MOSFET switches. Connect the
inductor to this terminal.
GND
3
PWR
GND supply pin. Connect this pin close to the GND terminal of the input and output
capacitor.
EN_VIN_SW
4
IN
This pin connects / disconnects the internal switch from VIN to pin VIN_SW. With
EN_VIN_SW = Low, the switch is open. With EN_VIN_SW = High, the switch is closed
connecting VIN with VIN_SW. If not used, the pin should be tied to GND.
VOUT
5
IN
Feedback pin for the internal feedback divider network and regulation loop. Connect this pin
directly to the output capacitor with a short trace.
VIN_SW
6
OUT
This is the output of a switch connecting VIN with VIN_SW when EN_VIN_SW = High. If not
used, leave this pin open.
PG
7
OUT
This is an open drain power good output.
VSEL4
8
IN
VSEL3
9
IN
VSEL2
10
IN
VSEL1
11
IN
EN
12
IN
High level enables the devices, low level turns the device into shutdown mode. This pin must
be terminated.
NC
Not electrically connected to the IC. Connect this pad to GND and use it as a central GND
plane.
EXPOSED
THERMAL
PAD
Output voltage selection pins. See Table 1 and Table 2 for VOUT selection. These pins must
be terminated.
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Table 1. Output Voltage Setting for TPS62745
Device
TPS62745
VOUT / V
VSEL4
VSEL 3
VSEL 2
VSEL 1
1.8
0
0
0
0
1.9
0
0
0
1
2.0
0
0
1
0
2.1
0
0
1
1
2.2
0
1
0
0
2.3
0
1
0
1
2.4
0
1
1
0
2.5
0
1
1
1
2.6
1
0
0
0
2.7
1
0
0
1
2.8
1
0
1
0
2.9
1
0
1
1
3.0
1
1
0
0
3.1
1
1
0
1
3.2
1
1
1
0
3.3
1
1
1
1
Table 2. Output Voltage Setting for TPS627451
Device
TPS627451
4
VOUT / V
VSEL4
VSEL 3
VSEL 2
VSEL 1
1.3
0
0
0
0
1.4
0
0
0
1
1.5
0
0
1
0
1.6
0
0
1
1
1.7
0
1
0
0
1.8
0
1
0
1
1.9
0
1
1
0
2.0
0
1
1
1
2.1
1
0
0
0
2.2
1
0
0
1
2.3
1
0
1
0
2.4
1
0
1
1
2.5
1
1
0
0
2.6
1
1
0
1
2.7
1
1
1
0
2.8
1
1
1
1
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7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)
PIN
MIN
MAX
UNIT
VIN
–0.3
12
V
SW, VIN_SW
Voltage
(1)
(2)
–0.3
VIN +0.3
V
EN
–0.3
VIN +0.3
V
EN_VIN_SW, VSEL1-4
–0.3
6
V
PG
–0.3
6
V
VOUT
–0.3
3.6
V
10
mA
Power Good Sink Current
PG
VIN Switch Output Current
VIN_SW
10
mA
Junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The DC voltage on the SW pin must not exceed 3.6 V
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage VIN
Output current IOUT
NOM
3.3
VOUT + 0.7 V ≤ VIN ≤ 10 V
Effective inductance
2.8
4.7
Capacitance connected to VIN pin
3
10
Total effective capacitance connected to
VOUT pin (1)
5
10
MAX
UNIT
10
V
300
mA
6.2
µH
µF
22
µF
Operating junction temperature range, TJ
–40
125
°C
Operating ambient temperature range, TA
–40
85
°C
(1)
Due to the DC bias effect of ceramic capacitors, the effective capacitance is lower then the nominal value when a voltage is applied.
This is why the capacitance is specified to allow the selection of the smallest capacitor required with the DC bias effect for this type of
capacitor in mind. The nominal value given matches a typical capacitor to be chosen to meet the minimum capacitance required.
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7.4 Thermal Information
TPS62745
THERMAL METRIC (1)
DSS
UNIT
12 PINS
RθJA
Junction-to-ambient thermal resistance
61.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
70.9
°C/W
RθJB
Junction-to-board thermal resistance
25.7
°C/W
ψJT
Junction-to-top characterization parameter
1.9
°C/W
ψJB
Junction-to-board characterization parameter
25.7
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
7.2
°C/W
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
7.5 Electrical Characteristics
VIN = 6 V, TJ = –40°C to 125°C typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
VOUT + 0.7 V ≤ VIN ≤ 10 V ; min 3.3 V, whichever
value is higher
IQ
Operating quiescent current
EN = VIN, device not switching; IOUT = 0 µA;
VOUT = 2 V; TJ = –40°C to 85°C
ISD
Shutdown current
EN = GND, shutdown current into VIN;
TJ = -40°C to 85°C
3.3
10
V
400
1960
nA
130
1200
EN = GND, shutdown current into VIN; TJ = 60°C
VTH_UVLO+
VTH_UVLO-
Undervoltage lockout
threshold
nA
830
Rising VIN; TJ = –40°C to 85°C
3.1
3.3
Falling VIN; TJ = –40°C to 85°C
2.9
3.1
V
INPUTS (EN, EN_VIN_SW, VSEL1-4)
VIH TH
High level input voltage
VTH_UVLO- ≤ VIN ≤ 10 V
VIL
Low level input voltage
VTH_UVLO- ≤ VIN ≤ 10 V
TH
Input bias current; except EN
pin
IIN
IIN
Input bias current for EN pin
1.2
V
0.35
TJ = 25°C
10
TJ = 60°C
20
TJ = –40°C to 85°C
50
TJ = 25°C
20
TJ = 60°C
40
TJ = –40°C to 85°C
V
nA
nA
100
POWER SWITCHES
RDS(ON)
ILIMF
6
High side MOSFET onresistance
Low side MOSFET onresistance
High side MOSFET DC switch
current limit
Low side MOSFET DC switch
current limit
0.6
0.98
0.5
0.85
600
720
Ω
VIN = 4 V, I = 140 mA
480
3.6 V ≤ VIN ≤ 10 V; device not in soft start
mA
600
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Electrical Characteristics (continued)
VIN = 6 V, TJ = –40°C to 125°C typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT DISCHARGE SWITCH (VOUT)
RDSCH_VOUT MOSFET on-resistance
IIN_VOUT
Bias current into VOUT pin (1)
EN = GND, IOUT = –10 mA into VOUT pin
EN = VIN, VOUT = 2 V
TJ = 25°C
25
60
40
100
TJ = –40°C to 85°C
Ω
nA
500
INPUT VOLTAGE SWITCH (VIN_SW)
RDS(ON)
MOSFET on-resistance
EN_VIN_SW = High, IVIN_SW = 1 mA
IVIN_SW_LKG
VIN-switch leakage current
EN_VIN_SW = GND; leakage from VIN to VIN_SW
when pulled to GND; TJ = –40°C to 85°C
IVIN_SW
VIN-switch current
85
-20
160
Ω
20
nA
5
mA
POWER GOOD OUTPUT (PG)
VTH_PG+
Power good threshold voltage
Rising output voltage on VOUT pin
VTH_HYS
Power good threshold
hysteresis
95
97.5
Falling output voltage on VOUT pin
VOL
Low level output threshold
3.3 V ≤ VIN ≤ 10 V, EN = GND,
current into PG pin IPG = 4 mA
0.3
V
VOH
High level output threshold
3.3 V ≤ VIN ≤ 10 V, EN = high,
current into PG pin IPG = 0 mA
6
V
IIN_PG
Bias current into power good
pin
PG pin is high impedance, VOUT = 2 V,
EN = VIN, IOUT = 0 mA; TJ = –40°C to 85°C
20
nA
180
mA
%
3
OUTPUT
ILIM_softstart
Switch current limit during soft Current limit is reduced during soft start,
start
TJ = –40°C to 85°C
Output voltage range
Output voltage accuracy
(1)
110
For TPS627450; output voltages are selected with
pins VSEL1 - 4
1.8
3.3
For TPS627451; output voltages are selected with
pins VSEL1 - 4
1.3
2.8
PFM mode, IOUT = 0 mA, VOUT + 0.6 V ≤ VIN ≤ 10 V;
min 3.3 V, whichever value is higher;
TJ = –40°C to 85°C
PWM Mode, VOUT + 0.7 V ≤ VIN ≤ 10 V; min 3.3 V,
whichever value is higher; TJ = –40°C to 85°C
VVOUT
40
V
-2.5
0
2.5
%
–2
0
2
DC output voltage load
regulation
VOUT = 2.0 V; IOUT = 2 mA to 80 mA (PFM mode)
0.005
%/mA
DC output voltage load
regulation
VOUT = 2.0 V; IOUT = 150 mA to 300 mA (PWM
mode)
0.001
%/mA
DC output voltage line
regulation
VOUT = 2.0 V, IOUT = 300 mA, 4 V ≤ VIN ≤ 10 V
0.015
%/V
A 50-MΩ (typical) internal resistor divider is internally connected to the VOUT pin
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7.6 Timing Characteristics
VIN = 6 V, TJ = –40°C to 125°C typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
tdelay
UVLO delay time
response time of UVLO circuit
200
µs
Time from EN_VIN_SW = High until RDS(ON) is within
specification
100
µs
PGOOD delay time
Response time of PGOOD circuit; falling edge
200
µs
tONmin
Minimum ON time
VIN = 6 V, VOUT = 2.0 V, IOUT = 0 mA
256
ns
tOFFmin
Minimum OFF time
VIN = 3.3 V
50
ns
tStart
Regulator start up time
VIN = 6 V, from transition EN = Low to High until
device starts switching, TJ = -40°C to 85°C
15
tSoftstart
Softstart time with reduced
switch current limit
3.3 V ≤ VIN ≤ 10 V, EN = VIN
INPUT VOLTAGE SWITCH (VIN_SW)
VIN-switch turn-on settling
time
tVIN_SW
POWER GOOD OUTPUT (PG)
tdelay
OUTPUT
8
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700
50
ms
µs
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7.7 Typical Characteristics
700
500
TA = -40qC
TA = 0qC
450
600
TA = 25qC
TA = 60qC
TA = 85qC
Shutdown Current (nA)
Quiescent Current (nA)
400
500
400
300
200
TA = -40qC
TA = 0qC
TA = 25qC
100
350
300
250
200
150
100
TA = 60qC
TA = 85qC
50
0
0
0
2
4
6
8
Input Voltage (V)
EN = VIN, VOUT = 1.8 V,
EN_VIN_SW = GND
10
12
0
2
4
D038
Device Not Switching
6
8
Input Voltage (V)
10
12
D039
EN = GND, EN_VIN_SW = GND
Figure 2. Shutdown Current
Figure 1. Quiescent Current
0.8
1
TA = -40qC
TA = 0qC
TA = 25qC
TA = 85qC
0.9
0.7
Low-Side rds(on) (:)
High-Side rds(on) (:)
0.8
0.7
0.6
0.5
0.4
0.3
0.6
0.5
0.4
0.3
0.2
TA = -40qC
TA = 0qC
TA = 25qC
TA = 85qC
0.2
0.1
0.1
0
0
0
2
4
6
8
Input Voltage (V)
10
12
0
2
D037
Figure 3. RDS(ON) High-Side MOSFET
4
6
8
Input Voltage (V)
10
12
D040
Figure 4. RDS(ON) Low-Side MOSFET
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8 Detailed Description
8.1 Overview
The TPS62745 is the first dual-cell, ultra low power step down converter combining TI's DCS-Control™ topology
and ultra low quiescent current consumption (400 nA typical) while maintaining a regulated output voltage. The
device extends high efficiency operation to output currents down to a few micro amperes.
8.2 Functional Block Diagram
Current
Limit Comparator
Power Stage
VIN
Timer
DCS
Control
VIN
UVLO
Min. On
VOS
Limit
High Side
PMOS
Min. OFF
VOUT
Direct Control
& Compensation
Comparator
EN
Control
Logic
Gate Driver
Anti
Shoot-Through
SW
VOUT_SET
Limit
Low Side
Error
amplifier
EN
Ultra Low Power
Reference 1.2V
NMOS
GND
Current
Limit Comparator
UVLO
Softstart
EN
Softstart
VOUT
Discharge
VOUT
VREF
PG
VSEL 1
VSEL 2
VSEL 3
Vin-switch
UVLO
Comp
VOUT
Selection +
VOUT_SET
Setting
VIN
VTH_UVLO
VSEL 4
PG Comp
UVLO
VOUT
VTH_PG
VIN
EN_VIN_SW
EN
UVLO
VIN_SW
8.3 Feature Description
8.3.1 DCS-Control™
TI's DCS-Control™ (Direct Control with Seamless Transition into Power Save Mode) is an advanced regulation
topology, which combines the advantages of hysteretic and voltage mode control. Characteristics of DCS ControlTM are excellent AC load regulation and transient response, low output ripple voltage and a seamless
transition between pulse frequency modulation (PFM) and pulse width modulation (PWM) mode operation. DCSControlTM includes an AC loop which senses the output voltage (VOUT pin) and directly feeds the information to
a fast comparator stage. This comparator sets the switching frequency, which is constant for steady state
operating conditions, and provides immediate response to dynamic load changes. In order to achieve accurate
DC load regulation, a voltage feedback loop is used. The internally compensated regulation network achieves
fast and stable operation with small external components and low ESR capacitors. The DCS-ControlTM topology
supports PWM mode for medium and high load conditions and a power save mode at light loads. During PWM
mode, it operates in continuous conduction. The switching frequency is up to 2.5 MHz with a controlled frequency
variation depending on the input voltage. If the load current decreases, the converter seamlessly enters power
save mode to maintain high efficiency down to very light loads. In power save mode the switching frequency
varies linearly with the load current. Since DCS-ControlTM supports both operation modes within one single
building block, the transition from PWM to power save mode is seamless without effects on the output voltage.
The TPS62745 offers both excellent DC voltage and superior load transient regulation, combined with very low
10
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Feature Description (continued)
output voltage ripple, minimizing interference with RF circuits. At high load currents the converter operates in
quasi fixed frequency PWM mode operation and at light loads in PFM mode to maintain highest efficiency over
the full load current range. In PFM mode, the device generates a single switching pulse to ramp up the inductor
current and recharge the output capacitor, followed by a sleep period where most of the internal circuits are
shutdown to achieve a quiescent current of typically 400-nA. During this time, the load current is supported by
the output capacitor. The duration of the sleep period depends on the load current and the inductor peak current.
8.3.2 Enable / Shutdown
The DC/DC converter is activated when EN pin is set to High. For proper operation, the pin must be terminated
and must not be left floating. With EN pin set to Low, the device enters shutdown mode with typical 130 nA
current consumption.
8.3.3 Power Good Output (PG)
The power good comparator features an open drain output. The PG comparator is active with EN pin set to high
and VIN above the threshold VTH_UVLO+. It is driven to high impedance once VOUT trips the threshold VTH_PG+ for
rising VOUT. The output is pulled to low level once VOUT falls below the threshold VTH_PG- . The output is as well
pulled to low level in case the input voltage VIN falls below the undervoltage lockout threshold VTH_UVLO- or the
device is disabled with EN = Low. With EN = High, the output is driven to high impedance state, once the load
current falls below ~1 mA. In this case the PG comparator is turned off to achieve lowest quiescent current. PG
will be triggered when a output voltage change is ongoing due to a change in VSEL pin levels if the new target is
high enough to trigger the PG threshold.
8.3.4 Output Voltage Selection (VSEL1 - 4)
The TPS62745 does not require an external resistor divider network to program the output voltage. The device
integrates a high impedance (typical 50 MΩ ) feedback resistor divider network which is programmed by the pins
VSEL1-4. TPS62745 supports an output voltage range of 1.8 V to 3.3 V in 100-mV steps while the TPS627451
supports an output voltage range of 1.3 V to 2.8 V. The output voltage can be changed during operation and
supports simple dynamic output voltage scaling; see the Application and Implementation section for further
details. The output voltage is programmed according to Table 1 for TPS62745 and Table 2 for TPS627451.
8.3.5 Input Voltage Switch
There is an internal switch that connects the input voltage applied at pin VIN to the VIN_SW output. The switch
can be used to connect an external voltage divider for an ADC monitoring to the input voltage. An enable pin
EN_VIN_SW turns the switch on and off, making sure there is no current through that external voltage divider
when not needed. A logic high level on EN_VIN_SW turns the switch on once the input voltage is above the
undervoltage lockout threshold and the device is enabled. The switch can be used for other purposes as long as
the current rating of 5 mA and its turn-on resistance is observed. An external voltage divider should be in a range
of 10 kΩ to 100 kΩ. Larger values than 100 kΩ can be used as long as the input resistance and capacitance of
the external circuit (e.g. ADC input) is observed.
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8.4 Device Functional Modes
8.4.1 Soft Start
When the device is enabled, the internal reference is powered up and after the startup delay time t Startup_delay has
expired, the device enters soft start, starts switching and ramps up the output voltage. During soft start the
device operates with a reduced current limit, ILIM_softstart , of typical 1/5 of the nominal current limit. This reduced
current limit is active during the soft start time tSoftstart. The current limit is increased to its nominal value, ILIMF,
once the soft start time has expired or the power good comparator detects that the output voltage reached its
target value.
8.5 VOUT Discharge
The VOUT pin has a discharge circuit to connect the rail to GND, once it is disabled. This feature prevents
residual charge voltages on the output capacitor, which may impact proper power up of the systems connected
to the converter. With the EN pin pulled to low, the discharge circuit at the VOUT pin becomes active. The
discharge circuit on VOUT is also associated with the UVLO comparator. The discharge circuit becomes active
once the UVLO comparator triggers and the input voltage VIN has dropped below the UVLO comparator
threshold VTH_UVLO- (typical 2.9 V).
8.6 Internal Current Limit
The TPS62745 integrates a current limit on the high side, as well on the low side MOSFETs to protect the device
against overload or short circuit conditions. The peak current in the switches is monitored cycle by cycle. If the
high side MOSFET current limit is reached, the high side MOSFET is turned off and the low side MOSFET is
turned on until the current decreases below the low side MOSFET current limit.
12
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9 Application and Implementation
9.1 Application Information
The TPS62745 devices are a step down converter family featuring typical 400-nA quiescent current and
operating with a tiny 4.7-μH inductor and a 10-μF output capacitor. These DCS-Control™ based devices extend
the light load efficiency range below 10-μA load currents. TPS62745 supports output currents up to 300 mA,
9.2 Typical Application
TPS62745
VIN = 3.3 V to 10 V
VIN
CIN
10 µF
SW
EN
VOUT = 1.8 V
L
COUT
10 µF
VOUT
PG
EN_VIN_SW
VSEL1
VSEL2
VSEL3
VSEL4
4.7 µH
VIN_SW
GND
Figure 5. TPS62745 Typical Application
9.2.1 Design Requirements
The TPS62745 is a highly integrated DC/DC converter. The output voltage is set via the VSEL pin interface
without any additional external components. For proper operation only an input and output capacitor and an
inductor is required. When the input voltage switch is not used, its enable input should be tied to GND. The
output VIN_SW can either be left open or tied to GND. Table 3 shows the components used for the application
characteristic curves.
Table 3. List of Components
REFERENCE
DESCRIPTION
IC
TPS62745
L
CIN
COUT
(1)
Value
MANUFACTURER (1)
Texas Instruments
DFE252010
4.7 µH
Toko
TMK212BBJ106MG
10 µF / 25 V / X5R /
0805
Taiyo Yuden
LMK212ABJ106KG-T
10 µF / 10 V / X5R /
0805
Taiyo Yuden
See Third-Party Products Disclaimer
9.2.2 Detailed Design Procedure
9.2.2.1 Output Voltage Selection (VSEL1 - 4)
The VSEL pins select the output voltage of the converters. See the Output Voltage Selection (VSEL1 - 4) of the
Feature Descriptions. The output voltage can be changed during operation by changing the logic level of these
pins. The output voltage of the TPS62745 ramps to the new target with a slew rate as defined in the electrical
characteristics. Typically these pins are driven by an applications processor with an I/O voltage of either 1.8 V or
3.3 V or hard wired to a logic high or logic low signal. In case the pins are not driven from an applications
processor and the supply voltage is higher than the voltage rating of the VSEL pins, a logic high level can be
taken from the output voltage at pin VOUT. During start-up, when the output is rising from 0 V to its target, the
VSEL pins connected to VOUT will change their logic level from low to high. TPS62745 is designed such that
such a configuration ensures a steadily rising output voltage.
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9.2.2.2 Output Filter Design (Inductor and Output Capacitor)
The external components have to fulfill the needs of the application, but also the stability criteria of the devices
control loop. The TPS62745 is optimized to work within a range of L and C combinations. The LC output filter
inductance and capacitance have to be considered together, creating a double pole, responsible for the corner
frequency of the converter. Table 4 can be used to simplify the output filter component selection.
Table 4. Recommended LC Output Filter Combinations
Inductor Value [µH] (1)
(1)
(2)
(3)
Output Capacitor Value [µF] (2)
10 µF
22 µF
4.7
√ (3)
√
3.3
√
√
Inductor tolerance and current derating is anticipated. The effective inductance can vary by 20% and 30%.
Capacitance tolerance and bias voltage derating is anticipated. The effective capacitance can vary by
20% and -50%.
This LC combination is the standard value and recommended for most applications.
9.2.2.3 Inductor Selection
The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage
ripple and the efficiency. The selected inductor has to be rated for its DC resistance and saturation current. The
inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VIN or VOUT and can be
estimated according to Equation 1.
Equation 2 calculates the maximum inductor current under static load conditions. The saturation current of the
inductor should be rated higher than the maximum inductor current as calculated with Equation 2. This is
recommended because during heavy load transient the inductor current will rise above the calculated value. A
more conservative way is to select the inductor saturation current according to the high-side MOSFET switch
current limit ILIMF.
Vout
1Vin
D IL = Vout ´
L ´ ¦
(1)
ILmax = Ioutmax +
DIL
2
where:
•
•
•
•
f = Switching frequency
L = Inductor value
ΔIL= Peak-to-peak inductor ripple current
ILmax = Maximum inductor current
(2)
In DC/DC converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e. quality
factor) and by the inductor DCR value. To achieve high efficiency operation, care should be taken in selecting
inductors featuring a quality factor above 25 at the switching frequency. Increasing the inductor value produces
lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance
usually results in an inductor with lower saturation current.
The total losses of the coil consist of both the losses in the DC resistance RDC) and the following frequencydependent components:
• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses
The following inductor series from different suppliers have been used:
14
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Table 5. List of Inductors
INDUCTANCE
[µH]
DCR [Ω], typical
DIMENSIONS
[mm3]
INDUCTOR
TYPE
SUPPLIER (1)
4.7
0.250
2.5 x 2.0 x 1.0
DFE252010
TOKO
3.3
0.190
2.5 x 2.0 x 1.0
DFE252010
TOKO
4.7
0.336
2.0 x 1.9 x 1.0
XPL2010
Coilcraft
3.3
0.207
2.0 x 1.9 x 1.0
XPL2010
Coilcraft
4.7
0.217
3.0 x 3.0 x 1.1
XFL3010
Coilcraft
4.7
0.270
4.5 x 3.2 x 3.2
CC453232
Bourns
(1)
See Third-Party Products Disclaimer
9.2.2.4 DC/DC Output Capacitor Selection
The DCS-Control™ scheme of the TPS62745 allows the use of tiny ceramic capacitors. Ceramic capacitors with
low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires
either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance
over temperature, become resistive at high frequencies. At light load currents, the converter operates in power
save mode and the output voltage ripple is dependent on the output capacitor value and the PFM peak inductor
current. A larger output capacitor can be used, but it should be considered that larger output capacitors lead to
an increased leakage current in the capacitor and may reduce overall conversion efficiency. Furthermore, larger
output capacitors impact the start up behavior of the DC/DC converter. Furthermore, the contol loop of the
TPS62745 requires a certain voltage ripple across the output capacitor. Super-capacitors can be used in parallel
to the ceramic capacitors when it is made sure that the super-capacitors series resistance is large enough to
provide a valid feedback signal to the error amplifier which is in phase with the inductor current. Applications
using an output capacitance above of what is stated under Recommended Operating Conditions should be
checked for stability over the desired operating conditions range.
9.2.2.5 Input Capacitor Selection
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering to ensure proper function of the device and to minimize input voltage
spikes. For most applications a 10 µF or 4.7 µF ceramic capacitor is recommended. The input capacitor can be
increased without any limit for better input voltage filtering.
Table 6 shows a list of tested input/output capacitors.
Table 6. List of Input and Output Capacitors
(1)
CAPACITANCE [μF]
SIZE
CAPACITOR TYPE
SUPPLIER (1)
10
0603
GRM188R61C106MA73
Murata
10
0603
EMK107BBJ106MA
Taiyo Yuden
4.7
0805
EMK212ABJ475KG
Taiyo Yuden
10
0805
TMK212BBJ106MG
Taiyo Yuden
10
0805
LMK212ABJ106KG-T
Taiyo Yuden
See Third-Party Products Disclaimer
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100
100
90
90
80
80
70
70
Efficiency (%)
Efficiency (%)
9.2.3 Application Curves
60
50
40
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
30
20
10
0
1P
10P
100P
1m
Output Current (A)
10m
60
50
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
40
30
20
10
0
1P
100m
10P
D001
100
100
90
90
80
80
70
70
60
50
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
40
30
20
10
0
1P
10P
100P
1m
Output Current (A)
10m
10m
D002
60
50
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
40
30
20
10
0
1P
100m
10P
D003
Figure 8. VOUT = 1.8 V
100P
1m
Output Current (A)
10m
D004
2.625
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
2.600
3.366
Output Voltage (V)
Output Voltage (V)
2.575
3.333
3.300
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
3.267
3.234
10P
100P
1m
Output Current (A)
10m
2.550
2.525
2.500
2.475
2.450
2.425
1P
100m
10P
D005
Figure 10. VOUT = 3.3 V
16
100m
Figure 9. VOUT = 1.5 V
3.399
3.201
1P
100m
Figure 7. VOUT = 2.5 V
Efficiency (%)
Efficiency (%)
Figure 6. VOUT = 3.3 V
100P
1m
Output Current (A)
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100P
1m
Output Current (A)
10m
100m
D006
Figure 11. VOUT = 2.5 V
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1.854
1.545
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
1.530
Output Voltage (V)
Output Voltage (V)
1.836
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
1.818
1.800
1.782
1.764
1.515
1.500
1.485
1.470
1.746
1P
10P
100P
1m
Output Current (A)
10m
1.455
1P
100m
10P
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
0
0.05
0.1
0.15
0.2
0.25
Output Current (A)
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
0.3
1.6M
1.5M
1.4M
1.3M
1.2M
1.1M
1M
900k
800k
700k
600k
500k
400k
300k
200k
100k
0
0.35
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
0
0.05
0
0.05
0.1
0.15
0.2
0.25
Output Current (A)
100m
D008
0.15
0.2
0.25
Output Current (A)
VIN = 7.4V
VIN = 8.4V
VIN = 10.0V
0.3
0.35
D010
Figure 15. VOUT = 2.5 V
Frequency (Hz)
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
0.1
D009
Figure 14. VOUT = 3.3 V
1.5M
1.4M
1.3M
1.2M
1.1M
1M
900k
800k
700k
600k
500k
400k
300k
200k
100k
0
10m
Figure 13. VOUT = 1.5 V
Frequency (Hz)
Frequency (Hz)
1.6M
1.5M
1.4M
1.3M
1.2M
1.1M
1M
900k
800k
700k
600k
500k
400k
300k
200k
100k
0
100P
1m
Output Current (A)
D007
Figure 12. VOUT = 1.8 V
Frequency (Hz)
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
VIN = 7.4V
VIN = 8.4V
VIN = 10.0V
0.3
0.35
1.6M
1.5M
1.4M
1.3M
1.2M
1.1M
1M
900k
800k
700k
600k
500k
400k
300k
200k
100k
0
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
0
0.05
D011
Figure 16. VOUT = 1.8 V
0.1
0.15
0.2
0.25
Output Current (A)
VIN = 7.4V
VIN = 8.4V
VIN = 10.0V
0.3
Product Folder Links: TPS62745 TPS627451
D012
Figure 17. VOUT = 1.5 V
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10m
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
8m
Output Voltage Ripple (V)
Output Voltage Ripple (V)
10m
6m
4m
2m
0
1P
10P
100P
1m
10m
Output Current (A)
100m
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
8m
6m
4m
2m
0
1P
1
10P
D014
Figure 18. VOUT = 3.3 V
1
D015
10m
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
8m
6m
Output Voltage Ripple (V)
Output Voltage Ripple (V)
100m
Figure 19. VOUT= 2.5 V
10m
4m
2m
0
1P
18
100P
1m
10m
Output Current (A)
10P
100P
1m
10m
Output Current (A)
100m
1
VIN = 3.6V
VIN = 4.0V
VIN = 5.0V
VIN = 6.0V
VIN = 7.2V
VIN = 8.4V
VIN = 10.0V
8m
6m
4m
2m
0
1P
10P
D016
100P
1m
10m
Output Current (A)
100m
1
D017
Figure 20. VOUT = 1.8 V
Figure 21. VOUT= 1.5 V
Figure 22. Line Transient Response; VOUT = 3.3 V
Figure 23. Line Transient Response; VOUT = 2.5 V
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Figure 24. Line Transient Response; VOUT = 1.8 V
Figure 25. Line Transient Response; VOUT = 1.5 V
Figure 26. Load Transient Response; VOUT = 3.3 V
Figure 27. Load Transient Response; VOUT = 2.5 V
Figure 28. Load Transient Response; VOUT = 1.8 V
Figure 29. Load Transient Response; VOUT = 1.5 V
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Figure 30. Startup with VOUT = 3.3 V
Figure 31. Startup with VOUT = 2.5 V
Figure 32. Startup with VOUT = 1.8 V
Figure 33. Startup with VOUT = 1.5 V
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9.3 System Examples
9.3.1 TPS62745 Set to a Fixed Voltage of 3.3 V
TPS62745
VIN = 3.9 V to 10 V
VIN
CIN
10 µF
EN
EN_VIN_SW
VSEL1
VSEL2
VSEL3
VSEL4
4.7 µH
SW
L
VOUT
VOUT = 3.3 V
COUT
10 µF
PG
VIN_SW
GND
Figure 34. TPS62745 Typical Application for Vout = 3.3 V
9.3.1.1 Design Requirements
The minimum input voltage needs to be at least 700 mV above the desired output voltage for full output current.
Table 7. List of Components
REFERENCE
(1)
DESCRIPTION
Value
MANUFACTURER (1)
IC
TPS62745
L
DFE252010
4.7 µH
Texas Instruments
Toko
CIN
TMK212BBJ106MG
10 µF / 25 V / X5R / 0805
Taiyo Yuden
COUT
LMK212ABJ106KG-T
10 µF / 10 V / X5R / 0805
Taiyo Yuden
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9.3.1.2 Detailed Design Procedure
The logic level of the VSEL pins sets the output voltage. The maximum high level does not allow a direct
connection to the supply voltage if it is above 6 V. The output voltage can be used instead to provide a logic high
level.
9.3.1.3 Application Curves
Figure 35. TPS62745 with VOUT = 3.3 V Startup
22
Figure 36. TPS62745 with VOUT = 3.3 V; Output Voltage
Ripple for IOUT = 1 mA
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9.3.2 Dynamic Voltage Change on TPS62745
TPS62745 allows to change its output voltage during operation by changing the logic level of the VSEL pins.
TPS62745
VIN = 3.9 V to 10 V
VIN
CIN
10 µF
EN
EN_VIN_SW
VSEL1
VSEL2
VSEL3
VSEL4
0: VOUT = 2.0 V
1: VOUT = 3.3 V
4.7 µH
SW
L
VOUT
VOUT = 2.0 V / 3.3 V
COUT
10 µF
PG
VIN_SW
GND
Figure 37. TPS62745 Typical Application for Switching Between Two Output Voltages
9.3.2.1 Design Requirements
The minimum input voltage needs to be at least 700 mV above the maximum output voltage for full output
current. For an input voltage above 6V, the VSELx pins have to be tied to the output for a logic high level as their
voltage rating is 6V.
Table 8. List of Components
REFERENCE
(1)
DESCRIPTION
Value
MANUFACTURER (1)
IC
TPS62745
L
DFE252010
4.7 µH
Texas Instruments
Toko
CIN
TMK212BBJ106MG
10 µF / 25 V / X5R / 0805
Taiyo Yuden
COUT
LMK212ABJ106KG-T
10 µF / 10 V / X5R / 0805
Taiyo Yuden
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SLVSC68A – JUNE 2015 – REVISED JUNE 2015
www.ti.com
9.3.2.2 Detailed Design Procedure
Toggle the logic level at VSEL1, VSEL3 and VSEL4 to change the output voltage from 2.0 V to 3.3 V and vice
versa. The slope from higher output voltage to the lower output voltage is determined by the load current and
output capacitance because the discharge of the output capacitor is through the load current only.
9.3.2.3 Application Curves
Figure 38. TPS62745 Output Voltage Change from 2.0 V to
3.3 V for IOUT = 10 mA
24
Figure 39. TPS62745 Output Voltage Change from 3.3 V to
2.0 V for IOUT = 10 mA
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Product Folder Links: TPS62745 TPS627451
TPS62745, TPS627451
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SLVSC68A – JUNE 2015 – REVISED JUNE 2015
10 Power Supply Recommendations
The power supply to the TPS62745 needs to have a current rating according to the supply voltage, output
voltage and output current of the TPS62745 shown in the Specifications section.
11 Layout
11.1 Layout Guidelines
As for all switching power supplies, the layout is an important step in the design. Especially RF designs demand
careful attention to the PCB layout. Care must be taken in board layout to get the specified performance. If the
layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well as
EMI problems and interference with RF circuits. It is critical to provide a low inductance, impedance ground path.
Therefore, use wide and short traces for the main current paths. The input capacitor should be placed as close
as possible to the IC pins as well as the inductor and output capacitor. Use a common power GND node and a
different node for the signal GND to minimize the effects of ground noise. Keep the common path to the GND
pin, which returns the small signal components and the high current of the output capacitors as short as possible
to avoid ground noise. The VOUT line should be connected to the output capacitor and routed away from noisy
components and traces (e.g. SW line).
11.2 Layout Example
GND
GND
COUT
CIN
VIN
L
SW
VOUT
Figure 40. Recommended PCB Layout
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TPS62745, TPS627451
SLVSC68A – JUNE 2015 – REVISED JUNE 2015
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 9. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS62745
Click here
Click here
Click here
Click here
Click here
TPS627451
Click here
Click here
Click here
Click here
Click here
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
DCS-Control, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
26
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Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: TPS62745 TPS627451
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS627451DSSR
ACTIVE
WSON
DSS
12
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PD6I
TPS627451DSST
ACTIVE
WSON
DSS
12
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PD6I
TPS62745DSSR
ACTIVE
WSON
DSS
12
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PD5I
TPS62745DSST
ACTIVE
WSON
DSS
12
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PD5I
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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