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TPS62840
ZHCSJW0D – JUNE 2019 – REVISED MARCH 2020
TPS62840 1.8V 至 6.5V、
、750mA、
、60nA IQ 降压转换器
1 特性
•
•
•
•
•
•
•
•
•
•
•
•
1
3 说明
TPS62840 是一款高效降压转换器,具有典型值为
60nA 的超低工作静态电流。此器件具有特殊电路,可
在 100% 模式下实现仅 120nA 的 IQ,因此可在放电末
期进一步延长电池寿命。
60nA 工作静态电流
100% 占空比模式下,IQ 为 120nA
输入电压范围 VIN:1.8V 至 6.5V
高达 750mA 的输出电流
射频友好型 DCS-Control™
1µA IOUT(3.6VIN 至 1.8VOUT)时的效率为 80%
通过 VSET 引脚提供 16 种可选输出电压
自动转换 PFM/PWM 或强制 PWM 模式
可选的强制 PWM 和 STOP 模式
输出放电功能
25nA 关断电流
SON-8、WCSP-6 和热增强型 HVSSOP-8
此器件采用 DCS-Control 技术,可以为无线电提供干
净的电源,工作时具有 1.8MHz 的典型开关频率。在
省电模式下,此器件可将轻负载效率向下扩展至 1μA
负载电流及以下。
可以将一个电阻器连接到 VSET 引脚以选择 16 种预定
义的输出电压,因此这款器件可以灵活地用于各种 应
用 并最大限度地减少了外部组件的数量。
该器件的 STOP 引脚可立即消除所有的开关噪声,从
而在测试和测量系统中执行无噪声测量。
2 应用
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•
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智能仪表、智能恒温器
资产跟踪设备
可穿戴电子产品
医疗传感器贴片和患者监护仪
工业物联网(智能传感器)/窄带物联网
测试和测量
ATEX/本质安全
TPS62840 提供了高达 750mA 的输出电流。此器件的
输入电压为 1.8V 至 6.5V,支持多种电源,例如 2 节
至 4 节碱性电池或 1 节至 2 节锂二氧化锰 (Li-MnO2)
或 1 节锂离子/锂亚硫酰氯 (Li-SOCl2) 电池。
器件信息(1)
器件型号
TPS6284x
封装
封装尺寸(标称值)
8 引脚 DLC (SON)
1.5mm x 2mm
6 引脚 YBG
(WCSP)
0.97mm x 1.47mm
8 引脚 DGR
(HVSSOP)
3mm x 5mm
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
典型应用
TPS62841DLC
VIN
CI
4.7 µF
L
2.2 µH
VOUT
RUN /STOP
VOS
MODE
STOP
VSET
ENABLE
EN
90
CO
10µF
GND
MODE
95
SW
85
Efficiency (%)
VIN
效率与负载电流间的关系 (VOUT = 1.8V)
100
RSET
80
75
70
65
VIN
VIN
VIN
VIN
VIN
VIN
VIN
60
55
50
45
40
100n
1P
10P
100P
1m
10m
Output Current (A)
=
=
=
=
=
=
=
100m
1.8V
2.5V
3.0V
3.6V
4.2V
5.0V
6.5V
1
D002
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLVSEC6
TPS62840
ZHCSJW0D – JUNE 2019 – REVISED MARCH 2020
www.ti.com.cn
目录
1
2
3
4
5
6
7
8
特性 ..........................................................................
应用 ..........................................................................
说明 ..........................................................................
修订历史记录 ...........................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6
7.1
7.2
7.3
7.4
7.5
7.6
6
6
6
6
7
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 11
8.1 Overview ................................................................. 11
8.2 Functional Block Diagram ....................................... 11
8.3 Feature Description................................................. 12
8.4 Device Functional Modes........................................ 15
9
Application and Implementation ........................ 16
9.1 Application Information............................................ 16
9.2 Typical Application ................................................. 16
9.3 System Example ..................................................... 27
10 Power Supply Recommendations ..................... 28
11 Layout................................................................... 28
11.1 Layout Guidelines ................................................. 28
11.2 Layout Example .................................................... 28
12 器件和文档支持 ..................................................... 30
12.1
12.2
12.3
12.4
12.5
器件支持................................................................
保障资源................................................................
商标 .......................................................................
静电放电警告.........................................................
Glossary ................................................................
30
30
30
30
30
13 机械、封装和可订购信息 ....................................... 30
4 修订历史记录
注:之前版本的页码可能与当前版本有所不同。
Changes from Revision C (November 2019) to Revision D
Page
•
Updated the Device Comparison Table ................................................................................................................................ 3
•
Added efficiency graphs to the Application Curves .............................................................................................................. 20
Changes from Revision B (August 2019) to Revision C
Page
•
将 SON-8、WCSP-6 和热增强型 HVSSOP-8 添加至特性 ..................................................................................................... 1
•
将“ATEX/本质安全”添加到应用 .............................................................................................................................................. 1
•
更新了典型应用图像以显示 TPS62842DGR 器件 .................................................................................................................. 1
•
Added orderable part number TPS62841DGR to Device Comparison Table ....................................................................... 3
•
Added orderable part number TPS62842DGR to Device Comparison Table ....................................................................... 3
•
Updated Thermal Information values to support TPS62842DGR .......................................................................................... 6
•
Added low-side MOSFET switch current limit to Electrical Characteristics ........................................................................... 8
•
Added TPS62841DGR to Output Voltage Selection ........................................................................................................... 13
•
Updated Efficiency Power Save graphs in Application Curves ............................................................................................ 20
•
Updated Load Transient waveform in Application Curves ................................................................................................... 24
•
Added PCB layout for DGR package ................................................................................................................................... 29
Changes from Revision A (July 2019) to Revision B
Page
•
将销售状态从“预告信息”更改为“生产数据” .............................................................................................................................. 1
2
Copyright © 2019–2020, Texas Instruments Incorporated
TPS62840
www.ti.com.cn
ZHCSJW0D – JUNE 2019 – REVISED MARCH 2020
5 Device Comparison Table
ORDERABLE
PART NUMBER
TPS62840DLC
TPS62840YBG
OUTPUT VOLTAGE
1.8 V to 3.3 V
in 100-mV steps
OUTPUT
CURRENT
750 mA
OUTPUT
DISCHARGE
0.8 V to 1.55 V
in 50-mV steps
750 mA
yes
TPS62841DGR
TPS62842DGR
TPS62849DLC
1.8 V, 2.0 V, 2.2 V,
2.4 V to 3.6 V in 100-mV steps
3.4-V fixed output voltage
Copyright © 2019–2020, Texas Instruments Incorporated
750 mA
STOP PIN
PACKAGE
PACKAGE
MARKING
yes
yes
SON-8
(DLC)
E5
no
no
WCSP-6
(YBG)
62840
yes
yes
SON-8
(DLC)
E9
no
no
WCSP-6
(YBG)
62841
yes
no
HVSSOP-8
(DGR)
62841
no
HVSSOP-8
(DGR)
62842
yes
SON-8
(DLC)
FF
yes
TPS62841DLC
TPS62841YBG
MODE PIN
yes
yes
3
TPS62840
ZHCSJW0D – JUNE 2019 – REVISED MARCH 2020
www.ti.com.cn
6 Pin Configuration and Functions
DLC
SON-8
Bottom view
Top view
GND
VIN
MODE
EN
VOS
SW
STOP
VSET
8
1
2
7
3
6
4
5
VOS
SW
STOP
VSET
GND
VIN
MODE
EN
1
8
7
2
6
3
5
4
DGR
HVSSOP-8
Bottom view
Top view
VOS
SW
MODE
VSET
1
8
2
7
EP
3
6
4
5
GND
NC
VIN
EN
GND
NC
VIN
EN
8
1
7
2
EP
6
3
5
4
VOS
SW
MODE
VSET
YBG
WCSP-6
Top view
4
1
2
A
GND
VOS
B
VIN
C
EN
Bottom view
2
1
A
VOS
GND
SW
B
SW
VIN
VSET
C
VSET
EN
Copyright © 2019–2020, Texas Instruments Incorporated
TPS62840
www.ti.com.cn
ZHCSJW0D – JUNE 2019 – REVISED MARCH 2020
Pin Functions
PIN
DLC
(SON-8)
DGR
(HVSSOP-8)
YBG
(WCSP-6)
I/O
VIN
2
6
B1
PWR
VIN power supply pin. Connect the input capacitor close to this pin for best
noise and voltage spike suppression. A 4.7-µF ceramic capacitor is
required.
SW
7
2
B2
PWR
The switch pin is connected to the internal MOSFET switches. Connect the
inductor to this terminal.
GND
1
8
A1
PWR
GND supply pin. Connect this pin close to the GND terminal of the input
and output capacitors.
VSET
5
4
C2
IN
Connecting a resistor to GND sets the output voltage when the converter is
enabled. For the TPS62849, connect this pin to GND.
VOS
8
1
A2
IN
Output voltage sense pin for the internal feedback divider network and
regulation loop. When the converter is disabled, this pin discharges VOUT by
an internal MOSFET. Connect this pin directly to the output capacitor with a
short trace.
EN
4
5
C1
IN
Enable pin. A high level enables the device and a low level turns the device
off. The pin features an internal pulldown resistor, which is disabled once
the device has started up and the output voltage is regulated. The pulldown
resistor is activated again, once a low level has been detected.
STOP
6
n/a
n/a
IN
STOP Switching pin. When this pin is logic high, the converter stops
switching in order to provide a quiet supply rail. The output is powered from
the charge available in the output capacitor. When this pin is logic low, the
device immediately resumes operation. The pin features an internal
pulldown resistor, which is disabled once a high level is detected at the
input. The pulldown resistor is activated again, once a low level has been
detected.
MODE
3
3
n/a
IN
MODE pin. A low level enables Power-Save Mode operation with an
automatic transition between PFM and PWM modes. A high level forces the
converter to operated in PWM mode. This pin can be toggled during
operation. It must be terminated.
NC
n/a
7
n/a
EP
n/a
9
n/a
NAME
(1)
DESCRIPTION
This pin is not connected internally. Do not connect this pin.
PWR
Exposed thermal pad (1). The PowerPAD must be connected to GND.
For more information about the PowerPAD, see the PowerPAD™ Thermally Enhanced Package application report.
Copyright © 2019–2020, Texas Instruments Incorporated
5
TPS62840
ZHCSJW0D – JUNE 2019 – REVISED MARCH 2020
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings (1)
MIN
MAX
VIN
–0.3
7
V
SW (DC)
–0.3
VIN + 0.3
V
SW (AC), less than 10ns (3)
–2.0
8.5
V
EN, MODE, STOP
–0.3
6.5
V
VSET
–0.3
VIN + 0.3 < 3.6
V
VOS
–0.3
3.7
V
Operating junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
Pin voltage (2)
(1)
(2)
(3)
UNIT
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal GND.
While switching.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body
model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
VIN
Supply voltage VIN
L
Effective inductance
COUT
Effective output capacitance
CIN
Effective input capacitance
CVSET
External parasitic capacitance at VSET pin
UNIT
V
2.2
2.9
µH
3
10
40
µF
1
4.7
0.909
External voltage selection resistor tolerance
µF
100
pF
267
kΩ
1%
External voltage selection resistor temperature coefficient
TJ
MAX
6.5
1.51
Nominal resistance range for external voltage selection resistor (E96 resistor series)
RSET
NOM
1.8
±200 ppm/°C
Operating junction temperature range
-40
125
°C
7.4 Thermal Information
THERMAL METRIC (1)
8 Pins DLC
Package
6 Pins YBG
Package
JEDEC PCB 51-7
RθJA
DGR EVM
JEDEC PCB 51-5
TPS62841-2EVM123
UNIT
105.6
133.4
54.4
46.9
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
75.7
0.4
58.1
N/A
°C/W
RθJB
Junction-to-board thermal resistance
31.9
39.4
25.9
N/A
°C/W
ψJT
Junction-to-top characterization parameter
2.3
0.1
1.2
0.9
°C/W
ψJB
Junction-to-board characterization parameter
31.5
39.4
25.9
17.4
°C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance
n/a
n/a
11.7
N/A
°C/W
(1)
6
Junction-to-ambient thermal resistance
8 Pins DGR
Package
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2019–2020, Texas Instruments Incorporated
TPS62840
www.ti.com.cn
ZHCSJW0D – JUNE 2019 – REVISED MARCH 2020
7.5 Electrical Characteristics
VIN = 3.6 V, TJ = –40°C to 125°C, STOP = GND, MODE = GND, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
IQ_NO_LOAD
No load
operating input current
EN = VIN, IOUT = 0µA, VOUT = 1.8V
device switching
60
nA
IQ_NO_LOAD
No load
operating input current
EN = VIN, IOUT = 0µA, VOUT = 1.2V
device switching
80
nA
IQ_NO_LOAD
No load
operating input current
(PWM Mode)
EN = VIN, IOUT = 0µA, VOUT = 1.8V, MODE = VIN
device switching
3
mA
IQ_VIN
Operating quiescent current into pin VIN
EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT =
1.8V
device not switching, TJ = 25°C
(DLC package option)
36
100
nA
IQ_VOS
Operating quiescent current into pin VOS
EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT =
1.8V
device not switching, TJ = 25°C
(DLC package option)
56
120
nA
IQ_VIN
Operating quiescent current into pin VIN
EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT =
1.8V
device not switching, TJ = -40°C to 85°C
36
360
nA
IQ_VOS
Operating quiescent current into pin VOS
EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT =
1.8V
device not switching, TJ = -40°C to 85°C
56
170
nA
EN = VIN, VOUT = 3.3V
device not switching
70
nA
EN = VIN, VOUT < 1.5 V
device not switching
5
nA
EN, STOP = VIN, 3V < VOUT < 3.3V
TJ = -40°C to 85°C
5
IQ_VOS
Operating quiescent current into VOS pin
100
nA
IQ_100%_MODE
Operating quiescent current 100% Mode
VIN = VOUT = 3.3V, TJ = -40°C to 85°C
IQ_VIN_STOP
Operating quiescent current into pin VIN
STOP = High, VOUT = 1.8V, TJ = -40°C to 85°C
70
175
µA
ISD
Shutdown current
EN = GND, shutdown current into VIN
VSET = GND, TJ = -40°C to 85°C
25
300
nA
VTH_UVLO+
VTH_UVLO–
Undervoltage lockout threshold
120
nA
Rising VIN
1.72
1.8
V
Falling VIN
1.45
1.75
V
EN, MODE, STOP INPUTS
VIH_TH
High level input voltage
VIL_TH
Low level input voltage
IIN
Input bias current
MODE input, TJ = -40°C to 85°C
RPD
Internal pull-down resistance
EN, STOP inputs
Copyright © 2019–2020, Texas Instruments Incorporated
1.1
V
1
200
450
0.4
V
25
nA
kΩ
7
TPS62840
ZHCSJW0D – JUNE 2019 – REVISED MARCH 2020
www.ti.com.cn
Electrical Characteristics (continued)
VIN = 3.6 V, TJ = –40°C to 125°C, STOP = GND, MODE = GND, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SWITCHES
RDS(ON)
ILIMF_SS
High-side MOSFET
on-resistance
(DLC, YBG package)
VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C
430
600
VIN = 5V, I = 200mA, TJ = -40°C to 85°C
340
465
Low-side MOSFET
on-resistance
(DLC, YBG package)
VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C
170
240
VIN = 5V, I = 200mA, TJ = -40°C to 85°C
135
180
High-side MOSFET
on-resistance
(DGR package)
VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C
460
630
VIN = 5V, I = 200mA, TJ = -40°C to 85°C
370
495
Low-side MOSFET
on-resistance
(DGR package)
VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C
200
270
VIN = 5V, I = 200mA, TJ = -40°C to 85°C
165
210
0.15
0.225
0.3
A
1.0
1.2
1.4
A
Soft-start
switch current limit (1)
High-side MOSFET switch current limit (1)
ILIMF
mΩ
mΩ
mΩ
mΩ
Low-side MOSFET switch current limit
1.0
A
ILIMN
Negative current limit
533
mA
tI_LIM_DELAY
Current limit propagation delay
50
ns
ILKG_SW
Leakage current
into SW pin
10
nA
VSW = 1.8V, TJ = -40°C to 85°C
OUTPUT VOLTAGE DISCHARGE
IDISCHARGE_VOS
Output discharge current
EN = GND, sink current into VOS pin, over VIN
range
VOUT = 1.8V, TJ = -40°C to 85°C
16
35
44
mA
THERMAL PROTECTION
Thermal shutdown temperature
TSD
Rising junction temperature, PWM Mode
Thermal shutdown hysteresis
160
°C
5
°C
OUTPUT
VOUT
Output voltage accuracy
PWM Mode, IOUT = 0 mA, VOUT >= 1.8 V
PWM Mode, IOUT = 0 mA, VOUT