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TXB0304
SCES831G – SEPTEMBER 2011 – REVISED MAY 2019
TXB0304 4-Bit Bidirectional Level-Shifter/Voltage Translator with Automatic Direction
Sensing
1 Features
3 Description
•
This 4-bit non-inverting translator uses two separate
configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply
voltage from 0.9 V to 3.6 V. The B port is designed to
track VCCB. VCCB accepts any supply voltage from
0.9 V to 3.6 V. This allows for low Voltage
bidirectional translation between 1 V, 1.2 V, 1.5 V, 1.8
V, 2.5 V and 3.3 V voltage nodes. For the TXB0304,
when the output-enable (OE) input is low, all outputs
are placed in the high-impedance state. To ensure
the high-impedance state during power up or power
down, OE should be tied to GND through a pull-down
resistor; the minimum value of the resistor is
determined by the current-sourcing capability of the
driver. The OE device control pin input circuit is
supplied by VCCA. This device is fully specified for
partial-power-down applications using Ioff. The Ioff
circuitry disables the outputs, preventing damaging
current backflow through the device when it is
powered down. The only difference between
TXB0304 and TXBN0304 is the OE signal being
active high and active low respectively.
1
•
•
•
•
•
•
Fully Symmetric Supply Voltages, 0.9 V to 3.6 V
on A Port and 0.9 V to 3.6 V
VCC Isolation Feature – If Either VCC Input is at
GND, all Outputs are in High-Impedance State
OE Input Circuit Referenced to VCCA
Low Power Consumption, 5 μA Max (ICCA or ICCB)
Ioff Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 8000-V Human-Body Model (A114-B)
– 1000-V Charged-Device Model (C101)
2 Applications
•
•
•
•
Personal Electronics
Industrial
Enterprise
Telecom
Device Information(1)
PART NUMBER
TXB0304
PACKAGE
BODY SIZE (NOM)
RUT UQFN (12)
2.00 mm × 1.70 mm
RSV UQFN (16)
2.60 mm × 1.80 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application Block Diagram for TXB0304
VCCA
Processor
VCCB
Peripheral
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TXB0304
SCES831G – SEPTEMBER 2011 – REVISED MAY 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
4
4
4
5
5
6
6
7
7
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Switching Characteristics ..........................................
Operating Characteristics..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 8
Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 11
9
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application ................................................. 12
10 Power Supply Recommendations ..................... 13
11 Layout................................................................... 13
11.1 Layout Guidelines ................................................. 13
11.2 Layout Example .................................................... 14
12 Device and Documentation Support ................. 15
12.1
12.2
12.3
12.4
12.5
12.6
Device Support......................................................
Documentation Support .......................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
15
15
15
15
15
15
13 Mechanical, Packaging, and Orderable
Information ........................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (May 2016) to Revision G
•
Page
Changed text in Power Supply Recomendations section. ................................................................................................... 13
Changes from Revision E (August 2014) to Revision F
Page
•
Made changes to Description section..................................................................................................................................... 1
•
Made changes to Absolute Maximum Ratings, Recommended Operating Conditions (1) (2), Switching Characteristics
and Electrical Characteristics tables....................................................................................................................................... 1
Changes from Revision D (October 2012) to Revision E
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
•
Changed VCCA and VCCB in the ABS MAX table to VCCA and VCCB in 3 places ................................................................ 4
•
Changed in ELEC CHARAC table the 0.9 x VCCA and 0.9 x VCCB from MAX column into the MIN column ......................... 5
•
Changed in ELEC CHARAC table 0.2 (2 places) in the MIN column to the MAX ................................................................. 5
Changes from Revision C (May 2012) to Revision D
•
Added Application Information section ................................................................................................................................ 12
Changes from Revision B (September 2011) to Revision C
•
2
Page
Page
Added package pin out diagram notes................................................................................................................................... 3
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SCES831G – SEPTEMBER 2011 – REVISED MAY 2019
5 Pin Configuration and Functions
RSV Package
16-Pin UQFN
TXB0304 Top View
NC
V CCB
14
13
16
1
12
B1
2
11
B2
3
10
B3
4
9
A4
15
A3
NC
A2
V CCA
A1
B4
RUT Package
12-Pin UQFN
TXB0304 Top View
7
GND
OE
NC
GND
8
5
6
RSV Package
16-Pin UQFN
TXBN0304 Top View
NC
V CCB
14
13
16
1
12
B1
2
11
B2
3
10
B3
4
9
A4
15
B4
7
GND
/OE
NC
GND
8
5
6
A.
A3
NC
A2
V CCA
A1
RUT Package
12-Pin UQFN
TXBN0304 Top View
See Layout Guidelines for notes about
package pin out diagrams.
Pin Functions
PIN
NAME
TXB0304
TXBN0304
TYPE
DESCRIPTION
RSV
RUT
RSV
RUT
A1
1
2
1
2
I/O
Input/output 1
A2
2
3
2
3
I/O
Input/output 2
A3
3
4
3
4
I/O
Input/output 3
A4
4
5
4
5
I/O
Input/output 4
B1
12
10
12
10
I/O
Input/output 4
B2
11
9
11
9
I/O
Input/output 3
B3
10
8
10
8
I/O
Input/output 2
Input/output 1
B4
Referenced to VCCA
Referenced to VCCB
9
7
9
7
I/O
6, 7
6
6,7
6
GND
NC
5, 14, 15
—
5, 14, 15
—
—
OE
8
12
—
—
I
3-state output-mode enable. Pull OE (TXB0304) low to place all
outputs in 3-state mode. Referenced to VCCA.
OE
—
—
8
12
I
3-state output-mode enable. Pull OE (TXBN0304) high to place all
outputs in 3-state mode.
Referenced to VCCA.
VCCA
16
1
16
1
—
A-port supply voltage 0.9 V ≤ VCCA ≤ 3.6 V
VCCB
13
11
13
11
—
B-port supply voltage 0.9 V ≤ VCCB ≤ 3.6 V
GND
Ground
No connection; not internally connected
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TXB0304
SCES831G – SEPTEMBER 2011 – REVISED MAY 2019
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VCCA
VCCB
(1)
MIN
MAX
–0.5
4.6
–0.5
4.6
A port
–0.5
4.6
B port
–0.5
4.6
Supply voltage
UNIT
V
VI
Input voltage
VO
Voltage applied to any output in the highimpedance or power-off state
A port
–0.5
4.6
B port
–0.5
4.6
VO
Voltage applied to any output in the high
or low state (2)
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCCA, VCCB, or GND
V
V
V
±100
mA
Tstg
Storage temperature
–65
150
°C
TJ
Junction temperature
–40
125
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The value of VCCA and VCCB are provided in the recommended operating conditions table.
6.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±8000
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions (1) (2)
VCCA
VCCA
VCCB
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
VO
Voltage range applied to any output in
the high-impedance or power-off state
Δt/Δv
Input transition rise or fall rate
TA
Operating free-air temperature
(1)
(2)
4
VCCB
MIN
MAX
0.9
3.6
Data inputs
0.9 V to 3.6 V
0.9 V to 3.6 V
VCCI × 0.65
VCCI
OE/OE
0.9 V to 3.6 V
0.9 V to 3.6 V
VCCA × 0.65
3.6
Data inputs
0.9 V to 3.6 V
0.9 V to 3.6 V
0
VCCI × 0.35
0.9 V to 1.2 V
0.9 V to 3.6 V
0
VCCA × 0.3
OE/OE
1.2 V to 3.6 V
0.9 V to 3.6 V
0
VCCA × 0.35
A-port
0.9 V to 3.6 V
0.9 V to 3.6 V
0
3.6
B-port
0.9 V to 3.6 V
0.9 V to 3.6 V
0
3.6
A-port inputs
0.9 V to 3.6 V
0.9 V to 3.6 V
40
B-port inputs
0.9 V to 3.6 V
0.9 V to 3.6 V
40
–40
85
UNIT
V
V
V
V
ns/V
°C
The A and B sides of an unused data I/O pair must be held in the same state, such as, both at VCCI or both at GND.
VCCI is the supply voltage associated with the input port.
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6.4 Thermal Information
TXB0304
THERMAL METRIC (1)
RUT (UQFN)
RSV (UQFN)
12 PINS
16 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
116.4
131.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
45.7
55.8
°C/W
RθJB
Junction-to-board thermal resistance
46.9
55.3
°C/W
ψJT
Junction-to-top characterization parameter
0.6
1.4
°C/W
ψJB
Junction-to-board characterization parameter
46.9
55.3
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
VOHA
High-level
output
voltage
TEST CONDITIONS
VCCA
VCCB
TA = 25°C
0.9 V to 3.6 V
Low-level
VOLA output
voltage
IOL = 20 μA
–40°C to 85°C
0.9 V to 3.6 V
High-level
VOHB output
voltage
IOH = –20 μA
TA = 25°C
0.9 V to 3.6 V
Low-level
VOLB output
voltage
IOL = 20 μA
–40°C to 85°C
0.9 V to 3.6 V
II
OE
VI = VCCI or GND
A port
VI or VO = 0 to 3.6 V
Ioff
B port
IOZ
A or B port
VI or VO = 0 to 3.6 V
OE = GND
–40°C to 85°C
TA = 25°C
–40°C to 85°C
TA = 25°C
–40°C to 85°C
TA = 25°C
–40°C to 85°C
TYP MAX
0.9 x
VCCA
IOH = –20 μA
TA = 25°C
MIN
V
0.2
0.9 V to 3.6 V
0.9 V to 3.6 V
0V
0 V to 3.6 V
0.9 V to 3.6 V
0V
0.9 V to 3.6 V
0.9 V to 3.6 V
UNIT
0.9 x
VCCB
V
V
0.2
±1
±2
V
μA
±1
±2
±1
μA
±2
±1
±2
μA
ICCA
VI = VCCI or GND, IO = 0
–40°C to 85°C
0.9 V to 3.6 V
0.9 V to 3.6 V
5
μA
ICCB
VI = VCCI or GND, IO = 0
–40°C to 85°C
0.9 V to 3.6 V
0.9 V to 3.6 V
5
μA
ICCA + ICCB
VI = VCCI or GND, IO = 0
–40°C to 85°C
0.9 V to 3.6 V
0.9 V to 3.6 V
10
μA
High-Z state
ICCZA supply
current
VI = VCCI or GND,
IO = 0, OE = GND
–40°C to 85°C
0.9 V to 3.6 V
0.9 V to 3.6 V
5
μA
High-Z state
ICCZB supply
current
VI = VCCI or GND,
IO = 0, OE = GND
–40°C to 85°C
0.9 V to 3.6 V
0.9 V to 3.6 V
5
μA
Ci
TA = 25°C
0.9 V to 3.6 V
0.9 V to 3.6 V
Cio
OE
A port
B port
TA = 25°C, OE = GND
0.9 V to 3.6 V
0.9 V to 3.6 V
3
6.7
6.7
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pF
pF
5
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SCES831G – SEPTEMBER 2011 – REVISED MAY 2019
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6.6 Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
Data rate
LOAD
VCCA
VCCB
CL = 15 pF
0.9 to 3.6 V
CL = 15 pF
1.2 to 3.6 V
CL = 15 pF
MIN
MAX
UNIT
0.9 to 3.6 V
50
Mbps
1.2 to 3.6 V
100
Mbps
1.8 to 3.6 V
1.8 to 3.6 V
140
Mbps
CL = 30 pF
0.9 to 3.6 V
0.9 to 3.6 V
40
Mbps
CL = 30 pF
1.2 to 3.6 V
1.2 to 3.6 V
90
Mbps
CL = 30 pF
1.8 to 3.6 V
1.8 to 3.6 V
130
Mbps
CL = 50 pF
1.2 to 3.6 V
1.2 to 3.6 V
80
Mbps
CL = 50 pF
1.8 to 3.6 V
1.8 to 3.6 V
120
Mbps
CL = 100 pF
1.2 to 3.6 V
1.2 to 3.6 V
70
Mbps
CL = 100 pF
1.8 to 3.6 V
1.8 to 3.6 V
100
Mbps
6.7 Switching Characteristics
over operating free-air temperature range (unless otherwise noted). (For parameter descriptions, see Figure 2 and Figure 3.)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
LOAD
VCCA
VCCB
A
B
CL = 15
0.9-3.6
0.9-3.6
18.9
30
A
B
CL = 15
1.2-3.6
1.2-3.6
7.5
11.5
A
B
CL = 15
1.8-3.6
1.8-3.6
3.7
4.8
A
B
CL = 30
0.9-3.6
0.9-3.6
19.5
34
A
B
CL = 30
1.2-3.6
1.2-3.6
7.8
11.9
A
B
CL = 30
1.8-3.6
1.8-3.6
3.8
5.2
A
B
CL = 50
1.2-3.6
1.2-3.6
8
12.3
A
B
CL = 50
1.8-3.6
1.8-3.6
4
5.4
A
B
CL = 100
1.2-3.6
1.2-3.6
8.6
13.5
A
B
CL = 100
1.8-3.6
1.8-3.6
4.5
6
B
A
CL = 15
0.9-3.6
0.9-3.6
18.9
30
B
A
CL = 15
1.2-3.6
1.2-3.6
7.5
11.5
B
A
CL = 15
1.8-3.6
1.8-3.6
3.7
5
B
A
CL = 30
0.9-3.6
0.9-3.6
19.5
34
B
A
CL = 30
1.2-3.6
1.2-3.6
7.8
11.9
B
A
CL = 30
1.8-3.6
1.8-3.6
3.8
5.2
B
A
CL = 50
1.2-3.6
1.2-3.6
8
12.3
B
A
CL = 50
1.8-3.6
1.8-3.6
4
5.4
B
A
CL = 100
1.2-3.6
1.2-3.6
8.6
13.5
B
A
CL = 100
1.8-3.6
1.8-3.6
4.5
0.9-3.6
0.9-3.6
262
1.2-3.6
1.2-3.6
64
1.8-3.6
1.8-3.6
37
0.9-3.6
0.9-3.6
332
1.2-3.6
1.2-3.6
76
1.8-3.6
1.8-3.6
41
A
ten
OE
B
(1)
6
CL = 15
CL = 15
MIN
TYP (1)
MAX
UNIT
ns
ns
6
ns
A
CL = 15
0.9-3.6
0.9-3.6
172
ns
B
CL = 15
0.9-3.6
0.9-3.6
169
ns
tdis
OE
trB, tfB
B-port rise and fall times
CL = 15
0.9-3.6
0.9-3.6
2.95
tsA, tsA
A-port rise and fall times
CL = 15
0.9-3.6
0.9-3.6
3.1
tSK(O)
Channel-to-channel skew
CL = 15
0.9-3.6
0.9-3.6
ns
ns
0.15
ns
TA = 25°C
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6.8 Operating Characteristics
Cpd - power dissipation capacitance measured at TA = 25°C.
PARAMETER
CpdA
CpdB
CpdA
CpdB
(1)
TYP (1)
TEST CONDITIONS
A-port input, B-port output
34
B-port input, A-port output
CL = 0, f = 10 MHz, tr = tf = 1 ns, OE = VCCA (outputs enabled)
A-port input, B-port output
34
34
B-port input, A-port output
34
A-port input, B-port output
0.01
B-port input, A-port output
0.01
CL = 0, f = 10 MHz, tr = tf = 1 ns, OE = GND (outputs disabled)
A-port input, B-port output
B-port input, A-port output
0.01
0.01
UNIT
pF
pF
pF
pF
VCCA, VCCB 0.9 V to 3.6 V
6.9 Typical Characteristics
OE Pin Input Capacitance (pF)
6
40
25qC (Room Temperature)
85qC
5
4
3
2
1
0
0
0.5
1
1.5
2
2.5
VCCA (V)
3
3.5
4
D001
Figure 1. Input Capacitors for OE Pin (CI) vs Power Supply (VCCA)
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7 Parameter Measurement Information
2 × VCCO
From Output
Under Test
50 kΩ
From Output
Under Test
CL
15 pF
50 k
VCCI/2
TEST
S1
t PZL/t PLZ
t PHZ/t PZH
2 × VCCO
Open
tW
VCCI
Input
Open
50 kΩ
LOAD CIRCUIT FOR
ENABLE/DISABLE
TIME MEASUREMENT
LOAD CIRCUIT FOR MAX DATA RATE,
PULSE DURATION PROPAGATION
DELAY OUTPUT RISE AND FALL TIME
MEASUREMENT
S1
VCCI/2
VCCI
0V
t PLH
Output
Input
t PHL
VCCO/2
0.9 x VCCO
0.1 x VCCO
VCCI/2
VCCI/2
0V
VOH
VCCO/2
tr
tf
VOL
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
A.
CL includes probe and jig capacitance.
B.
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 Ω, dv/dt ≥ 1
V/ns.
C.
The outputs are measured one at a time, with one transition per measurement.
D.
tPLH and tPHL are the same as tpd.
E.
VCCI is the VCC associated with the input port.
F.
VCCO is the VCC associated with output port.
G.
All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuits and Voltage Waveforms
8
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Parameter Measurement Information (continued)
VCCA
VCCA / 2
OE input
VCCA / 2
0V
tPLZ
tPZL
VOH
Output
Waveform 1
S1 at 2 × VCCO
VCCO / 2
VCCO × 0.2
(see Note 3)
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note 3)
VOL
VCCO × 0.9
VOH
VCCO / 2
0V
(1)
tPLZ and tPHZ are the same as tdis.
(2)
tPZL and tPZH are the same as ten.
(3)
Waveform 1 is for an output with internal such that the output is high, except when OE is high. Waveform 2 is for an
output with conditions such that the output is low, except when OE is high.
Figure 3. Enable and Disable Times
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8 Detailed Description
8.1 Overview
The TXB0304 and TXBN0304 can be used in level-translation applications for interfacing devices or systems
operating at different interface voltages with one another.
8.1.1 Architecture
The TXB0304 and TXBN0304 architecture (see Figure 4) does not require a direction-control signal to control the
direction of data flow from A to B or from B to A. In a dc state, the output drivers of the TXB0304 can maintain a
high or low, but are designed to be weak, so that they can be overdriven by an external driver when data on the
bus starts flowing the opposite direction. The output one shots detect rising or falling edges on the A or B ports.
During a rising edge, the one shot turns on the PMOS transistors (T1, T3) for a short duration, which speeds up
the low-to-high transition. Similarly, during a falling edge, the one shot turns on the NMOS transistors (T2, T4) for
a short duration, which speeds up the high-to-low transition. The typical output impedance during output
transition is 30 Ω at VCCO = 0.9 V to 1 V, 10 Ω at VCCO = 1.1 V to 1.7 V, and 5 Ω at VCCO = 1.8 V to 3.3 V.
8.2 Functional Block Diagram
VCCA
VCCB
One
Shot
T1
1 kΩ
One
Shot
T2
B
A
One
Shot
T3
1 kΩ
T4
One
Shot
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Figure 4. Architecture of TXB0304 I/O Cell
10
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8.3 Feature Description
8.3.1 Input Driver Requirements
Typical IIN vs VIN characteristics of the TXB0304//TXBN0304 are shown in Figure 5. For proper operation, the
device driving the data I/Os of the TXB0304 must have drive strength of at least ±3 mA.
IIN
VT/1k
0
VT
VIN
-(VCC – VT)/1k
(1)
VCC is power supply of TXB0304.
(2)
VT is the input threshold voltage of TXB0304 (typically it is VCC/2).
Figure 5. Typical IIN vs VIN Curve
8.4 Device Functional Modes
8.4.1 Enable and Disable
The TXB0304 has an OE input that is used to disable the device by setting OE = low (OE = high for TXBN0304),
which places all I/Os in the high-impedance (Hi-Z) state. The disable time (tdis) indicates the delay between when
OE goes low and when the outputs actually get disabled (Hi-Z). The enable time (ten) indicates the amount of
time the user must allow for the one-shot circuitry to become operational after OE is high.
8.4.2 Pullup or Pulldown Resistor on I/O Lines
The TXB0304/TXBN0304 is designed to drive capacitive loads of up to 100 pF. The output drivers of the
TXB0304 have low dc drive strength. If pull-up or pull-down resistors are connected externally to the data I/Os,
their values must be kept higher than 20 kΩ to ensure that they do not contend with the output drivers of the
TXB0304. but if the receiver is integrated with the smaller pull down or pull up resistor, below formula can be
used for estimation to evaluate the VOH and VOL .
Vol = VCCout ´
1.5kΩ
1.5kΩ + Rpu
Voh = VCCout ´
(1)
Rpd
1.5kΩ + Rpd
where
•
•
•
•
VCCOUT is the output port supply voltage on either VCCA or VCCB
RPD is the value of the external pull down resistor
RPU is the value of the external pull up resistor
1.5 kΩ is the counting the variation of the serial resistor 1kΩ in the I/O line.
(2)
Because of this restriction on external resistors, the TXB0304 should not be used in applications such as I2C or
1-Wire where an open-drain driver is connected on the bidirectional data I/O. For these applications, use a
device from the TI TXS010X series of level translators.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TXB0304 can be used in level-translation applications for interfacing devices or systems operating at
different interface voltages with one another. It can only translate push-pull CMOS logic outputs. If for open-drain
signal translation, please refer to TI TXS010X products. Any external pull-down or pull-up resistors are
recommended larger than 20 kΩ.
9.2 Typical Application
3.3 V
1.8 V
0.1 mF
VCCA
0.1 mF
VCCB
OE
1.8-V
System Controller
3.3-V
System
TXB0304
A1
A2
A3
A4
Data
GND
B1
B2
B3
B4
Data
Copyright © 2016, Texas Instruments Incorporated
Figure 6. Typical Application Schematic
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1.
Table 1. Design Parameters
DESIGN PARAMETERS
EXAMPLE VALUE
Input voltage range
0.9 V to 3.6 V
Output voltage range
0.9 V to 3.6 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
- Use the supply voltage of the device that is driving the TXB0304 device to determine the input voltage
range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low the
value must be less than the VIL of the input port.
• Output voltage range
- Use the supply voltage of the device that the TXB0304 device is driving to determine the output voltage
range.
- Don’t recommend to have the external pull-up or pull-down resistors. If mandatory, it is recommended
the value should be larger than 20 kΩ.
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• An external pull-down or pull-up resistor decreases the output VOH and VOL. Use the below equations in
section 8.5.2 to draft estimate the VOH and VOL as a result of an external pull-down and pull-up resistor.
9.2.3 Application Curve
Figure 7. Level-Translation of a 2.5-MHz Signal
10 Power Supply Recommendations
During operation, TXB0304 can work at both VCCA ≤ VCCB and VCCA ≥ VCCB . During power-up sequencing,
any power supply can be ramped up first. Both the supplies are recommended to be powered down together.
The TXB0304 has circuitry that disables all input/output ports when either VCC is switched off (VCCA/B = 0 V).
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
• Bypass capacitors should be used on power supplies. And should be placed as close as possible to the VCCA,
VCCB pin and GND pin
• Short trace-lengths should be used to avoid excessive loading.
• For long transmission lines, place a series resistor equivalent to the impedance of the transmission lines to
avoid signal integrity issues
• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one-shot duration, approximately 10 ns, ensuring that any reflection encounters low impedance at the
source driver.
• Pullup resistors are not required on both sides for Logic I/O.
• If pullup or pulldown resistors are needed, the resistor value must be over 20 kΩ.
• 20 kΩ is a safe recommended value, if the customer can accept higher Vol or lower Voh, smaller pull up or
pull down resistor is allowed, the draft estimation is Vol = Vccout × 1.5k/(1.5k + Rpu) and Voh = Vccout ×
Rpd/(1.5k + Rpd).
• If pullup resistors are needed, please refer to the TXS0104 or contact TI.
• For detailed information, refer to application note SCEA043.
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11.2 Layout Example
VCCA
Keep OE high until VCCA and
VCCB are powered up
Bypass Capacitor
OE
VCCA
1
From
Controller
A1
2
To
Controller
A2
3
From
Controller
A3
A3
4
To
Controller
A4
A4
5
12
TXB0304
6
Bypass Capacitor
11 VCCB
10
B1
To
System
9
B2
From
System
8
B3
B3
To
System
7
B4
From
System
GND
LEGEND
VIA to Power Plane
Polygonal Copper Pour
VIA to GND Plane (Inner Layer)
Figure 8. TXB0304 PCB Layout
14
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Development Support
For TI TXS010X products, go to www.ti.com/product/txs0101.
For the TXB0304 IBIS Model, see SCEM544.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation see the following:
• Application Report, A Guide to Voltage Translation With TXB-Type Translators, SCEA043
• User's Guide, TXB0304 Evaluation Module, SCEU003
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TXB0304RSVR
ACTIVE
UQFN
RSV
16
3000
RoHS & Green
TXB0304RUTR
ACTIVE
UQFN
RUT
12
3000
TXBN0304RSVR
ACTIVE
UQFN
RSV
16
TXBN0304RUTR
ACTIVE
UQFN
RUT
12
NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
ZTJ
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
(737, 73R, 73V)
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
ZTK
3000
RoHS & Green
Level-1-260C-UNLIM
-40 to 85
74R
NIPDAUAG
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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